LLVM: llvm::XtensaInstrInfo Class Reference (original) (raw)

#include "[Target/Xtensa/XtensaInstrInfo.h](XtensaInstrInfo%5F8h%5Fsource.html)"

Public Member Functions
XtensaInstrInfo (const XtensaSubtarget &STI)
void adjustStackPtr (MCRegister SP, int64_t Amount, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const
Adjust SP by Amount bytes.
unsigned getInstSizeInBytes (const MachineInstr &MI) const override
const XtensaRegisterInfo & getRegisterInfo () const
Register isLoadFromStackSlot (const MachineInstr &MI, int &FrameIndex) const override
Register isStoreToStackSlot (const MachineInstr &MI, int &FrameIndex) const override
void copyPhysReg (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, Register DestReg, Register SrcReg, bool KillSrc, bool RenamableDest=false, bool RenamableSrc=false) const override
void storeRegToStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, Register VReg, MachineInstr::MIFlag Flags=MachineInstr::NoFlags) const override
void loadRegFromStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register DestReg, int FrameIdx, const TargetRegisterClass *RC, Register VReg, MachineInstr::MIFlag Flags=MachineInstr::NoFlags) const override
void getLoadStoreOpcodes (const TargetRegisterClass *RC, unsigned &LoadOpcode, unsigned &StoreOpcode, int64_t offset) const
void loadImmediate (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, MCRegister *Reg, int64_t Value) const
bool reverseBranchCondition (SmallVectorImpl< MachineOperand > &Cond) const override
MachineBasicBlock * getBranchDestBlock (const MachineInstr &MI) const override
bool isBranchOffsetInRange (unsigned BranchOpc, int64_t BrOffset) const override
bool analyzeBranch (MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const override
unsigned removeBranch (MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override
unsigned insertBranch (MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const override
void insertIndirectBranch (MachineBasicBlock &MBB, MachineBasicBlock &DestBB, MachineBasicBlock &RestoreBB, const DebugLoc &DL, int64_t BrOffset=0, RegScavenger *RS=nullptr) const override
unsigned insertBranchAtInst (MachineBasicBlock &MBB, MachineBasicBlock::iterator I, MachineBasicBlock *TBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded) const
unsigned insertConstBranchAtInst (MachineBasicBlock &MBB, MachineInstr *I, int64_t offset, ArrayRef< MachineOperand > Cond, DebugLoc DL, int *BytesAdded) const
bool isBranch (const MachineBasicBlock::iterator &MI, SmallVectorImpl< MachineOperand > &Cond, const MachineOperand *&Target) const
const XtensaSubtarget & getSubtarget () const

Definition at line 31 of file XtensaInstrInfo.h.

◆ adjustStackPtr()

Adjust SP by Amount bytes.

Definition at line 80 of file XtensaInstrInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::dwarf_linker::DebugLoc, DL, llvm::get(), I, llvm::isInt(), llvm::RegState::Kill, loadImmediate(), and MBB.

◆ analyzeBranch()

Definition at line 370 of file XtensaInstrInfo.cpp.

References assert(), Cond, llvm::MachineOperand::CreateImm(), llvm::getImm(), llvm::MachineOperand::getMBB(), I, isBranch(), llvm::MachineOperand::isMBB(), MBB, llvm::SmallVectorTemplateBase< T, bool >::push_back(), and TBB.

◆ copyPhysReg()

◆ getBranchDestBlock()

◆ getInstSizeInBytes()

◆ getLoadStoreOpcodes()

◆ getRegisterInfo()

◆ getSubtarget()

◆ insertBranch()

Definition at line 480 of file XtensaInstrInfo.cpp.

References llvm::MachineInstrBuilder::addMBB(), llvm::BuildMI(), Cond, llvm::Count, DL, llvm::get(), getInstSizeInBytes(), insertBranchAtInst(), MBB, MI, and TBB.

◆ insertBranchAtInst()

Definition at line 630 of file XtensaInstrInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMBB(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), Cond, llvm::Count, DL, llvm::get(), llvm::getImm(), getInstSizeInBytes(), getReg(), I, MBB, MI, llvm::report_fatal_error(), and TBB.

Referenced by insertBranch().

◆ insertConstBranchAtInst()

Definition at line 571 of file XtensaInstrInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), Cond, llvm::Count, DL, llvm::get(), llvm::getImm(), getInstSizeInBytes(), getReg(), I, llvm_unreachable, MBB, and MI.

◆ insertIndirectBranch()

Definition at line 502 of file XtensaInstrInfo.cpp.

References llvm::MachineInstr::addOperand(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::MachineBasicBlock::back(), llvm::BuildMI(), llvm::CallingConv::C, llvm::XtensaConstantPoolMBB::Create(), llvm::MachineOperand::CreateCPI(), DL, llvm::MachineBasicBlock::end(), llvm::get(), llvm::MachineFunction::getConstantPool(), llvm::Function::getContext(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), llvm::ilist_node_impl< OptionsT >::getIterator(), llvm::MachineFunction::getRegInfo(), II, llvm::isInt(), llvm::RegState::Kill, loadRegFromStackSlot(), MBB, MRI, Register, llvm::report_fatal_error(), and storeRegToStackSlot().

◆ isBranch()

◆ isBranchOffsetInRange()

bool XtensaInstrInfo::isBranchOffsetInRange ( unsigned BranchOpc, int64_t BrOffset ) const override

◆ isLoadFromStackSlot()

◆ isStoreToStackSlot()

◆ loadImmediate()

Definition at line 185 of file XtensaInstrInfo.cpp.

References llvm::MachineInstrBuilder::addConstantPoolIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::dwarf_linker::DebugLoc, DL, llvm::get(), llvm::MachineConstantPool::getConstantPoolIndex(), llvm::Type::getInt32Ty(), High, llvm::Low, MBB, MBBI, and llvm::report_fatal_error().

Referenced by adjustStackPtr().

◆ loadRegFromStackSlot()

◆ removeBranch()

◆ reverseBranchCondition()

◆ storeRegToStackSlot()

The documentation for this class was generated from the following files: