LLVM: llvm::AMDGPUISD Namespace Reference (original) (raw)
| Enumerations | |
|---|---|
| enum | NodeType : unsigned { WAVE_ADDRESS = GENERATED_OPCODE_END , DOT4, MAD_U64_U32, MAD_I64_I32, TEXTURE_FETCH, R600_EXPORT, CONST_ADDRESS, BUILD_VERTICAL_VECTOR, DUMMY_CHAIN } |
◆ NodeType
| Enumerator | | | | | | | | | | | | | | | | ----------------------- | -------------------------------------------------------------------------------------------------------------------------------------------------- | -------------- | | | ------- | | | ------- | | | ------- | | | | | WAVE_ADDRESS | | | | | | | | | | | | | | | | DOT4 | | | | | | | | | | | | | | | | MAD_U64_U32 | | | | | | | | | | | | | | | | MAD_I64_I32 | | | | | | | | | | | | | | | | TEXTURE_FETCH | | | | | | | | | | | | | | | | R600_EXPORT | | | | | | | | | | | | | | | | CONST_ADDRESS | | | | | | | | | | | | | | | | BUILD_VERTICAL_VECTOR | This node is for VLIW targets and it is used to represent a vector that is stored in consecutive registers with the same channel. For example: |X | Y|Z|W| T0|v.x| | | | T1|v.y| | | | T2|v.z| | | | T3|v.w| | | | | | DUMMY_CHAIN | | | | | | | | | | | | | | |
Definition at line 20 of file AMDGPUSelectionDAGInfo.h.