LLVM: lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp Source File (original) (raw)

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31using namespace llvm;

32

34 std::string Description, const MCFixup &Fixup,

37 std::string Diagnostic = "out of range " + Description;

38

39 int64_t Max = maxUIntN(Width);

40

41 Diagnostic +=

42 " (expected an integer in the range 0 to " + std::to_string(Max) + ")";

43

44 Ctx->reportError(Fixup.getLoc(), Diagnostic);

45 }

46}

47

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69 assert(STI && "STI can not be NULL");

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72 const int32_t FlashSize = 0x2000;

73 int32_t SignedValue = Value;

74

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79 Value = WrappedValue;

80 }

81 }

82

84 return false;

85 }

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87

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90 return true;

91}

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103 auto top = Value & (0xf00000 << 6);

104 auto middle = Value & (0x1ffff << 5);

105 auto bottom = Value & 0x1f;

106

107 Value = (top << 6) | (middle << 3) | (bottom << 0);

108}

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213 Value = (upper << 4) | lower;

214}

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241

242}

243}

244

245namespace llvm {

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254 unsigned Kind = Fixup.getKind();

255 switch (Kind) {

256 default:

260 break;

263 break;

266 break;

269 break;

272 break;

277 break;

280 break;

285 break;

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292 break;

295 break;

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304 break;

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312 break;

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320 break;

324 break;

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329 break;

331 Value >>= 1;

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335 break;

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339 break;

342 break;

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346 break;

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350 break;

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354 break;

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361 break;

362 }

363}

364

365std::unique_ptr

369

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375 if (IsResolved) {

377 Target.getSpecifier());

379 IsResolved = false;

380 }

381 if (!IsResolved)

383

385 return;

388 return;

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393 unsigned NumBits = Info.TargetSize + Info.TargetOffset;

394 auto NumBytes = (NumBits / 8) + ((NumBits % 8) == 0 ? 0 : 1);

395

396

398

399 assert(Fixup.getOffset() + NumBytes <= F.getSize() &&

400 "Invalid fixup offset!");

401

402

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404 for (unsigned i = 0; i < NumBytes; ++i) {

407 }

408}

409

411 unsigned Type;

413#define ELF_RELOC(X, Y) .Case(#X, Y)

414#include "llvm/BinaryFormat/ELFRelocs/AVR.def"

415#undef ELF_RELOC

416 .Case("BFD_RELOC_NONE", ELF::R_AVR_NONE)

417 .Case("BFD_RELOC_16", ELF::R_AVR_16)

418 .Case("BFD_RELOC_32", ELF::R_AVR_32)

420 if (Type != -1u)

422 return std::nullopt;

423}

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433 {"fixup_32", 0, 32, 0},

434

435 {"fixup_7_pcrel", 3, 7, 0},

436 {"fixup_13_pcrel", 0, 12, 0},

437

438 {"fixup_16", 0, 16, 0},

439 {"fixup_16_pm", 0, 16, 0},

440

441 {"fixup_ldi", 0, 8, 0},

442

443 {"fixup_lo8_ldi", 0, 8, 0},

444 {"fixup_hi8_ldi", 0, 8, 0},

445 {"fixup_hh8_ldi", 0, 8, 0},

446 {"fixup_ms8_ldi", 0, 8, 0},

447

448 {"fixup_lo8_ldi_neg", 0, 8, 0},

449 {"fixup_hi8_ldi_neg", 0, 8, 0},

450 {"fixup_hh8_ldi_neg", 0, 8, 0},

451 {"fixup_ms8_ldi_neg", 0, 8, 0},

452

453 {"fixup_lo8_ldi_pm", 0, 8, 0},

454 {"fixup_hi8_ldi_pm", 0, 8, 0},

455 {"fixup_hh8_ldi_pm", 0, 8, 0},

456

457 {"fixup_lo8_ldi_pm_neg", 0, 8, 0},

458 {"fixup_hi8_ldi_pm_neg", 0, 8, 0},

459 {"fixup_hh8_ldi_pm_neg", 0, 8, 0},

460

461 {"fixup_call", 0, 22, 0},

462

463 {"fixup_6", 0, 16, 0},

464 {"fixup_6_adiw", 0, 6, 0},

465

466 {"fixup_lo8_ldi_gs", 0, 8, 0},

467 {"fixup_hi8_ldi_gs", 0, 8, 0},

468

469 {"fixup_8", 0, 8, 0},

470 {"fixup_8_lo8", 0, 8, 0},

471 {"fixup_8_hi8", 0, 8, 0},

472 {"fixup_8_hlo8", 0, 8, 0},

473

474 {"fixup_diff8", 0, 8, 0},

475 {"fixup_diff16", 0, 16, 0},

476 {"fixup_diff32", 0, 32, 0},

477

478 {"fixup_lds_sts_16", 0, 16, 0},

479

480 {"fixup_port6", 0, 16, 0},

481 {"fixup_port5", 3, 5, 0},

482 };

483

484

485

487 return {};

488

491

493 "Invalid kind!");

494

496}

497

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501

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503 assert((Count % 2) == 0 && "NOP instructions must be 2 bytes");

504

506 return true;

507}

508

511 switch ((unsigned)Fixup.getKind()) {

512 default:

513 return false;

514

518 return true;

519 }

520}

521

527

528}

unsigned const MachineRegisterInfo * MRI

assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")

static constexpr unsigned long long mask(BlockVerifier::State S)

Analysis containing CSE Info

PowerPC TLS Dynamic Call Fixup

This file implements the StringSwitch template, which mimics a switch() statement whose cases are str...

Utilities for manipulating generated AVR machine code.

MCFixupKindInfo getFixupKindInfo(MCFixupKind Kind) const override

Get information on a fixup kind.

Definition AVRAsmBackend.cpp:425

bool forceRelocation(const MCFragment &F, const MCFixup &Fixup, const MCValue &Target)

Definition AVRAsmBackend.cpp:509

std::unique_ptr< MCObjectTargetWriter > createObjectTargetWriter() const override

Definition AVRAsmBackend.cpp:366

void applyFixup(const MCFragment &, const MCFixup &, const MCValue &Target, uint8_t *Data, uint64_t Value, bool IsResolved) override

Definition AVRAsmBackend.cpp:370

void adjustFixupValue(const MCFixup &Fixup, const MCValue &Target, uint64_t &Value, MCContext *Ctx=nullptr) const

Definition AVRAsmBackend.cpp:248

std::optional< MCFixupKind > getFixupKind(StringRef Name) const override

Map a relocation name used in .reloc to a fixup kind.

Definition AVRAsmBackend.cpp:410

bool writeNopData(raw_ostream &OS, uint64_t Count, const MCSubtargetInfo *STI) const override

Write an (optimal) nop sequence of Count bytes to the given output.

Definition AVRAsmBackend.cpp:498

Generic interface to target specific assembler backends.

virtual MCFixupKindInfo getFixupKindInfo(MCFixupKind Kind) const

Get information on a fixup kind.

MCContext & getContext() const

Context object for machine code objects.

static uint8_t getOSABI(Triple::OSType OSType)

Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...

MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...

Generic base class for all target subtargets.

bool hasFeature(unsigned Feature) const

const Triple & getTargetTriple() const

static MCValue get(const MCSymbol *SymA, const MCSymbol *SymB=nullptr, int64_t Val=0, uint32_t Specifier=0)

StringRef - Represent a constant reference to a string, i.e.

A switch()-like statement whose cases are string literals.

StringSwitch & Case(StringLiteral S, T Value)

Target - Wrapper for Target specific information.

OSType getOS() const

Get the parsed operating system type of this triple.

The instances of the Type class are immutable: once they are created, they are never changed.

LLVM Value Representation.

This class implements an extremely fast bulk output stream that can only output to a stream.

raw_ostream & write_zeros(unsigned NumZeros)

write_zeros - Insert 'NumZeros' nulls.

#define llvm_unreachable(msg)

Marks that the current location is not supposed to be reachable.

Fixups relating to the LDI instruction.

Definition AVRAsmBackend.cpp:201

static void ms8(unsigned Size, const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx)

Definition AVRAsmBackend.cpp:236

static void hi8(unsigned Size, const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx)

Definition AVRAsmBackend.cpp:224

static void neg(uint64_t &Value)

Definition AVRAsmBackend.cpp:216

static void lo8(unsigned Size, const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx)

Definition AVRAsmBackend.cpp:218

static void hh8(unsigned Size, const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx)

Definition AVRAsmBackend.cpp:230

static void fixup(unsigned Size, const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx)

Adjusts a value to fix up the immediate of an LDI Rd, K instruction.

Definition AVRAsmBackend.cpp:208

Definition AVRAsmBackend.cpp:29

static void unsigned_width(unsigned Width, uint64_t Value, std::string Description, const MCFixup &Fixup, MCContext *Ctx)

Definition AVRAsmBackend.cpp:33

static void adjustBranch(unsigned Size, const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx)

Adjusts the value of a branch target before fixup application.

Definition AVRAsmBackend.cpp:49

static void fixup_lds_sts_16(const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx)

7-bit data space address fixup for the LDS/STS instructions on AVRTiny.

Definition AVRAsmBackend.cpp:190

static void fixup_6(const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx)

6-bit fixup for the immediate operand of the STD/LDD family of instructions.

Definition AVRAsmBackend.cpp:146

static void fixup_6_adiw(const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx)

6-bit fixup for the immediate operand of the ADIW family of instructions.

Definition AVRAsmBackend.cpp:157

static void fixup_port5(const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx)

5-bit port number fixup on the SBIC family of instructions.

Definition AVRAsmBackend.cpp:168

static void fixup_port6(const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx)

6-bit port number fixup on the IN family of instructions.

Definition AVRAsmBackend.cpp:180

static void fixup_7_pcrel(unsigned Size, const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx)

7-bit PC-relative fixup.

Definition AVRAsmBackend.cpp:115

static void fixup_13_pcrel(unsigned Size, const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx)

12-bit PC-relative fixup.

Definition AVRAsmBackend.cpp:131

static void fixup_call(unsigned Size, const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx)

22-bit absolute fixup.

Definition AVRAsmBackend.cpp:99

static void pm(uint64_t &Value)

Adjusts a program memory address.

Definition AVRAsmBackend.cpp:198

static bool adjustRelativeBranch(unsigned Size, const MCFixup &Fixup, uint64_t &Value, const MCSubtargetInfo *STI)

Adjusts the value of a relative branch target before fixup application.

Definition AVRAsmBackend.cpp:60

void adjustBranchTarget(T &val)

Adjusts the value of a branch target.

@ fixup_16_pm

A 16-bit program memory address.

@ fixup_16

A 16-bit address.

@ fixup_call

A 22-bit fixup for the target of a CALL k or JMP k instruction.

@ fixup_hh8_ldi

Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a 24-bit value ...

@ fixup_ms8_ldi_neg

Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a negated 32-bi...

@ fixup_lo8_ldi_neg

Replaces the immediate operand of a 16-bit Rd, K instruction with the lower 8 bits of a negated 16-bi...

@ fixup_6_adiw

A symbol+addr fixup for the `LDD +, " family of instructions.

@ fixup_ms8_ldi

Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a 32-bit value ...

@ fixup_7_pcrel

A 7-bit PC-relative fixup for the family of conditional branches which take 7-bit targets (BRNE,...

@ fixup_ldi

Replaces the 8-bit immediate with another value.

@ fixup_lo8_ldi

Replaces the immediate operand of a 16-bit Rd, K instruction with the lower 8 bits of a 16-bit value ...

@ fixup_hi8_ldi_pm_neg

Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a negated 16-bi...

@ fixup_hi8_ldi

Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a 16-bit value ...

@ fixup_lo8_ldi_pm

Replaces the immediate operand of a 16-bit Rd, K instruction with the lower 8 bits of a 16-bit progra...

@ fixup_port6

A 6-bit port address.

@ fixup_hh8_ldi_neg

Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a negated 24-bi...

@ fixup_hh8_ldi_pm

Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a 24-bit progra...

@ fixup_port5

A 5-bit port address.

@ fixup_lo8_ldi_pm_neg

Replaces the immediate operand of a 16-bit Rd, K instruction with the lower 8 bits of a negated 16-bi...

@ fixup_hi8_ldi_pm

Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a 16-bit progra...

@ fixup_hh8_ldi_pm_neg

Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a negated 24-bi...

@ fixup_13_pcrel

A 12-bit PC-relative fixup for the family of branches which take 12-bit targets (RJMP,...

@ fixup_hi8_ldi_neg

Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a negated 16-bi...

bool isRelocation(MCFixupKind FixupKind)

This is an optimization pass for GlobalISel generic memory operations.

constexpr uint64_t maxUIntN(uint64_t N)

Gets the maximum value for a N-bit unsigned integer.

constexpr bool isUIntN(unsigned N, uint64_t x)

Checks if an unsigned integer fits into the given (dynamic) bit width.

uint16_t MCFixupKind

Extensible enumeration to represent the type of a fixup.

FunctionAddr VTableAddr Count

std::unique_ptr< MCObjectTargetWriter > createAVRELFObjectWriter(uint8_t OSABI)

Creates an ELF object writer for AVR.

@ FirstLiteralRelocationKind

@ FK_Data_8

A eight-byte fixup.

@ FK_Data_1

A one-byte fixup.

@ FK_Data_4

A four-byte fixup.

@ FK_Data_2

A two-byte fixup.

FunctionAddr VTableAddr uintptr_t uintptr_t Data

constexpr bool isIntN(unsigned N, int64_t x)

Checks if an signed integer fits into the given (dynamic) bit width.

MCAsmBackend * createAVRAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const llvm::MCTargetOptions &TO)

Creates an assembly backend for AVR.

Definition AVRAsmBackend.cpp:522

Target independent information on a fixup kind.

uint8_t TargetSize

The number of bits written by this fixup.