FunctionLoweringInfo.cpp Source File (original) (raw)

38#include

39using namespace llvm;

41#define DEBUG_TYPE "function-lowering-info"

47 if (I->use_empty()) return false;

48 if (isa(I)) return true;

50 for (const User *U : I->users())

51 if (cast(U)->getParent() != BB || isa(U))

52 return true;

54 return false;

55}

66 unsigned NumOfSigned = 0, NumOfUnsigned = 0;

67 for (const Use &U : I->uses()) {

68 if (const auto *CI = dyn_cast(U.getUser())) {

69 NumOfSigned += CI->isSigned();

70 NumOfUnsigned += CI->isUnsigned();

71 }

72 if (const auto *CallI = dyn_cast(U.getUser())) {

73 if (!CallI->isArgOperand(&U))

74 continue;

75 unsigned ArgNo = CallI->getArgOperandNo(&U);

76 NumOfUnsigned += CallI->paramHasAttr(ArgNo, Attribute::ZExt);

77 NumOfSigned += CallI->paramHasAttr(ArgNo, Attribute::SExt);

78 }

79 }

80 if (NumOfSigned > NumOfUnsigned)

83 return ExtendKind;

84}

88 Fn = &fn;

89 MF = &mf;

103

104

109

117

118

121 if (const AllocaInst *AI = H.CatchObj.Alloca)

122 CatchObjects[AI].push_back(&H.CatchObj.FrameIndex);

123 else

124 H.CatchObj.FrameIndex = INT_MAX;

125 }

126 }

127 }

128

129

130

131

135 if (const AllocaInst *AI = dyn_cast(&I)) {

136 Type *Ty = AI->getAllocatedType();

137 Align Alignment = AI->getAlign();

138

139

140

141

142 if (AI->isStaticAlloca() &&

144 const ConstantInt *CUI = cast(AI->getArraySize());

147

148 TySize *= CUI->getZExtValue();

149 if (TySize == 0) TySize = 1;

150 int FrameIndex = INT_MAX;

151 auto Iter = CatchObjects.find(AI);

154 TySize, 0, false, true);

156 } else {

158 false, AI);

159 }

160

161

162

163

167

169

170 if (Iter != CatchObjects.end()) {

171 for (int *CatchObjPtr : Iter->second)

172 *CatchObjPtr = FrameIndex;

173 }

174 } else {

175

176

177

178

180 Alignment <= StackAlign ? Align(1) : Alignment, AI);

181 }

182 } else if (auto *Call = dyn_cast(&I)) {

183

184 if (Call->isInlineAsm()) {

187 std::vectorTargetLowering::AsmOperandInfo Ops =

189 *Call);

192

194 std::pair<unsigned, const TargetRegisterClass *> PhysReg =

196 Op.ConstraintVT);

197 if (PhysReg.first == SP)

199 }

200 }

201 }

202 if (const auto *II = dyn_cast(&I)) {

203 switch (II->getIntrinsicID()) {

204 case Intrinsic::vastart:

205

206

207

209 break;

210 case Intrinsic::fake_use:

211

212

214 break;

215 default:

216 break;

217 }

218 }

219

220

221

222 if (const auto *CI = dyn_cast(&I)) {

223 if (CI->isMustTailCall() && Fn->isVarArg())

225 }

226

227

228 if (Call->hasFnAttr(Attribute::ReturnsTwice))

230 }

231

232

233

235 if (!isa(I) || StaticAllocaMap .count(cast(&I)))

237

238

239

242 }

243 }

244

245

246

247

250

251

252 if (BB.isEHPad()) {

253 const Instruction *PadInst = BB.getFirstNonPHI();

254

255

256

257

258 if (!isa(PadInst)) {

262 }

263 if (isa(PadInst)) {

264 assert(&*BB.begin() == PadInst &&

265 "WinEHPrepare failed to remove PHIs from imaginary BBs");

266 continue;

267 }

268 if (isa(PadInst) &&

270 assert(&*BB.begin() == PadInst && "WinEHPrepare failed to demote PHIs");

271 }

272

276

277

278

279

280 if (BB.hasAddressTaken())

282

283

284 if (BB.isEHPad())

286

287

288

289 for (const PHINode &PN : BB.phis()) {

290 if (PN.use_empty())

291 continue;

292

293

294 if (PN.getType()->isEmptyTy())

295 continue;

296

298 unsigned PHIReg = ValueMap[&PN];

299 assert(PHIReg && "PHI node does not have an assigned virtual register!");

300

303 for (EVT VT : ValueVTs) {

306 for (unsigned i = 0; i != NumRegisters; ++i)

307 BuildMI(MBB, DL, TII->get(TargetOpcode::PHI), PHIReg + i);

308 PHIReg += NumRegisters;

309 }

310 }

311 }

312

315

316

319 if (H.Handler)

320 H.Handler = getMBB(cast<const BasicBlock *>(H.Handler));

321 }

322 }

327 UME.Handler = getMBB(cast<const BasicBlock *>(UME.Handler));

333

334

337 const auto *Src = cast<const BasicBlock *>(KV.first);

338 const auto *Dest = cast<const BasicBlock *>(KV.second);

340 }

344 const auto *Dest = cast<const BasicBlock *>(KV.first);

347 for (const auto P : KV.second)

348 UnwindDestToSrcs[DestMBB].insert(getMBB(cast<const BasicBlock *>(P)));

349 }

351 }

352}

353

354

355

356

362 LiveOutRegInfo.clear();

374}

375

376

379}

380

381

382

383

384

385

386

387

391

393 for (EVT ValueVT : ValueVTs) {

395

397 for (unsigned i = 0; i != NumRegs; ++i) {

399 if (!FirstReg) FirstReg = R;

400 }

401 }

402 return FirstReg;

403}

404

408}

409

411

412 if (V->getType()->isTokenTy() && !isa(V))

413 return 0;

415 assert(R == Register() && "Already initialized this value register!");

418}

419

420

421

422

423

424

427 if (!LiveOutRegInfo.inBounds(Reg))

428 return nullptr;

429

432 return nullptr;

433

437 }

438

439 return LOI;

440}

441

442

443

447 return;

448

452 "PHIs with non-vector integer types should have a single VT.");

453 EVT IntVT = ValueVTs[0];

454

456 return;

459

462 return;

463

464 Register DestReg = It->second;

465 if (DestReg == 0)

466 return;

468 LiveOutRegInfo.grow(DestReg);

469 LiveOutInfo &DestLOI = LiveOutRegInfo[DestReg];

470

472 if (isa(V) || isa(V)) {

475 return;

476 }

477

478 if (ConstantInt *CI = dyn_cast(V)) {

482 else

486 } else {

487 assert(ValueMap.count(V) && "V should have been placed in ValueMap when its"

488 "CopyToReg node was created.");

492 return;

493 }

495 if (!SrcLOI) {

497 return;

498 }

499 DestLOI = *SrcLOI;

500 }

501

504 "Masks should have the same bit width as the type.");

505

508 if (isa(V) || isa(V)) {

511 return;

512 }

513

514 if (ConstantInt *CI = dyn_cast(V)) {

518 else

523 continue;

524 }

525

526 assert(ValueMap.count(V) && "V should have been placed in ValueMap when "

527 "its CopyToReg node was created.");

531 return;

532 }

534 if (!SrcLOI) {

536 return;

537 }

540 }

541}

542

543

544

545

547 int FI) {

549}

550

551

552

553

557 return I->second;

558 LLVM_DEBUG(dbgs() << "Argument does not have assigned frame index!\n");

559 return INT_MAX;

560}

561

566 Register &VReg = I.first->second;

567 if (I.second)

568 VReg = MRI.createVirtualRegister(RC);

569 assert(VReg && "null vreg in exception pointer table!");

570 return VReg;

571}

572

578 ValueVTs.clear();

580 P.first->getType(), ValueVTs);

581 unsigned Reg = P.second;

582 for (EVT VT : ValueVTs) {

584 for (unsigned i = 0, e = NumRegisters; i != e; ++i)

586 }

587 }

588 }

590}

unsigned const MachineRegisterInfo * MRI

This file implements a class to represent arbitrary precision integral constant values and operations...

MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL

static const Function * getParent(const Value *V)

static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")

static ISD::NodeType getPreferredExtendForValue(const Instruction *I)

static bool isUsedOutsideOfDefiningBlock(const Instruction *I)

isUsedOutsideOfDefiningBlock - Return true if this instruction is used by PHI nodes or outside of the...

const HexagonInstrInfo * TII

unsigned const TargetRegisterInfo * TRI

uint64_t IntrinsicInst * II

assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())

This file describes how to lower LLVM code to machine code.

LLVM IR instance of the generic uniformity analysis.

Class for arbitrary precision integers.

APInt zext(unsigned width) const

Zero extend to a new width.

unsigned getBitWidth() const

Return the number of bits in the APInt.

unsigned getNumSignBits() const

Computes the number of leading bits of this APInt that are equal to its sign bit.

APInt sext(unsigned width) const

Sign extend to a new width.

an instruction to allocate memory on the stack

This class represents an incoming formal argument to a Function.

LLVM Basic Block Representation.

void clear()

clear - Removes all bits from the bitvector.

This is the shared class of boolean and integer constants.

uint64_t getZExtValue() const

Return the constant as a 64-bit unsigned integer value after it has been zero extended as appropriate...

This class represents an Operation in the Expression.

TypeSize getTypeAllocSize(Type *Ty) const

Returns the offset in bytes between successive objects of the specified type, including alignment pad...

iterator find(const_arg_type_t< KeyT > Val)

std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)

SmallPtrSet< const DbgVariableRecord *, 8 > PreprocessedDVRDeclares

void clear()

clear - Clear out all the function-specific state.

MachineBasicBlock * getMBB(const BasicBlock *BB) const

DenseSet< Register > RegsWithFixups

void setArgumentFrameIndex(const Argument *A, int FI)

setArgumentFrameIndex - Record frame index for the byval argument.

SmallVector< bool > VisitedBBs

The set of basic blocks visited thus far by instruction selection.

BitVector DescribedArgs

Bitvector with a bit set if corresponding argument is described in ArgDbgValues.

DenseMap< const AllocaInst *, int > StaticAllocaMap

StaticAllocaMap - Keep track of frame indices for fixed sized allocas in the entry block.

const UniformityInfo * UA

DenseMap< const Instruction *, StatepointSpillMapTy > StatepointRelocationMaps

int getArgumentFrameIndex(const Argument *A)

getArgumentFrameIndex - Get frame index for the byval argument.

const LiveOutInfo * GetLiveOutRegInfo(Register Reg)

GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the register is a PHI destinat...

SmallPtrSet< const DbgDeclareInst *, 8 > PreprocessedDbgDeclares

Collection of dbg.declare instructions handled after argument lowering and before ISel proper.

SmallVector< unsigned, 50 > StatepointStackSlots

StatepointStackSlots - A list of temporary stack slots (frame indices) used to spill values at a stat...

void set(const Function &Fn, MachineFunction &MF, SelectionDAG *DAG)

set - Initialize this FunctionLoweringInfo with the given Function and its associated MachineFunction...

MachineBasicBlock * MBB

MBB - The current block.

DenseMap< const Argument *, int > ByValArgFrameIndexMap

ByValArgFrameIndexMap - Keep track of frame indices for byval arguments.

DenseMap< Register, Register > RegFixups

RegFixups - Registers which need to be replaced after isel is done.

SmallVector< MachineInstr *, 8 > ArgDbgValues

ArgDbgValues - A list of DBG_VALUE instructions created during isel for function arguments that are i...

void ComputePHILiveOutRegInfo(const PHINode *)

ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination register based on the LiveOutI...

SmallVector< MachineBasicBlock * > MBBMap

A mapping from LLVM basic block number to their machine block.

const TargetLowering * TLI

const Value * getValueFromVirtualReg(Register Vreg)

This method is called from TargetLowerinInfo::isSDNodeSourceOfDivergence to get the Value correspondi...

DenseMap< Register, const Value * > VirtReg2Value

VirtReg2Value map is needed by the Divergence Analysis driven instruction selection.

MachineRegisterInfo * RegInfo

CreateReg - Allocate a single virtual register for the given type.

bool CanLowerReturn

CanLowerReturn - true iff the function's return value can be lowered to registers.

DenseMap< const Value *, ISD::NodeType > PreferredExtendType

Record the preferred extend type (ISD::SIGN_EXTEND or ISD::ZERO_EXTEND) for a value.

DenseMap< const Value *, Register > CatchPadExceptionPointers

Track virtual registers created for exception pointers.

const DataLayout & getDataLayout() const

Get the data layout of the module this function belongs to.

unsigned getMaxBlockNumber() const

Return a value larger than the largest block number.

CallingConv::ID getCallingConv() const

getCallingConv()/setCallingConv(CC) - These method get and set the calling convention of this functio...

bool hasPersonalityFn() const

Check whether this function has a personality function.

Constant * getPersonalityFn() const

Get the personality function associated with this function.

AttributeList getAttributes() const

Return the attribute list for this Function.

LLVMContext & getContext() const

getContext - Return a reference to the LLVMContext associated with this function.

Type * getReturnType() const

Returns the type of the ret val.

bool isVarArg() const

isVarArg - Return true if this function takes a variable number of arguments.

bool isDivergent(ConstValueRefT V) const

Whether V is divergent at its definition.

void setAddressTakenIRBlock(BasicBlock *BB)

Set this block to reflect that it corresponds to an IR-level basic block with a BlockAddress.

void setIsEHPad(bool V=true)

Indicates the block is a landing pad.

int CreateFixedObject(uint64_t Size, int64_t SPOffset, bool IsImmutable, bool isAliased=false)

Create a new object at a fixed location on the stack.

int CreateStackObject(uint64_t Size, Align Alignment, bool isSpillSlot, const AllocaInst *Alloca=nullptr, uint8_t ID=0)

Create a new statically sized stack object, returning a nonnegative identifier to represent it.

void setStackID(int ObjectIdx, uint8_t ID)

void setHasOpaqueSPAdjustment(bool B)

int CreateVariableSizedObject(Align Alignment, const AllocaInst *Alloca)

Notify the MachineFrameInfo object that a variable sized object has been created.

void setHasVAStart(bool B)

void setHasMustTailInVarArgFunc(bool B)

void setObjectAlignment(int ObjectIdx, Align Alignment)

setObjectAlignment - Change the alignment of the specified stack object.

const WinEHFuncInfo * getWinEHFuncInfo() const

getWinEHFuncInfo - Return information about how the current function uses Windows exception handling.

void setHasEHFunclets(bool V)

void setExposesReturnsTwice(bool B)

setCallsSetJmp - Set a flag that indicates if there's a call to a "returns twice" function.

const TargetSubtargetInfo & getSubtarget() const

getSubtarget - Return the subtarget for which this machine code is being compiled.

MachineFrameInfo & getFrameInfo()

getFrameInfo - Return the frame info object for the current function.

void push_back(MachineBasicBlock *MBB)

void setHasFakeUses(bool V)

MachineRegisterInfo & getRegInfo()

getRegInfo - Return information about the registers currently in use.

const DataLayout & getDataLayout() const

Return the DataLayout attached to the Module associated to this MF.

const WasmEHFuncInfo * getWasmEHFuncInfo() const

getWasmEHFuncInfo - Return information about how the current function uses Wasm exception handling.

void setHasEHScopes(bool V)

MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *BB=nullptr, std::optional< UniqueBBID > BBID=std::nullopt)

CreateMachineBasicBlock - Allocate a new MachineBasicBlock.

MachineRegisterInfo - Keep track of information for virtual and physical registers,...

createVirtualRegister - Create and return a new virtual register in the function with the specified r...

Value * getIncomingValue(unsigned i) const

Return incoming value number x.

unsigned getNumIncomingValues() const

Return the number of incoming edges.

Wrapper class representing virtual and physical registers.

constexpr bool isVirtual() const

Return true if the specified register number is in the virtual register namespace.

Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.

This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...

const UniformityInfo * getUniformityInfo() const

CodeGenOptLevel getOptLevel() const

SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.

This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.

Information about stack frame layout on the target.

bool isStackRealignable() const

isStackRealignable - This method returns whether the stack can be realigned.

virtual TargetStackID::Value getStackIDForScalableVectors() const

Returns the StackID that scalable vectors should be associated with.

Align getStackAlign() const

getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligne...

TargetInstrInfo - Interface to description of machine instruction set.

virtual bool requiresUniformRegister(MachineFunction &MF, const Value *) const

Allows target to decide about the register class of the specific value that is live outside the defin...

virtual const TargetRegisterClass * getRegClassFor(MVT VT, bool isDivergent=false) const

Return the register class that should be used for the specified value type.

virtual bool needsFixedCatchObjects() const

virtual unsigned getNumRegisters(LLVMContext &Context, EVT VT, std::optional< MVT > RegisterVT=std::nullopt) const

Return the number of registers that this ValueType will eventually require.

If a physical register, this specifies the register that llvm.savestack/llvm.restorestack should save...

virtual bool signExtendConstant(const ConstantInt *C) const

Return true if this constant should be sign extended when promoting to a larger type.

MVT getRegisterType(MVT VT) const

Return the type of registers that this ValueType will eventually require.

virtual std::pair< unsigned, const TargetRegisterClass * > getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, StringRef Constraint, MVT VT) const

Given a physical register constraint (e.g.

virtual AsmOperandInfoVector ParseConstraints(const DataLayout &DL, const TargetRegisterInfo *TRI, const CallBase &Call) const

Split up the constraint string from the inline assembly value into the specific constraints and their...

virtual void ComputeConstraintToUse(AsmOperandInfo &OpInfo, SDValue Op, SelectionDAG *DAG=nullptr) const

Determines the constraint code and constraint type to use for the specific AsmOperandInfo,...

virtual bool CanLowerReturn(CallingConv::ID, MachineFunction &, bool, const SmallVectorImpl< ISD::OutputArg > &, LLVMContext &, const Type *RetTy) const

This hook should be implemented to check whether the return values described by the Outs array can fi...

TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...

virtual const TargetRegisterInfo * getRegisterInfo() const

getRegisterInfo - If register information is available, return it.

virtual const TargetFrameLowering * getFrameLowering() const

virtual const TargetInstrInfo * getInstrInfo() const

virtual const TargetLowering * getTargetLowering() const

The instances of the Type class are immutable: once they are created, they are never changed.

bool isVectorTy() const

True if this is an instance of VectorType.

bool isScalableTy(SmallPtrSetImpl< const Type * > &Visited) const

Return true if this is a type whose size is a known multiple of vscale.

LLVMContext & getContext() const

Return the LLVMContext in which this type was uniqued.

bool isIntegerTy() const

True if this is an instance of IntegerType.

A Use represents the edge between a Value definition and its users.

size_type count(const KeyT &Val) const

Return 1 if the specified key is in the map, 0 otherwise.

iterator find(const KeyT &Val)

LLVM Value Representation.

Type * getType() const

All values are typed, get the type of this value.

LLVMContext & getContext() const

All values hold a context through their type.

constexpr ScalarTy getKnownMinValue() const

Returns the minimum value this quantity can represent.

NodeType

ISD::NodeType enum - This enum defines the target-independent operators for a SelectionDAG.

@ ANY_EXTEND

ANY_EXTEND - Used for integer types. The high bits are undefined.

@ SIGN_EXTEND

Conversion operators.

This is an optimization pass for GlobalISel generic memory operations.

void GetReturnInfo(CallingConv::ID CC, Type *ReturnType, AttributeList attr, SmallVectorImpl< ISD::OutputArg > &Outs, const TargetLowering &TLI, const DataLayout &DL)

Given an LLVM IR type and return type attributes, compute the return value EVTs and flags,...

MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)

Builder interface. Specify how to create the initial instruction itself.

void calculateWinCXXEHStateNumbers(const Function *ParentFn, WinEHFuncInfo &FuncInfo)

Analyze the IR in ParentFn and it's handlers to build WinEHFuncInfo, which describes the state number...

raw_ostream & dbgs()

dbgs() - This returns a reference to a raw_ostream for debugging messages.

EHPersonality classifyEHPersonality(const Value *Pers)

See if the given exception handling personality function is one that we understand.

bool isFuncletEHPersonality(EHPersonality Pers)

Returns true if this is a personality function that invokes handler funclets (which must return to it...

void calculateSEHStateNumbers(const Function *ParentFn, WinEHFuncInfo &FuncInfo)

void ComputeValueVTs(const TargetLowering &TLI, const DataLayout &DL, Type *Ty, SmallVectorImpl< EVT > &ValueVTs, SmallVectorImpl< EVT > *MemVTs, SmallVectorImpl< TypeSize > *Offsets=nullptr, TypeSize StartingOffset=TypeSize::getZero())

ComputeValueVTs - Given an LLVM IR type, compute a sequence of EVTs that represent all the individual...

bool isAsynchronousEHPersonality(EHPersonality Pers)

Returns true if this personality function catches asynchronous exceptions.

constexpr unsigned BitWidth

void calculateWasmEHInfo(const Function *F, WasmEHFuncInfo &EHInfo)

void calculateClrEHStateNumbers(const Function *Fn, WinEHFuncInfo &FuncInfo)

This struct is a compact representation of a valid (non-zero power of two) alignment.

TypeSize getSizeInBits() const

Return the size of the specified value type in bits.

static KnownBits makeConstant(const APInt &C)

Create known bits from a known constant.

unsigned getBitWidth() const

Get the bit width of this value.

KnownBits intersectWith(const KnownBits &RHS) const

Returns KnownBits information that is known to be true for both this and RHS.

KnownBits anyext(unsigned BitWidth) const

Return known bits for an "any" extension of the value we're tracking, where we don't know anything ab...

Similar to CxxUnwindMapEntry, but supports SEH filters.

This contains information for each constraint that we are lowering.

DenseMap< BBOrMBB, SmallPtrSet< BBOrMBB, 4 > > UnwindDestToSrcs

DenseMap< BBOrMBB, BBOrMBB > SrcToUnwindDest

SmallVector< SEHUnwindMapEntry, 4 > SEHUnwindMap

SmallVector< ClrEHUnwindMapEntry, 4 > ClrEHUnwindMap

SmallVector< WinEHTryBlockMapEntry, 4 > TryBlockMap

SmallVector< CxxUnwindMapEntry, 4 > CxxUnwindMap

SmallVector< WinEHHandlerType, 1 > HandlerArray