LiveIntervalCalc.cpp Source File (original) (raw)

22#include

24using namespace llvm;

26#define DEBUG_TYPE "regalloc"

46 assert(MRI && Indexes && "call reset() first");

53 for (const MachineOperand &MO : MRI->reg_nodbg_operands(Reg)) {

54 if (!MO.isDef() && !MO.readsReg())

55 continue;

57 unsigned SubReg = MO.getSubReg();

60 : MRI->getMaxLaneMaskForVReg(Reg);

64 LaneBitmask ClassMask = MRI->getMaxLaneMaskForVReg(Reg);

66 }

69 *Alloc, SubMask,

71 if (MO.isDef())

73 },

74 *Indexes, TRI);

75 }

81 }

94 SubLIC.reset(MF, Indexes, DomTree, Alloc);

95 SubLIC.extendToUses(S, Reg, S.LaneMask, &LI);

96 }

99 } else {

102 }

103}

104

106

109 "Expect empty main liverange");

110

113 for (const VNInfo *VNI : SR.valnos) {

116 }

117 }

120}

121

126 assert(MRI && Indexes && "call reset() first");

127

128

129

132}

133

139 if (LI != nullptr)

141

142

143 bool IsSubRange = !Mask.all();

146

147

148 if (MO.isUse())

149 MO.setIsKill(false);

150

151

152

153

154 if (!MO.readsReg() || (IsSubRange && MO.isDef()))

155 continue;

156

157 unsigned SubReg = MO.getSubReg();

160 if (MO.isDef())

161 SLM = ~SLM;

162

163 if ((SLM & Mask).none())

164 continue;

165 }

166

167

169 unsigned OpNo = (&MO - &MI->getOperand(0));

171 if (MI->isPHI()) {

172 assert(!MO.isDef() && "Cannot handle PHI def of partial register.");

173

174

175 UseIdx = Indexes->getMBBEndIdx(MI->getOperand(OpNo + 1).getMBB());

176 } else {

177

178 bool isEarlyClobber = false;

179 unsigned DefIdx;

180 if (MO.isDef())

181 isEarlyClobber = MO.isEarlyClobber();

182 else if (MI->isRegTiedToDefOperand(OpNo, &DefIdx)) {

183

184

185 isEarlyClobber = MI->getOperand(DefIdx).isEarlyClobber();

186 }

187 UseIdx = Indexes->getInstructionIndex(*MI).getRegSlot(isEarlyClobber);

188 }

189

190

191

193 }

194}

unsigned const MachineRegisterInfo * MRI

assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")

AMDGPU Prepare AGPR Alloc

A common definition of LaneBitmask for use in TableGen and CodeGen.

static VNInfo UndefVNI(0xbad, SlotIndex())

static void createDeadDef(SlotIndexes &Indexes, VNInfo::Allocator &Alloc, LiveRange &LR, const MachineOperand &MO)

Definition LiveIntervalCalc.cpp:31

This file defines the SmallVector class.

LLVM_ABI void createDeadDefs(LiveRange &LR, Register Reg)

createDeadDefs - Create a dead def in LI for every def operand of Reg.

Definition LiveIntervalCalc.cpp:122

LiveIntervalCalc()=default

LLVM_ABI void calculate(LiveInterval &LI, bool TrackSubRegs)

Calculates liveness for the register specified in live interval LI.

Definition LiveIntervalCalc.cpp:41

LLVM_ABI void constructMainRangeFromSubranges(LiveInterval &LI)

For live interval LI with correct SubRanges construct matching information for the main live range.

Definition LiveIntervalCalc.cpp:105

A live range for subregisters.

LiveInterval - This class represents the liveness of a register, or stack slot.

LLVM_ABI void removeEmptySubRanges()

Removes all subranges without any segments (subranges without segments are not considered valid and s...

bool hasSubRanges() const

Returns true if subregister liveness information is available.

SubRange * createSubRangeFrom(BumpPtrAllocator &Allocator, LaneBitmask LaneMask, const LiveRange &CopyFrom)

Like createSubRange() but the new range is filled with a copy of the liveness information in CopyFrom...

iterator_range< subrange_iterator > subranges()

LLVM_ABI void refineSubRanges(BumpPtrAllocator &Allocator, LaneBitmask LaneMask, std::function< void(LiveInterval::SubRange &)> Apply, const SlotIndexes &Indexes, const TargetRegisterInfo &TRI, unsigned ComposeSubRegIdx=0)

Refines the subranges to support LaneMask.

LLVM_ABI void computeSubRangeUndefs(SmallVectorImpl< SlotIndex > &Undefs, LaneBitmask LaneMask, const MachineRegisterInfo &MRI, const SlotIndexes &Indexes) const

For a given lane mask LaneMask, compute indexes at which the lane is marked undefined by subregister ...

SlotIndexes * getIndexes()

MachineDominatorTree * getDomTree()

LLVM_ABI void resetLiveOutMap()

Reset Map and Seen fields.

VNInfo::Allocator * getVNAlloc()

LLVM_ABI void reset(const MachineFunction *mf, SlotIndexes *SI, MachineDominatorTree *MDT, VNInfo::Allocator *VNIA)

reset - Prepare caches for a new set of non-overlapping live ranges.

const MachineFunction * getMachineFunction()

Some getters to expose in a read-only way some private fields to subclasses.

LLVM_ABI void extend(LiveRange &LR, SlotIndex Use, Register PhysReg, ArrayRef< SlotIndex > Undefs)

Extend the live range of LR to reach Use.

const MachineRegisterInfo * getRegInfo() const

This class represents the liveness of a register, stack slot, etc.

LLVM_ABI VNInfo * createDeadDef(SlotIndex Def, VNInfo::Allocator &VNIAlloc)

createDeadDef - Make sure the range has a value defined at Def.

DominatorTree Class - Concrete subclass of DominatorTreeBase that is used to compute a normal dominat...

Representation of each machine instruction.

MachineOperand class - Representation of each machine instruction operand.

MachineInstr * getParent()

getParent - Return the instruction that this operand belongs to.

bool isEarlyClobber() const

MachineRegisterInfo - Keep track of information for virtual and physical registers,...

Wrapper class representing virtual and physical registers.

SlotIndex - An opaque wrapper around machine indexes.

SlotIndex getRegSlot(bool EC=false) const

Returns the register use/def slot in the current instruction for a normal or early-clobber def.

SlotIndex getMBBEndIdx(unsigned Num) const

Returns the index past the last valid index in the given basic block.

SlotIndex getInstructionIndex(const MachineInstr &MI, bool IgnoreBundle=false) const

Returns the base index for the given instruction.

This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.

TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...

VNInfo - Value Number Information.

BumpPtrAllocator Allocator

bool isUnused() const

Returns true if this value is unused.

SlotIndex def

The index of the defining instruction.

bool isPHIDef() const

Returns true if this value is defined by a PHI instruction (or was, PHI instructions may have been el...

This is an optimization pass for GlobalISel generic memory operations.

static constexpr LaneBitmask getAll()