LLVM: include/llvm/CodeGen/MachineOperand.h Source File (original) (raw)
1
2
3
4
5
6
7
8
9
10
11
12
13#ifndef LLVM_CODEGEN_MACHINEOPERAND_H
14#define LLVM_CODEGEN_MACHINEOPERAND_H
15
21#include
22
23namespace llvm {
24
41
42
43
44
45
46
47
48
49class MachineOperand {
50public:
76
77private:
78
79
80 unsigned OpKind : 8;
81
82
83
84
85
86 unsigned SubReg_TargetFlags : 12;
87
88
89
90
91 unsigned TiedTo : 4;
92
93
94
95
96 unsigned IsDef : 1;
97
98
99
100
101 unsigned IsImp : 1;
102
103
104
105
106
107
108
109
110
111
112 unsigned IsDeadOrKill : 1;
113
114
115 unsigned IsRenamable : 1;
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134 unsigned IsUndef : 1;
135
136
137
138
139
140
141
142
143
144
145 unsigned IsInternalRead : 1;
146
147
148
149
150 unsigned IsEarlyClobber : 1;
151
152
153
154 unsigned IsDebug : 1;
155
156
157
158
159
160 union {
163 } SmallContents;
164
165
166
168
169
170 union ContentsUnion {
171 ContentsUnion() {}
172 MachineBasicBlock *MBB;
173 const ConstantFP *CFP;
174 const ConstantInt *CI;
175 int64_t ImmVal;
176 const uint32_t *RegMask;
177 const MDNode *MD;
178 MCSymbol *Sym;
179 unsigned CFIIndex;
180 Intrinsic::ID IntrinsicID;
181 unsigned Pred;
182 ArrayRef ShuffleMask;
183 LaneBitmask LaneMask;
184
185 struct {
186
187 MachineOperand *Prev;
188 MachineOperand *Next;
189 } Reg;
190
191 struct {
192 unsigned InstrIdx;
193 unsigned OpIdx;
194 } InstrRef;
195
196
197
198 struct {
199 union {
200 int Index;
201 const char *SymbolName;
202 const GlobalValue *GV;
203 const BlockAddress *BA;
204 } Val;
205
206 int OffsetHi;
207 } OffsetedInfo;
208 } Contents;
209
211 : OpKind(K), SubReg_TargetFlags(0) {
212
213 static_assert(alignof(MachineOperand) <= alignof(int64_t),
214 "MachineOperand shouldn't be more than 8 byte aligned");
215 static_assert(sizeof(Contents) <= 2 * sizeof(void *),
216 "Contents should be at most two pointers");
217 static_assert(sizeof(MachineOperand) <=
219 3 * sizeof(void *)),
220 "MachineOperand too big. Should be Kind, SmallContents, "
221 "ParentMI, and Contents");
222 }
223
224public:
225
226
228
230 return isReg() ? 0 : SubReg_TargetFlags;
231 }
233 assert(() && "Register operands can't have target flags");
234 SubReg_TargetFlags = F;
235 assert(SubReg_TargetFlags == F && "Target flags out of range");
236 }
238 assert(() && "Register operands can't have target flags");
239 SubReg_TargetFlags |= F;
240 assert((SubReg_TargetFlags & F) && "Target flags out of range");
241 }
242
243
244
245
248
249
250
251
252
253
254
255
256
258
259
261
262
263
264
265
268
269
272
273
275
276
278 unsigned FrameIndex,
280
281
283
284
286
287
288
289
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
314 std::optional OpIdx, bool PrintDef,
315 bool IsStandalone, bool ShouldPrintRegisterTies,
316 unsigned TiedOperandIdx,
318
319
320
323
325
326
327
328
329
330
332
334
336
338
340
342
344
346
348
350
352
354
356
358
367
368
369
370
371
373 assert(isReg() && "This is not a register operand!");
374 return Register(SmallContents.RegNo);
375 }
376
378 assert(isReg() && "Wrong MachineOperand accessor");
379 return SubReg_TargetFlags;
380 }
381
383 assert(isReg() && "Wrong MachineOperand accessor");
384 return !IsDef;
385 }
386
388 assert(isReg() && "Wrong MachineOperand accessor");
389 return IsDef;
390 }
391
393 assert(isReg() && "Wrong MachineOperand accessor");
394 return IsImp;
395 }
396
398 assert(isReg() && "Wrong MachineOperand accessor");
399 return IsDeadOrKill & IsDef;
400 }
401
403 assert(isReg() && "Wrong MachineOperand accessor");
404 return IsDeadOrKill & !IsDef;
405 }
406
408 assert(isReg() && "Wrong MachineOperand accessor");
409 return IsUndef;
410 }
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
442
444 assert(isReg() && "Wrong MachineOperand accessor");
445 return IsInternalRead;
446 }
447
449 assert(isReg() && "Wrong MachineOperand accessor");
450 return IsEarlyClobber;
451 }
452
454 assert(isReg() && "Wrong MachineOperand accessor");
455 return TiedTo;
456 }
457
459 assert(isReg() && "Wrong MachineOperand accessor");
460 return IsDebug;
461 }
462
463
464
465
466
467
468
469
471 assert(isReg() && "Wrong MachineOperand accessor");
473 }
474
475
476
479 return true;
480
481
483 }
484
485
486
487
488
489
490
492
494 assert(isReg() && "Wrong MachineOperand mutator");
495 SubReg_TargetFlags = subReg;
496 assert(SubReg_TargetFlags == subReg && "SubReg out of range");
497 }
498
499
500
501
502
503
506
507
508
509
510
512
514
515
517
519 assert(isReg() && "Wrong MachineOperand mutator");
520 IsImp = Val;
521 }
522
524 assert(isReg() && !IsDef && "Wrong MachineOperand mutator");
525 assert((!Val || ()) && "Marking a debug operation as kill");
526 IsDeadOrKill = Val;
527 }
528
530 assert(isReg() && IsDef && "Wrong MachineOperand mutator");
531 IsDeadOrKill = Val;
532 }
533
535 assert(isReg() && "Wrong MachineOperand mutator");
536 IsUndef = Val;
537 }
538
540
542 assert(isReg() && "Wrong MachineOperand mutator");
543 IsInternalRead = Val;
544 }
545
547 assert(isReg() && IsDef && "Wrong MachineOperand mutator");
548 IsEarlyClobber = Val;
549 }
550
552 assert(isReg() && !IsDef && "Wrong MachineOperand mutator");
553 IsDebug = Val;
554 }
555
556
557
558
559
561 assert(isImm() && "Wrong MachineOperand accessor");
562 return Contents.ImmVal;
563 }
564
566 assert(isCImm() && "Wrong MachineOperand accessor");
567 return Contents.CI;
568 }
569
571 assert(isFPImm() && "Wrong MachineOperand accessor");
572 return Contents.CFP;
573 }
574
576 assert(isMBB() && "Wrong MachineOperand accessor");
577 return Contents.MBB;
578 }
579
582 "Wrong MachineOperand accessor");
583 return Contents.OffsetedInfo.Val.Index;
584 }
585
587 assert(isGlobal() && "Wrong MachineOperand accessor");
588 return Contents.OffsetedInfo.Val.GV;
589 }
590
593 return Contents.OffsetedInfo.Val.BA;
594 }
595
598 return Contents.Sym;
599 }
600
603 return Contents.InstrRef.InstrIdx;
604 }
605
608 return Contents.InstrRef.OpIdx;
609 }
610
613 return Contents.CFIIndex;
614 }
615
618 return Contents.IntrinsicID;
619 }
620
623 return Contents.Pred;
624 }
625
628 return Contents.ShuffleMask;
629 }
630
633 return Contents.LaneMask;
634 }
635
636
637
641 "Wrong MachineOperand accessor");
642 return int64_t(uint64_t(Contents.OffsetedInfo.OffsetHi) << 32) |
643 SmallContents.OffsetLo;
644 }
645
647 assert(isSymbol() && "Wrong MachineOperand accessor");
648 return Contents.OffsetedInfo.Val.SymbolName;
649 }
650
651
652
653
654
656
658 "Not a physical register");
659 return !(RegMask[PhysReg.id() / 32] & (1u << PhysReg.id() % 32));
660 }
661
662
666
667
668
671 return Contents.RegMask;
672 }
673
674
676 return (NumRegs + 31) / 32;
677 }
678
679
682 return Contents.RegMask;
683 }
684
687 return Contents.MD;
688 }
689
690
691
692
693
695 assert(isImm() && "Wrong MachineOperand mutator");
696 Contents.ImmVal = immVal;
697 }
698
700 assert(isCImm() && "Wrong MachineOperand mutator");
701 Contents.CI = CI;
702 }
703
705 assert(isFPImm() && "Wrong MachineOperand mutator");
706 Contents.CFP = CFP;
707 }
708
712 "Wrong MachineOperand mutator");
714 Contents.OffsetedInfo.OffsetHi = int(Offset >> 32);
715 }
716
719 "Wrong MachineOperand mutator");
720 Contents.OffsetedInfo.Val.Index = Idx;
721 }
722
725 Contents.MD = MD;
726 }
727
730 Contents.InstrRef.InstrIdx = InstrIdx;
731 }
734 Contents.InstrRef.OpIdx = OpIdx;
735 }
736
738 assert(isMBB() && "Wrong MachineOperand mutator");
739 Contents.MBB = MBB;
740 }
741
742
743
744
745
748 Contents.RegMask = RegMaskPtr;
749 }
750
753 Contents.IntrinsicID = IID;
754 }
755
760
761
762
763
764
765
766
767
769
770
771
772
773
774
775
777
778
779
780
782
783
784
785
787 unsigned TargetFlags = 0);
788
789
790 LLVM_ABI void ChangeToES(const char *SymName, unsigned TargetFlags = 0);
791
792
794 unsigned TargetFlags = 0);
795
796
798 unsigned TargetFlags = 0);
799
800
802
803
805
806
808
809
811 unsigned TargetFlags = 0);
812
813
815 unsigned TargetFlags = 0);
816
817
818
819
823
824
825
826
828
829
830
831
832
833 static MachineOperand CreateImm(int64_t Val) {
835 Op.setImm(Val);
836 return Op;
837 }
838
841 Op.Contents.CI = CI;
842 return Op;
843 }
844
847 Op.Contents.CFP = CFP;
848 return Op;
849 }
850
862 Op.IsImp = isImp;
868 Op.TiedTo = 0;
870 Op.SmallContents.RegNo = Reg.id();
871 Op.Contents.Reg.Prev = nullptr;
872 Op.Contents.Reg.Next = nullptr;
874 return Op;
875 }
877 unsigned TargetFlags = 0) {
880 Op.setTargetFlags(TargetFlags);
881 return Op;
882 }
883 static MachineOperand CreateFI(int Idx) {
885 Op.setIndex(Idx);
886 return Op;
887 }
889 unsigned TargetFlags = 0) {
891 Op.setIndex(Idx);
893 Op.setTargetFlags(TargetFlags);
894 return Op;
895 }
897 unsigned TargetFlags = 0) {
899 Op.setIndex(Idx);
901 Op.setTargetFlags(TargetFlags);
902 return Op;
903 }
904 static MachineOperand CreateJTI(unsigned Idx, unsigned TargetFlags = 0) {
906 Op.setIndex(Idx);
907 Op.setTargetFlags(TargetFlags);
908 return Op;
909 }
911 unsigned TargetFlags = 0) {
913 Op.Contents.OffsetedInfo.Val.GV = GV;
915 Op.setTargetFlags(TargetFlags);
916 return Op;
917 }
918 static MachineOperand CreateES(const char *SymName,
919 unsigned TargetFlags = 0) {
921 Op.Contents.OffsetedInfo.Val.SymbolName = SymName;
922 Op.setOffset(0);
923 Op.setTargetFlags(TargetFlags);
924 return Op;
925 }
927 unsigned TargetFlags = 0) {
929 Op.Contents.OffsetedInfo.Val.BA = BA;
931 Op.setTargetFlags(TargetFlags);
932 return Op;
933 }
934
935
936
937
938
939
940
941
942
943
944
945
947 assert(Mask && "Missing register mask");
949 Op.Contents.RegMask = Mask;
950 return Op;
951 }
953 assert(Mask && "Missing live-out register mask");
955 Op.Contents.RegMask = Mask;
956 return Op;
957 }
960 Op.Contents.MD = Meta;
961 return Op;
962 }
963
965 unsigned TargetFlags = 0) {
967 Op.Contents.Sym = Sym;
968 Op.setOffset(0);
969 Op.setTargetFlags(TargetFlags);
970 return Op;
971 }
972
975 Op.Contents.InstrRef.InstrIdx = InstrIdx;
976 Op.Contents.InstrRef.OpIdx = OpIdx;
977 return Op;
978 }
979
982 Op.Contents.CFIIndex = CFIIndex;
983 return Op;
984 }
985
988 Op.Contents.IntrinsicID = ID;
989 return Op;
990 }
991
994 Op.Contents.Pred = Pred;
995 return Op;
996 }
997
1000 Op.Contents.ShuffleMask = Mask;
1001 return Op;
1002 }
1003
1006 Op.Contents.LaneMask = LaneMask;
1007 return Op;
1008 }
1009
1012
1013private:
1014
1015
1016 void removeRegFromUses();
1017
1018
1019 enum : unsigned char {
1021 MO_Tombstone,
1022 };
1023
1025
1026
1027
1028
1029
1030
1031
1032
1033 bool isOnRegUseList() const {
1034 assert(isReg() && "Can only add reg operand to use lists");
1035 return Contents.Reg.Prev != nullptr;
1036 }
1037};
1038
1042 MachineOperand::MO_Empty));
1043 }
1046 MachineOperand::MO_Tombstone));
1047 }
1053 MachineOperand::MO_Empty) ||
1055 MachineOperand::MO_Tombstone))
1056 return LHS.getType() == RHS.getType();
1057 return LHS.isIdenticalTo(RHS);
1058 }
1059};
1060
1065
1066
1067
1069}
1070
1071#endif
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
This file defines DenseMapInfo traits for DenseMap.
A common definition of LaneBitmask for use in TableGen and CodeGen.
Register const TargetRegisterInfo * TRI
Promote Memory to Register
MachineInstr unsigned OpIdx
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
The address of a basic block.
ConstantFP - Floating Point Values [float, double].
This is the shared class of boolean and integer constants.
This is an important base class in LLVM.
Wrapper class representing physical registers. Should be passed by value.
constexpr bool isValid() const
constexpr bool isPhysical() const
Return true if the specified register number is in the physical register namespace.
constexpr unsigned id() const
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Representation of each machine instruction.
MachineOperand class - Representation of each machine instruction operand.
Definition MachineOperand.h:49
void setSubReg(unsigned subReg)
Definition MachineOperand.h:493
unsigned getSubReg() const
Definition MachineOperand.h:377
void setIsUse(bool Val=true)
Definition MachineOperand.h:513
static MachineOperand CreateMCSymbol(MCSymbol *Sym, unsigned TargetFlags=0)
Definition MachineOperand.h:964
unsigned getInstrRefOpIndex() const
Definition MachineOperand.h:606
void setInstrRefInstrIndex(unsigned InstrIdx)
Definition MachineOperand.h:728
LLVM_ABI unsigned getOperandNo() const
Returns the index of this operand in the instruction that it belongs to.
const GlobalValue * getGlobal() const
Definition MachineOperand.h:586
void setImplicit(bool Val=true)
Definition MachineOperand.h:518
bool isUndef() const
Definition MachineOperand.h:407
void setIsInternalRead(bool Val=true)
Definition MachineOperand.h:541
LLVM_ABI void substVirtReg(Register Reg, unsigned SubIdx, const TargetRegisterInfo &)
substVirtReg - Substitute the current register with the virtual subregister Reg:SubReg.
LLVM_ABI void ChangeToFrameIndex(int Idx, unsigned TargetFlags=0)
Replace this operand with a frame index.
bool isMCSymbol() const
Definition MachineOperand.h:360
const uint32_t * getRegLiveOut() const
getRegLiveOut - Returns a bit mask of live-out registers.
Definition MachineOperand.h:680
void setInstrRefOpIndex(unsigned OpIdx)
Definition MachineOperand.h:732
static MachineOperand CreateES(const char *SymName, unsigned TargetFlags=0)
Definition MachineOperand.h:918
const ConstantInt * getCImm() const
Definition MachineOperand.h:565
LLVM_ABI const char * getTargetIndexName() const
getTargetIndexName - If this MachineOperand is a TargetIndex that has a name, attempt to get the name...
static LLVM_ABI void printStackObjectReference(raw_ostream &OS, unsigned FrameIndex, bool IsFixed, StringRef Name)
Print a stack object reference.
static LLVM_ABI void printSubRegIdx(raw_ostream &OS, uint64_t Index, const TargetRegisterInfo *TRI)
Print a subreg index operand.
static MachineOperand CreateFPImm(const ConstantFP *CFP)
Definition MachineOperand.h:845
void setImm(int64_t immVal)
Definition MachineOperand.h:694
bool isCImm() const
isCImm - Test if this is a MO_CImmediate operand.
Definition MachineOperand.h:335
bool isLaneMask() const
Definition MachineOperand.h:366
void setRegMask(const uint32_t *RegMaskPtr)
Sets value of register mask operand referencing Mask.
Definition MachineOperand.h:746
int64_t getImm() const
Definition MachineOperand.h:560
unsigned getInstrRefInstrIndex() const
Definition MachineOperand.h:601
static LLVM_ABI void printTargetFlags(raw_ostream &OS, const MachineOperand &Op)
Print operand target flags.
bool readsReg() const
readsReg - Returns true if this operand reads the previous value of its register.
Definition MachineOperand.h:470
bool isImplicit() const
Definition MachineOperand.h:392
static MachineOperand CreateCFIIndex(unsigned CFIIndex)
Definition MachineOperand.h:980
void setFPImm(const ConstantFP *CFP)
Definition MachineOperand.h:704
bool isPredicate() const
Definition MachineOperand.h:364
bool isKill() const
Definition MachineOperand.h:402
LLVM_ABI void ChangeToFPImmediate(const ConstantFP *FPImm, unsigned TargetFlags=0)
ChangeToFPImmediate - Replace this operand with a new FP immediate operand of the specified value.
bool isIntrinsicID() const
Definition MachineOperand.h:363
LLVM_ABI void setIsRenamable(bool Val=true)
static MachineOperand CreateRegMask(const uint32_t *Mask)
CreateRegMask - Creates a register mask operand referencing Mask.
Definition MachineOperand.h:946
bool isReg() const
isReg - Tests if this is a MO_Register operand.
Definition MachineOperand.h:331
bool isRegMask() const
isRegMask - Tests if this is a MO_RegisterMask operand.
Definition MachineOperand.h:355
const MDNode * getMetadata() const
Definition MachineOperand.h:685
MachineBasicBlock * getMBB() const
Definition MachineOperand.h:575
bool isCPI() const
isCPI - Tests if this is a MO_ConstantPoolIndex operand.
Definition MachineOperand.h:343
static MachineOperand CreateCImm(const ConstantInt *CI)
Definition MachineOperand.h:839
void setIsDead(bool Val=true)
Definition MachineOperand.h:529
ArrayRef< int > getShuffleMask() const
Definition MachineOperand.h:626
LLVM_ABI void ChangeToMCSymbol(MCSymbol *Sym, unsigned TargetFlags=0)
ChangeToMCSymbol - Replace this operand with a new MC symbol operand.
LLVM_ABI void ChangeToTargetIndex(unsigned Idx, int64_t Offset, unsigned TargetFlags=0)
Replace this operand with a target index.
LLVM_ABI void setReg(Register Reg)
Change the register this operand corresponds to.
bool isUse() const
Definition MachineOperand.h:382
void setMetadata(const MDNode *MD)
Definition MachineOperand.h:723
LLVM_ABI void dump() const
bool isDef() const
Definition MachineOperand.h:387
bool isImm() const
isImm - Tests if this is a MO_Immediate operand.
Definition MachineOperand.h:333
bool isValidExcessOperand() const
Return true if this operand can validly be appended to an arbitrary operand list.
Definition MachineOperand.h:477
LLVM_ABI void ChangeToImmediate(int64_t ImmVal, unsigned TargetFlags=0)
ChangeToImmediate - Replace this operand with a new immediate operand of the specified value.
bool isMetadata() const
isMetadata - Tests if this is a MO_Metadata operand.
Definition MachineOperand.h:359
bool clobbersPhysReg(MCRegister PhysReg) const
clobbersPhysReg - Returns true if this RegMask operand clobbers PhysReg.
Definition MachineOperand.h:663
bool isSymbol() const
isSymbol - Tests if this is a MO_ExternalSymbol operand.
Definition MachineOperand.h:351
LLVM_ABI void ChangeToES(const char *SymName, unsigned TargetFlags=0)
ChangeToES - Replace this operand with a new external symbol operand.
void clearParent()
clearParent - Reset the parent pointer.
Definition MachineOperand.h:257
bool isShuffleMask() const
Definition MachineOperand.h:365
LLVM_ABI void ChangeToGA(const GlobalValue *GV, int64_t Offset, unsigned TargetFlags=0)
ChangeToGA - Replace this operand with a new global address operand.
LLVM_ABI void print(raw_ostream &os, const TargetRegisterInfo *TRI=nullptr) const
Print the MachineOperand to os.
LaneBitmask getLaneMask() const
Definition MachineOperand.h:631
unsigned getCFIIndex() const
Definition MachineOperand.h:611
bool isTied() const
Definition MachineOperand.h:453
void setIsKill(bool Val=true)
Definition MachineOperand.h:523
LLVM_ABI bool isRenamable() const
isRenamable - Returns true if this register may be renamed, i.e.
LLVM_ABI void ChangeToBA(const BlockAddress *BA, int64_t Offset, unsigned TargetFlags=0)
ChangeToBA - Replace this operand with a new block address operand.
bool isJTI() const
isJTI - Tests if this is a MO_JumpTableIndex operand.
Definition MachineOperand.h:347
static MachineOperand CreateMetadata(const MDNode *Meta)
Definition MachineOperand.h:958
static LLVM_ABI void printOperandOffset(raw_ostream &OS, int64_t Offset)
Print the offset with explicit +/- signs.
LLVM_ABI void ChangeToDbgInstrRef(unsigned InstrIdx, unsigned OpIdx, unsigned TargetFlags=0)
Replace this operand with an Instruction Reference.
LLVM_ABI void ChangeToRegister(Register Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isDebug=false)
ChangeToRegister - Replace this operand with a new register operand of the specified value.
const BlockAddress * getBlockAddress() const
Definition MachineOperand.h:591
MachineInstr * getParent()
getParent - Return the instruction that this operand belongs to.
Definition MachineOperand.h:246
LLVM_ABI void substPhysReg(MCRegister Reg, const TargetRegisterInfo &)
substPhysReg - Substitute the current register with the physical register Reg, taking any existing Su...
static MachineOperand CreatePredicate(unsigned Pred)
Definition MachineOperand.h:992
void setMBB(MachineBasicBlock *MBB)
Definition MachineOperand.h:737
bool isRegLiveOut() const
isRegLiveOut - Tests if this is a MO_RegisterLiveOut operand.
Definition MachineOperand.h:357
void setIsEarlyClobber(bool Val=true)
Definition MachineOperand.h:546
static unsigned getRegMaskSize(unsigned NumRegs)
Returns number of elements needed for a regmask array.
Definition MachineOperand.h:675
void setOffset(int64_t Offset)
Definition MachineOperand.h:709
bool isDebug() const
Definition MachineOperand.h:458
int getIndex() const
Definition MachineOperand.h:580
void setCImm(const ConstantInt *CI)
Definition MachineOperand.h:699
bool isDead() const
Definition MachineOperand.h:397
static LLVM_ABI void printIRSlotNumber(raw_ostream &OS, int Slot)
Print an IRSlotNumber.
unsigned RegNo
Definition MachineOperand.h:161
unsigned getTargetFlags() const
Definition MachineOperand.h:229
static MachineOperand CreateImm(int64_t Val)
Definition MachineOperand.h:833
bool isGlobal() const
isGlobal - Tests if this is a MO_GlobalAddress operand.
Definition MachineOperand.h:349
void setPredicate(unsigned Predicate)
Definition MachineOperand.h:756
static MachineOperand CreateShuffleMask(ArrayRef< int > Mask)
Definition MachineOperand.h:998
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
Definition MachineOperand.h:227
static MachineOperand CreateJTI(unsigned Idx, unsigned TargetFlags=0)
Definition MachineOperand.h:904
const char * getSymbolName() const
Definition MachineOperand.h:646
static MachineOperand CreateDbgInstrRef(unsigned InstrIdx, unsigned OpIdx)
Definition MachineOperand.h:973
void setIsUndef(bool Val=true)
Definition MachineOperand.h:534
void setIsDebug(bool Val=true)
Definition MachineOperand.h:551
bool isEarlyClobber() const
Definition MachineOperand.h:448
bool isCFIIndex() const
Definition MachineOperand.h:362
bool isBlockAddress() const
isBlockAddress - Tests if this is a MO_BlockAddress operand.
Definition MachineOperand.h:353
Register getReg() const
getReg - Returns the register number.
Definition MachineOperand.h:372
bool isTargetIndex() const
isTargetIndex - Tests if this is a MO_TargetIndex operand.
Definition MachineOperand.h:345
static MachineOperand CreateRegLiveOut(const uint32_t *Mask)
Definition MachineOperand.h:952
static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset, unsigned TargetFlags=0)
Definition MachineOperand.h:910
void setIntrinsicID(Intrinsic::ID IID)
Definition MachineOperand.h:751
void addTargetFlag(unsigned F)
Definition MachineOperand.h:237
bool isDbgInstrRef() const
Definition MachineOperand.h:361
Intrinsic::ID getIntrinsicID() const
Definition MachineOperand.h:616
bool isInternalRead() const
Definition MachineOperand.h:443
static MachineOperand CreateBA(const BlockAddress *BA, int64_t Offset, unsigned TargetFlags=0)
Definition MachineOperand.h:926
void setTargetFlags(unsigned F)
Definition MachineOperand.h:232
static MachineOperand CreateLaneMask(LaneBitmask LaneMask)
Definition MachineOperand.h:1004
bool isFI() const
isFI - Tests if this is a MO_FrameIndex operand.
Definition MachineOperand.h:341
LLVM_ABI bool isIdenticalTo(const MachineOperand &Other) const
Returns true if this operand is identical to the specified operand except for liveness related flags ...
unsigned OffsetLo
Definition MachineOperand.h:162
LLVM_ABI void ChangeToCPI(unsigned Idx, int Offset, unsigned TargetFlags=0)
ChangeToCPI - Replace this operand with a new constant pool index operand.
friend class MachineRegisterInfo
Definition MachineOperand.h:1011
static bool clobbersPhysReg(const uint32_t *RegMask, MCRegister PhysReg)
clobbersPhysReg - Returns true if this RegMask clobbers PhysReg.
Definition MachineOperand.h:655
const uint32_t * getRegMask() const
getRegMask - Returns a bit mask of registers preserved by this RegMask operand.
Definition MachineOperand.h:669
friend class MachineInstr
Definition MachineOperand.h:1010
void setIndex(int Idx)
Definition MachineOperand.h:717
static MachineOperand CreateCPI(unsigned Idx, int Offset, unsigned TargetFlags=0)
Definition MachineOperand.h:888
LLVM_ABI friend hash_code hash_value(const MachineOperand &MO)
MachineOperand hash_value overload.
LLVM_ABI void setIsDef(bool Val=true)
Change a def to a use, or a use to a def.
const ConstantFP * getFPImm() const
Definition MachineOperand.h:570
static LLVM_ABI void printSymbol(raw_ostream &OS, MCSymbol &Sym)
Print a MCSymbol as an operand.
const MachineInstr * getParent() const
Definition MachineOperand.h:247
unsigned getPredicate() const
Definition MachineOperand.h:621
MCSymbol * getMCSymbol() const
Definition MachineOperand.h:596
MachineOperandType
Definition MachineOperand.h:51
@ MO_CFIIndex
MCCFIInstruction index.
Definition MachineOperand.h:68
@ MO_Immediate
Immediate operand.
Definition MachineOperand.h:53
@ MO_ConstantPoolIndex
Address of indexed Constant in Constant Pool.
Definition MachineOperand.h:58
@ MO_MCSymbol
MCSymbol reference (for debug/eh info)
Definition MachineOperand.h:67
@ MO_Predicate
Generic predicate for ISel.
Definition MachineOperand.h:70
@ MO_GlobalAddress
Address of a global value.
Definition MachineOperand.h:62
@ MO_RegisterMask
Mask of preserved registers.
Definition MachineOperand.h:64
@ MO_ShuffleMask
Other IR Constant for ISel (shuffle masks)
Definition MachineOperand.h:71
@ MO_CImmediate
Immediate >64bit operand.
Definition MachineOperand.h:54
@ MO_BlockAddress
Address of a basic block.
Definition MachineOperand.h:63
@ MO_DbgInstrRef
Integer indices referring to an instruction+operand.
Definition MachineOperand.h:72
@ MO_MachineBasicBlock
MachineBasicBlock reference.
Definition MachineOperand.h:56
@ MO_LaneMask
Mask to represent active parts of registers.
Definition MachineOperand.h:73
@ MO_FrameIndex
Abstract Stack Frame Index.
Definition MachineOperand.h:57
@ MO_Register
Register operand.
Definition MachineOperand.h:52
@ MO_ExternalSymbol
Name of external global symbol.
Definition MachineOperand.h:61
@ MO_IntrinsicID
Intrinsic ID for ISel.
Definition MachineOperand.h:69
@ MO_JumpTableIndex
Address of indexed Jump Table for switch.
Definition MachineOperand.h:60
@ MO_Last
Definition MachineOperand.h:74
@ MO_TargetIndex
Target-dependent index+offset operand.
Definition MachineOperand.h:59
@ MO_Metadata
Metadata reference (for debug info)
Definition MachineOperand.h:66
@ MO_FPImmediate
Floating-point immediate operand.
Definition MachineOperand.h:55
@ MO_RegisterLiveOut
Mask of live-out registers.
Definition MachineOperand.h:65
static MachineOperand CreateReg(Register Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false, bool isRenamable=false)
Definition MachineOperand.h:851
static MachineOperand CreateTargetIndex(unsigned Idx, int64_t Offset, unsigned TargetFlags=0)
Definition MachineOperand.h:896
static MachineOperand CreateMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0)
Definition MachineOperand.h:876
int64_t getOffset() const
Return the offset from the symbol in this operand.
Definition MachineOperand.h:638
static MachineOperand CreateIntrinsicID(Intrinsic::ID ID)
Definition MachineOperand.h:986
bool isFPImm() const
isFPImm - Tests if this is a MO_FPImmediate operand.
Definition MachineOperand.h:337
static MachineOperand CreateFI(int Idx)
Definition MachineOperand.h:883
bool isMBB() const
isMBB - Tests if this is a MO_MachineBasicBlock operand.
Definition MachineOperand.h:339
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Manage lifetime of a slot tracker for printing IR.
Wrapper class representing virtual and physical registers.
StringRef - Represent a constant reference to a string, i.e.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
An opaque object representing a hash code.
This class implements an extremely fast bulk output stream that can only output to a stream.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
This is an optimization pass for GlobalISel generic memory operations.
hash_code hash_value(const FixedPointSemantics &Val)
uint64_t alignTo(uint64_t Size, Align A)
Returns a multiple of A needed to store Size bytes.
FunctionAddr VTableAddr Next
DWARFExpression::Operation Op
raw_ostream & operator<<(raw_ostream &OS, const APFixedPoint &FX)
static unsigned getHashValue(const MachineOperand &MO)
Definition MachineOperand.h:1048
static MachineOperand getTombstoneKey()
Definition MachineOperand.h:1044
static MachineOperand getEmptyKey()
Definition MachineOperand.h:1040
static bool isEqual(const MachineOperand &LHS, const MachineOperand &RHS)
Definition MachineOperand.h:1051
An information struct used to provide DenseMap with the various necessary components for a given valu...