PPCCallLowering.cpp Source File (original) (raw)

24#define DEBUG_TYPE "ppc-call-lowering"

26using namespace llvm;

28namespace {

33 : OutgoingValueHandler(MIRBuilder, MRI), MIB(MIB) {}

45};

46}

48void OutgoingArgHandler::assignValueToReg(Register ValVReg, Register PhysReg,

51 Register ExtReg = extendRegister(ValVReg, VA);

52 MIRBuilder.buildCopy(PhysReg, ExtReg);

53}

55void OutgoingArgHandler::assignValueToAddress(Register ValVReg, Register Addr,

56 LLT MemTy,

57 const MachinePointerInfo &MPO,

58 const CCValAssign &VA) {

60}

62Register OutgoingArgHandler::getStackAddress(uint64_t Size, int64_t Offset,

63 MachinePointerInfo &MPO,

64 ISD::ArgFlagsTy Flags) {

66}

74 Register SwiftErrorVReg) const {

80 auto &DL = F.getDataLayout();

81 if (!VRegs.empty()) {

84 setArgFlags(OrigArg, AttributeList::ReturnIndex, DL, F);

95 OutgoingArgHandler ArgHandler(MIRBuilder, MRI, MIB);

99 MIRBuilder, F.getCallingConv(),

100 F.isVarArg());

101 }

104}

105

110

117 const auto &DL = F.getDataLayout();

119

120

122 unsigned I = 0;

123 for (const auto &Arg : F.args()) {

124 if (DL.getTypeStoreSize(Arg.getType()).isZero())

125 continue;

126

127 ArgInfo OrigArg{VRegs[I], Arg, I};

128 setArgFlags(OrigArg, I + AttributeList::FirstArgIndex, DL, F);

130 ++I;

131 }

132

134 TLI.ccAssignFnForCall(F.getCallingConv(), false, F.isVarArg());

138 MIRBuilder, F.getCallingConv(),

139 F.isVarArg());

140}

141

142void PPCIncomingValueHandler::assignValueToReg(Register ValVReg,

145 markPhysRegUsed(PhysReg);

146 IncomingValueHandler::assignValueToReg(ValVReg, PhysReg, VA);

147}

148

149void PPCIncomingValueHandler::assignValueToAddress(

152

160 };

161

162 BuildLoad(MIRBuilder, MPO, MemTy, ValVReg, Addr);

163}

164

165Register PPCIncomingValueHandler::getStackAddress(uint64_t Size, int64_t Offset,

168 auto &MFI = MIRBuilder.getMF().getFrameInfo();

169 const bool IsImmutable = Flags .isByVal();

170 int FI = MFI.CreateFixedObject(Size, Offset, IsImmutable);

172

173

175 0, MIRBuilder.getMF().getDataLayout().getPointerSizeInBits());

176 MachineInstrBuilder AddrReg = MIRBuilder.buildFrameIndex(FramePtr, FI);

178 return AddrReg.getReg(0);

179}

180

181void FormalArgHandler::markPhysRegUsed(unsigned PhysReg) {

182 MIRBuilder.getMRI()->addLiveIn(PhysReg);

183 MIRBuilder.getMBB().addLiveIn(PhysReg);

184}

unsigned const MachineRegisterInfo * MRI

MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL

This file describes how to lower LLVM calls to machine code calls.

This file declares the MachineIRBuilder class.

Promote Memory to Register

This file describes how to lower LLVM calls to machine code calls.

static const unsigned FramePtr

ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...

bool empty() const

empty - Check if the array is empty.

CCValAssign - Represent assignment of one arg/retval to a location.

void splitToValueTypes(const ArgInfo &OrigArgInfo, SmallVectorImpl< ArgInfo > &SplitArgs, const DataLayout &DL, CallingConv::ID CallConv, SmallVectorImpl< uint64_t > *Offsets=nullptr) const

Break OrigArgInfo into one or more pieces the calling convention can process, returned in SplitArgs.

bool determineAndHandleAssignments(ValueHandler &Handler, ValueAssigner &Assigner, SmallVectorImpl< ArgInfo > &Args, MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv, bool IsVarArg, ArrayRef< Register > ThisReturnRegs={}) const

Invoke ValueAssigner::assignArg on each of the given Args and then use Handler to move them to the as...

CallLowering(const TargetLowering *TLI)

const TargetLowering * getTLI() const

Getter for generic TargetLowering class.

void setArgFlags(ArgInfo &Arg, unsigned OpIdx, const DataLayout &DL, const FuncInfoTy &FuncInfo) const

FunctionLoweringInfo - This contains information that is global to a function that is used when lower...

static constexpr LLT pointer(unsigned AddressSpace, unsigned SizeInBits)

Get a low-level pointer in the given address space.

MachineMemOperand * getMachineMemOperand(MachinePointerInfo PtrInfo, MachineMemOperand::Flags f, LLT MemTy, Align base_alignment, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr, SyncScope::ID SSID=SyncScope::System, AtomicOrdering Ordering=AtomicOrdering::NotAtomic, AtomicOrdering FailureOrdering=AtomicOrdering::NotAtomic)

getMachineMemOperand - Allocate a new MachineMemOperand.

MachineRegisterInfo & getRegInfo()

getRegInfo - Return information about the registers currently in use.

Function & getFunction()

Return the LLVM function that this machine code represents.

Helper class to build MachineInstr.

MachineInstrBuilder insertInstr(MachineInstrBuilder MIB)

Insert an existing instruction at the insertion point.

MachineInstrBuilder buildLoad(const DstOp &Res, const SrcOp &Addr, MachineMemOperand &MMO)

Build and insert Res = G_LOAD Addr, MMO.

MachineFunction & getMF()

Getter for the function we currently build.

MachineInstrBuilder buildInstrNoInsert(unsigned Opcode)

Build but don't insert = Opcode .

Get the register for the operand index.

const MachineInstrBuilder & addUse(Register RegNo, unsigned Flags=0, unsigned SubReg=0) const

Add a virtual register use operand.

@ MOLoad

The memory access reads data.

MachineRegisterInfo - Keep track of information for virtual and physical registers,...

bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, ArrayRef< Register > VRegs, FunctionLoweringInfo &FLI, Register SwiftErrorVReg) const override

This hook must be implemented to lower outgoing return values, described by Val, into the specified v...

Definition PPCCallLowering.cpp:71

bool lowerCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info) const override

This hook must be implemented to lower the given call instruction, including argument and return valu...

Definition PPCCallLowering.cpp:106

PPCCallLowering(const PPCTargetLowering &TLI)

Definition PPCCallLowering.cpp:68

bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F, ArrayRef< ArrayRef< Register > > VRegs, FunctionLoweringInfo &FLI) const override

This hook must be implemented to lower the incoming (formal) arguments, described by VRegs,...

Definition PPCCallLowering.cpp:111

Wrapper class representing virtual and physical registers.

This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.

LLVM Value Representation.

Type * getType() const

All values are typed, get the type of this value.

#define llvm_unreachable(msg)

Marks that the current location is not supposed to be reachable.

@ Implicit

Not emitted register (e.g. carry, or temporary result).

This is an optimization pass for GlobalISel generic memory operations.

bool CCAssignFn(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State)

CCAssignFn - This function assigns a location for Val, updating State to reflect the change.

bool RetCC_PPC(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State)

@ Success

The lock was released successfully.

LLVM_ABI Align inferAlignFromPtrInfo(MachineFunction &MF, const MachinePointerInfo &MPO)

Base class for ValueHandlers used for arguments passed to a function call, or for return values.

MachineIRBuilder & MIRBuilder

This class contains a discriminated union of information about pointers in memory operands,...

static LLVM_ABI MachinePointerInfo getFixedStack(MachineFunction &MF, int FI, int64_t Offset=0)

Return a MachinePointerInfo record that refers to the specified FrameIndex.