LLVM: lib/Target/RISCV/RISCVSelectionDAGInfo.cpp Source File (original) (raw)

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13#define GET_SDNODE_DESC

14#include "RISCVGenSDNodeInfo.inc"

15

16using namespace llvm;

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26

27#ifndef NDEBUG

28

29 switch (N->getOpcode()) {

30 case RISCVISD::TUPLE_EXTRACT:

32 "Expected index to be a target constant!");

33 break;

34 case RISCVISD::TUPLE_INSERT:

36 "Expected index to be a target constant!");

37 break;

38 case RISCVISD::VQDOT_VL:

39 case RISCVISD::VQDOTU_VL:

40 case RISCVISD::VQDOTSU_VL: {

41 EVT VT = N->getValueType(0);

43 "Expected result to be an i32 scalable vector");

44 assert(N->getOperand(0).getValueType() == VT &&

45 N->getOperand(1).getValueType() == VT &&

46 N->getOperand(2).getValueType() == VT &&

47 "Expected result and first 3 operands to have the same type!");

48 EVT MaskVT = N->getOperand(3).getValueType();

51 "Expected mask VT to be an i1 scalable vector with same number of "

52 "elements as the result");

53 break;

54 }

55 }

56#endif

57}

58

61 SDValue Size, Align Alignment, bool isVolatile, bool AlwaysInline,

64

65 if (!Subtarget.hasVendorXqcilsm())

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70 if (!ConstantSize)

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76 if (!(Alignment >= 4) || !((NumberOfBytesToWrite & 3) == 0))

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81 int NumberOfWords = NumberOfBytesToWrite / 4;

83 auto Volatile =

85

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88 SDValue Ops[] = {Chain, SrcValueReplicated, Dst,

96 BaseMemOperand);

97 };

98

99

100 if ((Src.getValueType() == MVT::i8) && isNullConstant(Src))

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102 SrcValueReplicated =

104 DAG.getConstant(0x01010101ul, dl, MVT::i32));

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128 if (NumberOfWords >= 48)

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131 if (NumberOfWords <= 16) {

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133 return getSetwmiNode(NumberOfWords, 0);

134 }

135

136 if (NumberOfWords <= 32) {

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138 OutChains.push_back(getSetwmiNode(NumberOfWords - 16, 64));

139 OutChains.push_back(getSetwmiNode(16, 0));

140 } else {

141

142 OutChains.push_back(getSetwmiNode(NumberOfWords - 31, 124));

143 OutChains.push_back(getSetwmiNode(15, 64));

144 OutChains.push_back(getSetwmiNode(16, 0));

145 }

146

148}

assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")

const AbstractManglingParser< Derived, Alloc >::OperatorInfo AbstractManglingParser< Derived, Alloc >::Ops[]

uint64_t getZExtValue() const

MachineMemOperand * getMachineMemOperand(MachinePointerInfo PtrInfo, MachineMemOperand::Flags f, LLT MemTy, Align base_alignment, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr, SyncScope::ID SSID=SyncScope::System, AtomicOrdering Ordering=AtomicOrdering::NotAtomic, AtomicOrdering FailureOrdering=AtomicOrdering::NotAtomic)

getMachineMemOperand - Allocate a new MachineMemOperand.

A description of a memory reference used in the backend.

@ MOVolatile

The memory access is volatile.

@ MOStore

The memory access writes data.

SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, SDValue Size, Align Alignment, bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo) const override

Emit target-specific code that performs a memset.

Definition RISCVSelectionDAGInfo.cpp:59

void verifyTargetNode(const SelectionDAG &DAG, const SDNode *N) const override

Checks that the given target-specific node is valid. Aborts if it is not.

Definition RISCVSelectionDAGInfo.cpp:23

~RISCVSelectionDAGInfo() override

RISCVSelectionDAGInfo()

Definition RISCVSelectionDAGInfo.cpp:18

Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...

Represents one node in the SelectionDAG.

Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.

SelectionDAGGenTargetInfo(const SDNodeInfo &GenNodeInfo)

void verifyTargetNode(const SelectionDAG &DAG, const SDNode *N) const override

Checks that the given target-specific node is valid. Aborts if it is not.

This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...

const TargetSubtargetInfo & getSubtarget() const

LLVM_ABI SDVTList getVTList(EVT VT)

Return an SDVTList that represents the list of values specified.

LLVM_ABI SDValue getMemIntrinsicNode(unsigned Opcode, const SDLoc &dl, SDVTList VTList, ArrayRef< SDValue > Ops, EVT MemVT, MachinePointerInfo PtrInfo, Align Alignment, MachineMemOperand::Flags Flags=MachineMemOperand::MOLoad|MachineMemOperand::MOStore, LocationSize Size=LocationSize::precise(0), const AAMDNodes &AAInfo=AAMDNodes())

Creates a MemIntrinsicNode that may produce a result and takes a list of operands.

LLVM_ABI SDValue getConstant(uint64_t Val, const SDLoc &DL, EVT VT, bool isTarget=false, bool isOpaque=false)

Create a ConstantSDNode wrapping a constant value.

LLVM_ABI SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDUse > Ops)

Gets or creates the specified node.

SDValue getTargetConstant(uint64_t Val, const SDLoc &DL, EVT VT, bool isOpaque=false)

MachineFunction & getMachineFunction() const

void push_back(const T &Elt)

This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.

@ ZERO_EXTEND

ZERO_EXTEND - Used for integer types, zeroing the new bits.

@ TargetConstant

TargetConstant* - Like Constant*, but the DAG does not do any folding, simplification,...

@ TokenFactor

TokenFactor - This node takes multiple tokens as input and produces a single token result.

This is an optimization pass for GlobalISel generic memory operations.

LLVM_ABI bool isNullConstant(SDValue V)

Returns true if V is a constant integer zero.

decltype(auto) dyn_cast(const From &Val)

dyn_cast - Return the argument parameter cast to the specified type.

This struct is a compact representation of a valid (non-zero power of two) alignment.

ElementCount getVectorElementCount() const

bool isScalableVector() const

Return true if this is a vector type where the runtime length is machine dependent.

EVT getVectorElementType() const

Given a vector type, return the type of each element.

This class contains a discriminated union of information about pointers in memory operands,...

MachinePointerInfo getWithOffset(int64_t O) const