SystemZAsmPrinter.cpp Source File (original) (raw)

37using namespace llvm;

42 if (MI->isCompare())

45 .addImm(MI->getOperand(1).getImm());

46 else

50 .addImm(MI->getOperand(2).getImm());

51}

56 if (MI->isCompare())

59 .addImm(MI->getOperand(1).getImm());

60 else

64 .addImm(MI->getOperand(2).getImm());

65}

71 .addReg(MI->getOperand(0).getReg())

72 .addReg(MI->getOperand(1).getReg())

74 .addImm(MI->getOperand(3).getImm())

75 .addImm(MI->getOperand(4).getImm())

76 .addImm(MI->getOperand(5).getImm());

77}

83 Context);

84}

90 Context);

91}

98 unsigned Opcode) {

99 if (MI->memoperands_empty())

100 return;

101

104 EE = MI->memoperands_end(); MMOI != EE; ++MMOI)

105 if ((*MMOI)->getAlign() < Alignment)

106 Alignment = (*MMOI)->getAlign();

107

108 unsigned AlignmentHint = 0;

109 if (Alignment >= Align(16))

110 AlignmentHint = 4;

111 else if (Alignment >= Align(8))

112 AlignmentHint = 3;

113 if (AlignmentHint == 0)

114 return;

115

118}

119

120

121

125 .addReg(MI->getOperand(1).getReg())

126 .addImm(MI->getOperand(2).getImm())

127 .addReg(MI->getOperand(3).getReg());

128}

129

130

131

135 .addReg(MI->getOperand(1).getReg())

136 .addImm(MI->getOperand(2).getImm())

137 .addReg(MI->getOperand(3).getReg())

139}

140

141

142

143

144

145

146void SystemZAsmPrinter::emitCallInformation(CallType CT) {

149 .addImm(0)

151}

152

153uint32_t SystemZAsmPrinter::AssociatedDataAreaTable::insert(const MCSymbol *Sym,

154 unsigned SlotKind) {

155 auto Key = std::make_pair(Sym, SlotKind);

156 auto It = Displacements.find(Key);

157

158 if (It != Displacements.end())

159 return (*It).second;

160

161

163 switch (SlotKind) {

166 break;

167 default:

169 break;

170 }

171

172 uint32_t Displacement = NextDisplacement;

173 Displacements[std::make_pair(Sym, SlotKind)] = NextDisplacement;

174 NextDisplacement += Length;

175

176 return Displacement;

177}

178

180SystemZAsmPrinter::AssociatedDataAreaTable::insert(const MachineOperand MO) {

190 } else

192

194 return insert(Sym, ADAslotType);

195}

196

198 SystemZ_MC::verifyInstructionPredicates(MI->getOpcode(),

200

203 switch (MI->getOpcode()) {

204 case SystemZ::Return:

206 .addReg(SystemZ::R14D);

207 break;

208

209 case SystemZ::Return_XPLINK:

211 .addReg(SystemZ::R7D)

214 break;

215

216 case SystemZ::CondReturn:

218 .addImm(MI->getOperand(0).getImm())

219 .addImm(MI->getOperand(1).getImm())

220 .addReg(SystemZ::R14D);

221 break;

222

223 case SystemZ::CondReturn_XPLINK:

225 .addImm(MI->getOperand(0).getImm())

226 .addImm(MI->getOperand(1).getImm())

227 .addReg(SystemZ::R7D)

230 break;

231

232 case SystemZ::CRBReturn:

234 .addReg(MI->getOperand(0).getReg())

235 .addReg(MI->getOperand(1).getReg())

236 .addImm(MI->getOperand(2).getImm())

237 .addReg(SystemZ::R14D)

239 break;

240

241 case SystemZ::CGRBReturn:

243 .addReg(MI->getOperand(0).getReg())

244 .addReg(MI->getOperand(1).getReg())

245 .addImm(MI->getOperand(2).getImm())

246 .addReg(SystemZ::R14D)

248 break;

249

250 case SystemZ::CIBReturn:

252 .addReg(MI->getOperand(0).getReg())

253 .addImm(MI->getOperand(1).getImm())

254 .addImm(MI->getOperand(2).getImm())

255 .addReg(SystemZ::R14D)

257 break;

258

259 case SystemZ::CGIBReturn:

261 .addReg(MI->getOperand(0).getReg())

262 .addImm(MI->getOperand(1).getImm())

263 .addImm(MI->getOperand(2).getImm())

264 .addReg(SystemZ::R14D)

266 break;

267

268 case SystemZ::CLRBReturn:

270 .addReg(MI->getOperand(0).getReg())

271 .addReg(MI->getOperand(1).getReg())

272 .addImm(MI->getOperand(2).getImm())

273 .addReg(SystemZ::R14D)

275 break;

276

277 case SystemZ::CLGRBReturn:

279 .addReg(MI->getOperand(0).getReg())

280 .addReg(MI->getOperand(1).getReg())

281 .addImm(MI->getOperand(2).getImm())

282 .addReg(SystemZ::R14D)

284 break;

285

286 case SystemZ::CLIBReturn:

288 .addReg(MI->getOperand(0).getReg())

289 .addImm(MI->getOperand(1).getImm())

290 .addImm(MI->getOperand(2).getImm())

291 .addReg(SystemZ::R14D)

293 break;

294

295 case SystemZ::CLGIBReturn:

297 .addReg(MI->getOperand(0).getReg())

298 .addImm(MI->getOperand(1).getImm())

299 .addImm(MI->getOperand(2).getImm())

300 .addReg(SystemZ::R14D)

302 break;

303

304 case SystemZ::CallBRASL_XPLINK64:

307 .addReg(SystemZ::R7D)

308 .addExpr(Lower.getExpr(MI->getOperand(0),

310 emitCallInformation(CallType::BRASL7);

311 return;

312

313 case SystemZ::CallBASR_XPLINK64:

315 .addReg(SystemZ::R7D)

316 .addReg(MI->getOperand(0).getReg()));

317 emitCallInformation(CallType::BASR76);

318 return;

319

320 case SystemZ::CallBASR_STACKEXT:

322 .addReg(SystemZ::R3D)

323 .addReg(MI->getOperand(0).getReg()));

324 emitCallInformation(CallType::BASR33);

325 return;

326

327 case SystemZ::ADA_ENTRY_VALUE:

328 case SystemZ::ADA_ENTRY: {

331 uint32_t Disp = ADATable.insert(MI->getOperand(1));

332 Register TargetReg = MI->getOperand(0).getReg();

333

334 Register ADAReg = MI->getOperand(2).getReg();

335 Disp += MI->getOperand(3).getImm();

336 bool LoadAddr = MI->getOpcode() == SystemZ::ADA_ENTRY;

337

338 unsigned Op0 = LoadAddr ? SystemZ::LA : SystemZ::LG;

339 unsigned Op = TII->getOpcodeForOffset(Op0, Disp);

340

342 if () {

343 if (TargetReg != ADAReg) {

344 IndexReg = TargetReg;

345

348 MCInstBuilder(SystemZ::LLILF).addReg(TargetReg).addImm(Disp));

349 } else

351 .addReg(TargetReg)

352 .addReg(TargetReg)

353 .addImm(Disp));

354 Disp = 0;

355 Op = Op0;

356 }

358 .addReg(TargetReg)

359 .addReg(ADAReg)

360 .addImm(Disp)

361 .addReg(IndexReg));

362

363 return;

364 }

365 case SystemZ::CallBRASL:

367 .addReg(SystemZ::R14D)

369 break;

370

371 case SystemZ::CallBASR:

373 .addReg(SystemZ::R14D)

374 .addReg(MI->getOperand(0).getReg());

375 break;

376

377 case SystemZ::CallJG:

380 break;

381

382 case SystemZ::CallBRCL:

384 .addImm(MI->getOperand(0).getImm())

385 .addImm(MI->getOperand(1).getImm())

387 break;

388

389 case SystemZ::CallBR:

391 .addReg(MI->getOperand(0).getReg());

392 break;

393

394 case SystemZ::CallBCR:

396 .addImm(MI->getOperand(0).getImm())

397 .addImm(MI->getOperand(1).getImm())

398 .addReg(MI->getOperand(2).getReg());

399 break;

400

401 case SystemZ::CRBCall:

403 .addReg(MI->getOperand(0).getReg())

404 .addReg(MI->getOperand(1).getReg())

405 .addImm(MI->getOperand(2).getImm())

406 .addReg(MI->getOperand(3).getReg())

408 break;

409

410 case SystemZ::CGRBCall:

412 .addReg(MI->getOperand(0).getReg())

413 .addReg(MI->getOperand(1).getReg())

414 .addImm(MI->getOperand(2).getImm())

415 .addReg(MI->getOperand(3).getReg())

417 break;

418

419 case SystemZ::CIBCall:

421 .addReg(MI->getOperand(0).getReg())

422 .addImm(MI->getOperand(1).getImm())

423 .addImm(MI->getOperand(2).getImm())

424 .addReg(MI->getOperand(3).getReg())

426 break;

427

428 case SystemZ::CGIBCall:

430 .addReg(MI->getOperand(0).getReg())

431 .addImm(MI->getOperand(1).getImm())

432 .addImm(MI->getOperand(2).getImm())

433 .addReg(MI->getOperand(3).getReg())

435 break;

436

437 case SystemZ::CLRBCall:

439 .addReg(MI->getOperand(0).getReg())

440 .addReg(MI->getOperand(1).getReg())

441 .addImm(MI->getOperand(2).getImm())

442 .addReg(MI->getOperand(3).getReg())

444 break;

445

446 case SystemZ::CLGRBCall:

448 .addReg(MI->getOperand(0).getReg())

449 .addReg(MI->getOperand(1).getReg())

450 .addImm(MI->getOperand(2).getImm())

451 .addReg(MI->getOperand(3).getReg())

453 break;

454

455 case SystemZ::CLIBCall:

457 .addReg(MI->getOperand(0).getReg())

458 .addImm(MI->getOperand(1).getImm())

459 .addImm(MI->getOperand(2).getImm())

460 .addReg(MI->getOperand(3).getReg())

462 break;

463

464 case SystemZ::CLGIBCall:

466 .addReg(MI->getOperand(0).getReg())

467 .addImm(MI->getOperand(1).getImm())

468 .addImm(MI->getOperand(2).getImm())

469 .addReg(MI->getOperand(3).getReg())

471 break;

472

473 case SystemZ::TLS_GDCALL:

475 .addReg(SystemZ::R14D)

478 break;

479

480 case SystemZ::TLS_LDCALL:

482 .addReg(SystemZ::R14D)

485 break;

486

487 case SystemZ::GOT:

489 .addReg(MI->getOperand(0).getReg())

491 break;

492

493 case SystemZ::IILF64:

496 .addImm(MI->getOperand(2).getImm());

497 break;

498

499 case SystemZ::IIHF64:

502 .addImm(MI->getOperand(2).getImm());

503 break;

504

505 case SystemZ::RISBHH:

506 case SystemZ::RISBHL:

508 break;

509

510 case SystemZ::RISBLH:

511 case SystemZ::RISBLL:

513 break;

514

515 case SystemZ::VLVGP32:

517 .addReg(MI->getOperand(0).getReg())

520 break;

521

522 case SystemZ::VLR32:

523 case SystemZ::VLR64:

527 break;

528

529 case SystemZ::VL:

530 Lower.lower(MI, LoweredMI);

532 break;

533

534 case SystemZ::VST:

535 Lower.lower(MI, LoweredMI);

537 break;

538

539 case SystemZ::VLM:

540 Lower.lower(MI, LoweredMI);

542 break;

543

544 case SystemZ::VSTM:

545 Lower.lower(MI, LoweredMI);

547 break;

548

549 case SystemZ::VL32:

551 break;

552

553 case SystemZ::VL64:

555 break;

556

557 case SystemZ::VST32:

559 break;

560

561 case SystemZ::VST64:

563 break;

564

565 case SystemZ::LFER:

570 break;

571

572 case SystemZ::LEFR:

576 .addReg(MI->getOperand(1).getReg())

578 break;

579

580#define LOWER_LOW(NAME) \

581 case SystemZ::NAME##64: LoweredMI = lowerRILow(MI, SystemZ::NAME); break

582

594

595#undef LOWER_LOW

596

597#define LOWER_HIGH(NAME) \

598 case SystemZ::NAME##64: LoweredMI = lowerRIHigh(MI, SystemZ::NAME); break

599

611

612#undef LOWER_HIGH

613

614 case SystemZ::Serialize:

618 else

621 break;

622

623

624

625

626

627 case SystemZ::Trap: {

630

635 }

636 break;

637

638

639

640 case SystemZ::CondTrap: {

643

647 .addImm(MI->getOperand(0).getImm())

648 .addImm(MI->getOperand(1).getImm())

650 }

651 break;

652

653 case TargetOpcode::FENTRY_CALL:

654 LowerFENTRY_CALL(*MI, Lower);

655 return;

656

657 case TargetOpcode::STACKMAP:

658 LowerSTACKMAP(*MI);

659 return;

660

661 case TargetOpcode::PATCHPOINT:

662 LowerPATCHPOINT(*MI, Lower);

663 return;

664

665 case TargetOpcode::PATCHABLE_FUNCTION_ENTER:

666 LowerPATCHABLE_FUNCTION_ENTER(*MI, Lower);

667 return;

668

669 case TargetOpcode::PATCHABLE_RET:

670 LowerPATCHABLE_RET(*MI, Lower);

671 return;

672

673 case TargetOpcode::PATCHABLE_FUNCTION_EXIT:

674 llvm_unreachable("PATCHABLE_FUNCTION_EXIT should never be emitted");

675

676 case TargetOpcode::PATCHABLE_TAIL_CALL:

677

678

679 llvm_unreachable("Tail call is handled in the normal case. See comments "

680 "around this assert.");

681

682 case SystemZ::EXRL_Pseudo: {

683 unsigned TargetInsOpc = MI->getOperand(0).getImm();

684 Register LenMinus1Reg = MI->getOperand(1).getReg();

685 Register DestReg = MI->getOperand(2).getReg();

686 int64_t DestDisp = MI->getOperand(3).getImm();

687 Register SrcReg = MI->getOperand(4).getReg();

688 int64_t SrcDisp = MI->getOperand(5).getImm();

689

695 SystemZTargetStreamer::EXRLT2SymMap::iterator I =

698 DotSym = I->second;

699 else

704 MCInstBuilder(SystemZ::EXRL).addReg(LenMinus1Reg).addExpr(Dot));

705 return;

706 }

707

708

709

710 case SystemZ::EH_SjLj_Setup:

711 return;

712

713 default:

714 Lower.lower(MI, LoweredMI);

715 break;

716 }

718}

719

720

721

724 if (NumBytes < 2) {

726 return 0;

727 }

728 else if (NumBytes < 4) {

730 MCInstBuilder(SystemZ::BCRAsm).addImm(0).addReg(SystemZ::R0D), STI);

731 return 2;

732 }

733 else if (NumBytes < 6) {

735 MCInstBuilder(SystemZ::BCAsm).addImm(0).addReg(0).addImm(0).addReg(0),

736 STI);

737 return 4;

738 }

739 else {

744 MCInstBuilder(SystemZ::BRCLAsm).addImm(0).addExpr(Dot), STI);

745 return 6;

746 }

747}

748

749void SystemZAsmPrinter::LowerFENTRY_CALL(const MachineInstr &MI,

760 }

761

764 return;

765 }

766

771 MCInstBuilder(SystemZ::BRASL).addReg(SystemZ::R0D).addExpr(Op),

773}

774

775void SystemZAsmPrinter::LowerSTACKMAP(const MachineInstr &MI) {

777

778 unsigned NumNOPBytes = MI.getOperand(1).getImm();

779

783

785 assert(NumNOPBytes % 2 == 0 && "Invalid number of NOP bytes requested!");

786

787

788 unsigned ShadowBytes = 0;

791 ++MII;

792 while (ShadowBytes < NumNOPBytes) {

793 if (MII == MBB.end() ||

794 MII->getOpcode() == TargetOpcode::PATCHPOINT ||

795 MII->getOpcode() == TargetOpcode::STACKMAP)

796 break;

797 ShadowBytes += TII->getInstSizeInBytes(*MII);

798 if (MII->isCall())

799 break;

800 ++MII;

801 }

802

803

804 while (ShadowBytes < NumNOPBytes)

807}

808

809

810

811void SystemZAsmPrinter::LowerPATCHPOINT(const MachineInstr &MI,

816

819

820 unsigned EncodedBytes = 0;

821 const MachineOperand &CalleeMO = Opers.getCallTarget();

822

823 if (CalleeMO.isImm()) {

825 if (CallTarget) {

826 unsigned ScratchIdx = -1;

827 unsigned ScratchReg = 0;

828 do {

829 ScratchIdx = Opers.getNextScratchIdx(ScratchIdx + 1);

830 ScratchReg = MI.getOperand(ScratchIdx).getReg();

831 } while (ScratchReg == SystemZ::R0D);

832

833

835 .addReg(ScratchReg)

836 .addImm(CallTarget & 0xFFFFFFFF));

837 EncodedBytes += 6;

838 if (CallTarget >> 32) {

840 .addReg(ScratchReg)

841 .addImm(CallTarget >> 32));

842 EncodedBytes += 6;

843 }

844

846 .addReg(SystemZ::R14D)

847 .addReg(ScratchReg));

848 EncodedBytes += 2;

849 }

850 } else if (CalleeMO.isGlobal()) {

853 .addReg(SystemZ::R14D)

854 .addExpr(Expr));

855 EncodedBytes += 6;

856 }

857

858

859 unsigned NumBytes = Opers.getNumPatchBytes();

860 assert(NumBytes >= EncodedBytes &&

861 "Patchpoint can't request size less than the length of a call.");

862 assert((NumBytes - EncodedBytes) % 2 == 0 &&

863 "Invalid number of NOP bytes requested!");

864 while (EncodedBytes < NumBytes)

867}

868

869void SystemZAsmPrinter::LowerPATCHABLE_FUNCTION_ENTER(

871

872

873

874

875

876

877

878

879

880 bool HasVectorFeature =

884 HasVectorFeature ? "__xray_FunctionEntryVec" : "__xray_FunctionEntry");

893 MCInstBuilder(SystemZ::LLILF).addReg(SystemZ::R2D).addImm(0));

896 .addReg(SystemZ::R14D)

901}

902

903void SystemZAsmPrinter::LowerPATCHABLE_RET(const MachineInstr &MI,

905 unsigned OpCode = MI.getOperand(0).getImm();

906 MCSymbol *FallthroughLabel = nullptr;

907 if (OpCode == SystemZ::CondReturn) {

909 int64_t Cond0 = MI.getOperand(1).getImm();

910 int64_t Cond1 = MI.getOperand(2).getImm();

912 .addImm(Cond0)

913 .addImm(Cond1 ^ Cond0)

916 }

917

918

919

920

921

922

923

924

925

926 bool HasVectorFeature =

930 HasVectorFeature ? "__xray_FunctionExitVec" : "__xray_FunctionExit");

934 MCInstBuilder(SystemZ::BR).addReg(SystemZ::R14D));

937 MCInstBuilder(SystemZ::LLILF).addReg(SystemZ::R2D).addImm(0));

942 if (FallthroughLabel)

943 OutStreamer->emitLabel(FallthroughLabel);

945}

946

947

948

949

950void SystemZAsmPrinter::emitAttributes(Module &M) {

951 if (M.getModuleFlag("s390x-visible-vector-ABI")) {

952 bool HasVectorFeature =

954 OutStreamer->emitGNUAttribute(8, HasVectorFeature ? 2 : 1);

955 }

956}

957

958

959

962 switch (Modifier) {

967 }

969}

970

974

980

982}

983

989

992 } else {

995 }

996}

997

999 if (!Reg)

1000 OS << '0';

1001 else

1003}

1004

1007 if (MCOp.isReg())

1009 else if (MCOp.isImm())

1011 else if (MCOp.isExpr())

1013 else

1015}

1016

1018 const MCOperand &DispMO, unsigned Index,

1021 if (Base || Index) {

1022 OS << '(';

1023 if (Index) {

1026 OS << ',';

1027 }

1030 OS << ')';

1031 }

1032}

1033

1035 const char *ExtraCode,

1040 if (ExtraCode) {

1041 if (ExtraCode[0] == 'N' && !ExtraCode[1] && MO.isReg() &&

1042 SystemZ::GR128BitRegClass.contains(MO.getReg()))

1043 MCOp =

1045 else

1047 } else {

1049 MCOp = Lower.lowerOperand(MO);

1050 }

1052 return false;

1053}

1054

1056 unsigned OpNo,

1057 const char *ExtraCode,

1059 if (ExtraCode && ExtraCode[0] && !ExtraCode[1]) {

1060 switch (ExtraCode[0]) {

1061 case 'A':

1062

1063

1064

1065 return false;

1066 case 'O':

1067 OS << MI->getOperand(OpNo + 1).getImm();

1068 return false;

1069 case 'R':

1071 return false;

1072 }

1073 }

1076 MI->getOperand(OpNo + 2).getReg(), OS);

1077 return false;

1078}

1079

1082 if (TT.isOSzOS()) {

1083 emitADASection();

1084 emitIDRLSection(M);

1085 }

1086 emitAttributes(M);

1087}

1088

1089void SystemZAsmPrinter::emitADASection() {

1091

1094

1095 unsigned EmittedBytes = 0;

1096 for (auto &Entry : ADATable.getTable()) {

1098 unsigned SlotKind;

1099 std::tie(Sym, SlotKind) = Entry.first;

1100 unsigned Offset = Entry.second;

1101 assert(Offset == EmittedBytes && "Offset not as expected");

1102 (void)EmittedBytes;

1103#define EMIT_COMMENT(Str) \

1104 OutStreamer->AddComment(Twine("Offset ") \

1105 .concat(utostr(Offset)) \

1106 .concat(" " Str " ") \

1107 .concat(Sym->getName()));

1108 switch (SlotKind) {

1110

1111

1117 PointerSize);

1122 PointerSize);

1123 EmittedBytes += PointerSize * 2;

1124 break;

1131 PointerSize);

1132 EmittedBytes += PointerSize;

1133 break;

1140

1141 EMIT_COMMENT("pointer to function descriptor");

1146 PointerSize);

1147 EmittedBytes += PointerSize;

1148 break;

1149 }

1150 default:

1152 }

1153#undef EMIT_COMMENT

1154 }

1156}

1157

1159 std::string ProductID;

1160 if (auto *MD = M.getModuleFlag("zos_product_id"))

1161 ProductID = cast(MD)->getString().str();

1162 if (ProductID.empty())

1163 ProductID = "LLVM";

1164 return ProductID;

1165}

1166

1168 if (auto *VersionVal = mdconst::extract_or_null(

1169 M.getModuleFlag("zos_product_major_version")))

1170 return VersionVal->getZExtValue();

1171 return LLVM_VERSION_MAJOR;

1172}

1173

1175 if (auto *ReleaseVal = mdconst::extract_or_null(

1176 M.getModuleFlag("zos_product_minor_version")))

1177 return ReleaseVal->getZExtValue();

1178 return LLVM_VERSION_MINOR;

1179}

1180

1182 if (auto *PatchVal = mdconst::extract_or_null(

1183 M.getModuleFlag("zos_product_patchlevel")))

1184 return PatchVal->getZExtValue();

1185 return LLVM_VERSION_PATCH;

1186}

1187

1189 std::time_t Time = 0;

1190 if (auto *Val = mdconst::extract_or_null(

1191 M.getModuleFlag("zos_translation_time"))) {

1192 long SecondsSinceEpoch = Val->getSExtValue();

1193 Time = static_cast<time_t>(SecondsSinceEpoch);

1194 }

1195 return Time;

1196}

1197

1198void SystemZAsmPrinter::emitIDRLSection(Module &M) {

1201 constexpr unsigned IDRLDataLength = 30;

1203

1206

1208

1211 O << formatv("{0,-10}{1,0-2:d}{2,0-2:d}{3:%Y%m%d%H%M%S}{4,0-2}",

1212 ProductID.substr(0, 10).c_str(), ProductVersion, ProductRelease,

1216

1219 OutStreamer->emitInt16(IDRLDataLength);

1222}

1223

1226

1227

1230

1233 emitPPA1(FnEndSym);

1235

1236 CurrentFnPPA1Sym = nullptr;

1237 CurrentFnEPMarkerSym = nullptr;

1238 }

1239}

1240

1241static void emitPPA1Flags(std::unique_ptr &OutStreamer, bool VarArg,

1243 bool EHBlock, bool HasName) {

1244 enum class PPA1Flag1 : uint8_t {

1245 DSA64Bit = (0x80 >> 0),

1246 VarArg = (0x80 >> 7),

1248 };

1249 enum class PPA1Flag2 : uint8_t {

1250 ExternalProcedure = (0x80 >> 0),

1251 STACKPROTECTOR = (0x80 >> 3),

1253 };

1254 enum class PPA1Flag3 : uint8_t {

1255 FPRMask = (0x80 >> 2),

1257 };

1258 enum class PPA1Flag4 : uint8_t {

1259 EPMOffsetPresent = (0x80 >> 0),

1260 VRMask = (0x80 >> 2),

1261 EHBlock = (0x80 >> 3),

1262 ProcedureNamePresent = (0x80 >> 7),

1264 };

1265

1266

1267 auto Flags1 = PPA1Flag1(0);

1268 auto Flags2 = PPA1Flag2::ExternalProcedure;

1269 auto Flags3 = PPA1Flag3(0);

1270 auto Flags4 = PPA1Flag4::EPMOffsetPresent;

1271

1272 Flags1 |= PPA1Flag1::DSA64Bit;

1273

1274 if (VarArg)

1275 Flags1 |= PPA1Flag1::VarArg;

1276

1278 Flags2 |= PPA1Flag2::STACKPROTECTOR;

1279

1280

1281 if (FPRMask)

1282 Flags3 |= PPA1Flag3::FPRMask;

1283

1284 if (VRMask)

1285 Flags4 |= PPA1Flag4::VRMask;

1286

1287 if (EHBlock)

1288 Flags4 |= PPA1Flag4::EHBlock;

1289

1290 if (HasName)

1291 Flags4 |= PPA1Flag4::ProcedureNamePresent;

1292

1293 OutStreamer->AddComment("PPA1 Flags 1");

1294 if ((Flags1 & PPA1Flag1::DSA64Bit) == PPA1Flag1::DSA64Bit)

1295 OutStreamer->AddComment(" Bit 0: 1 = 64-bit DSA");

1296 else

1297 OutStreamer->AddComment(" Bit 0: 0 = 32-bit DSA");

1298 if ((Flags1 & PPA1Flag1::VarArg) == PPA1Flag1::VarArg)

1299 OutStreamer->AddComment(" Bit 7: 1 = Vararg function");

1300 OutStreamer->emitInt8(static_cast<uint8_t>(Flags1));

1301

1302 OutStreamer->AddComment("PPA1 Flags 2");

1303 if ((Flags2 & PPA1Flag2::ExternalProcedure) == PPA1Flag2::ExternalProcedure)

1304 OutStreamer->AddComment(" Bit 0: 1 = External procedure");

1305 if ((Flags2 & PPA1Flag2::STACKPROTECTOR) == PPA1Flag2::STACKPROTECTOR)

1306 OutStreamer->AddComment(" Bit 3: 1 = STACKPROTECT is enabled");

1307 else

1308 OutStreamer->AddComment(" Bit 3: 0 = STACKPROTECT is not enabled");

1309 OutStreamer->emitInt8(static_cast<uint8_t>(Flags2));

1310

1311 OutStreamer->AddComment("PPA1 Flags 3");

1312 if ((Flags3 & PPA1Flag3::FPRMask) == PPA1Flag3::FPRMask)

1313 OutStreamer->AddComment(" Bit 2: 1 = FP Reg Mask is in optional area");

1314 OutStreamer->emitInt8(

1315 static_cast<uint8_t>(Flags3));

1316

1317 OutStreamer->AddComment("PPA1 Flags 4");

1318 if ((Flags4 & PPA1Flag4::VRMask) == PPA1Flag4::VRMask)

1319 OutStreamer->AddComment(" Bit 2: 1 = Vector Reg Mask is in optional area");

1320 if ((Flags4 & PPA1Flag4::EHBlock) == PPA1Flag4::EHBlock)

1321 OutStreamer->AddComment(" Bit 3: 1 = C++ EH block");

1322 if ((Flags4 & PPA1Flag4::ProcedureNamePresent) ==

1323 PPA1Flag4::ProcedureNamePresent)

1324 OutStreamer->AddComment(" Bit 7: 1 = Name Length and Name");

1325 OutStreamer->emitInt8(static_cast<uint8_t>(

1326 Flags4));

1327}

1328

1329static void emitPPA1Name(std::unique_ptr &OutStreamer,

1333 if (NameSize < UINT16_MAX) {

1335 } else {

1336 OutName = OutName.substr(0, UINT16_MAX);

1337 OutSize = UINT16_MAX;

1338 }

1339

1340 uint8_t ExtraZeros = 4 - ((2 + OutSize) % 4);

1341

1344 OutName = OutnameConv.str();

1345

1346 OutStreamer->AddComment("Length of Name");

1347 OutStreamer->emitInt16(OutSize);

1348 OutStreamer->AddComment("Name of Function");

1349 OutStreamer->emitBytes(OutName);

1350 OutStreamer->emitZeros(ExtraZeros);

1351}

1352

1353void SystemZAsmPrinter::emitPPA1(MCSymbol *FnEndSym) {

1354 assert(PPA2Sym != nullptr && "PPA2 Symbol not defined");

1355

1358 const auto TargetHasVector = Subtarget.hasVector();

1359

1365

1366

1367 const std::vector &CSI = MFFrame.getCalleeSavedInfo();

1370 uint8_t SavedVRMask = 0;

1371 int64_t OffsetFPR = 0;

1372 int64_t OffsetVR = 0;

1373 const int64_t TopOfStack =

1375

1376

1377

1380 I && E && I <= E; ++I) {

1381 unsigned V = TRI->getEncodingValue((Register)I);

1382 assert(V < 16 && "GPR index out of range");

1383 SavedGPRMask |= 1 << (15 - V);

1384 }

1385

1386 for (auto &CS : CSI) {

1387 unsigned Reg = CS.getReg();

1388 unsigned I = TRI->getEncodingValue(Reg);

1389

1390 if (SystemZ::FP64BitRegClass.contains(Reg)) {

1391 assert(I < 16 && "FPR index out of range");

1392 SavedFPRMask |= 1 << (15 - I);

1393 int64_t Temp = MFFrame.getObjectOffset(CS.getFrameIdx());

1394 if (Temp < OffsetFPR)

1395 OffsetFPR = Temp;

1396 } else if (SystemZ::VR128BitRegClass.contains(Reg)) {

1397 assert(I >= 16 && I <= 23 && "VPR index out of range");

1398 unsigned BitNum = I - 16;

1399 SavedVRMask |= 1 << (7 - BitNum);

1400 int64_t Temp = MFFrame.getObjectOffset(CS.getFrameIdx());

1401 if (Temp < OffsetVR)

1402 OffsetVR = Temp;

1403 }

1404 }

1405

1406

1407 OffsetFPR += (OffsetFPR < 0) ? TopOfStack : 0;

1408 OffsetVR += (OffsetVR < 0) ? TopOfStack : 0;

1409

1410

1411 uint8_t FrameReg = TRI->getEncodingValue(TRI->getFrameRegister(*MF));

1412 uint8_t AllocaReg = ZFL->hasFP(*MF) ? FrameReg : 0;

1413 assert(AllocaReg < 16 && "Can't have alloca register larger than 15");

1414 (void)AllocaReg;

1415

1416

1417 uint32_t FrameAndFPROffset = 0;

1418 if (SavedFPRMask) {

1419 uint64_t FPRSaveAreaOffset = OffsetFPR;

1420 assert(FPRSaveAreaOffset < 0x10000000 && "Offset out of range");

1421

1422 FrameAndFPROffset = FPRSaveAreaOffset & 0x0FFFFFFF;

1423 FrameAndFPROffset |= FrameReg << 28;

1424 }

1425

1426

1427 uint32_t FrameAndVROffset = 0;

1428 if (TargetHasVector && SavedVRMask) {

1429 uint64_t VRSaveAreaOffset = OffsetVR;

1430 assert(VRSaveAreaOffset < 0x10000000 && "Offset out of range");

1431

1432 FrameAndVROffset = VRSaveAreaOffset & 0x0FFFFFFF;

1433 FrameAndVROffset |= FrameReg << 28;

1434 }

1435

1436

1438 OutStreamer->emitLabel(CurrentFnPPA1Sym);

1440 OutStreamer->emitInt8(0x02);

1441 OutStreamer->AddComment("LE Signature X'CE'");

1442 OutStreamer->emitInt8(0xCE);

1443 OutStreamer->AddComment("Saved GPR Mask");

1445 OutStreamer->AddComment("Offset to PPA2");

1446 OutStreamer->emitAbsoluteSymbolDiff(PPA2Sym, CurrentFnPPA1Sym, 4);

1447

1449

1450 bool HasName =

1452

1455 TargetHasVector && SavedVRMask != 0, NeedEmitEHBlock, HasName);

1456

1457 OutStreamer->AddComment("Length/4 of Parms");

1460 OutStreamer->AddComment("Length of Code");

1461 OutStreamer->emitAbsoluteSymbolDiff(FnEndSym, CurrentFnEPMarkerSym, 4);

1462

1463

1464 if (SavedFPRMask) {

1468 OutStreamer->emitInt16(0);

1469 OutStreamer->AddComment("FPR Save Area Locator");

1471 .concat(utostr(FrameAndFPROffset >> 28))

1472 .str());

1474 .concat(utostr(FrameAndFPROffset & 0x0FFFFFFF))

1475 .str());

1476 OutStreamer->emitInt32(FrameAndFPROffset);

1477

1478

1479 }

1480

1481

1482 if (TargetHasVector && SavedVRMask) {

1486 OutStreamer->emitInt16(0);

1487 OutStreamer->AddComment("VR Save Area Locator");

1489 .concat(utostr(FrameAndVROffset >> 28))

1490 .str());

1492 .concat(utostr(FrameAndVROffset & 0x0FFFFFFF))

1493 .str());

1494 OutStreamer->emitInt32(FrameAndVROffset);

1495 }

1496

1497

1498 const Function *Per = nullptr;

1499 if (NeedEmitEHBlock) {

1500 Per = dyn_cast(

1502 MCSymbol *PersonalityRoutine =

1504 assert(PersonalityRoutine && "Missing personality routine");

1505

1509 OutStreamer->emitInt32(0);

1510 OutStreamer->AddComment("Personality routine");

1513 OutStreamer->AddComment("LSDA location");

1518 }

1519

1520

1521 if (HasName)

1523

1524

1525 OutStreamer->emitAbsoluteSymbolDiff(CurrentFnEPMarkerSym, CurrentFnPPA1Sym,

1526 4);

1527}

1528

1531 emitPPA2(M);

1533}

1534

1535void SystemZAsmPrinter::emitPPA2(Module &M) {

1539

1540 const char *StartSymbolName = "CELQSTRT";

1542

1543

1546

1551

1555

1558 ostr << formatv("{0,0-2:d}{1,0-2:d}{2,0-2:d}", ProductVersion, ProductRelease,

1559 ProductPatch);

1560

1561

1562 SmallString<sizeof(CompilationTime) - 1> CompilationTimeStr;

1564

1567

1568 enum class PPA2MemberId : uint8_t {

1569

1570

1571 LE_C_Runtime = 3,

1572 };

1573 enum class PPA2MemberSubId : uint8_t {

1574

1575 C = 0x00,

1576 CXX = 0x01,

1578 Go = 0x60,

1579 LLVMBasedLang = 0xe7,

1580 };

1581

1582 enum class PPA2Flags : uint8_t {

1583 CompileForBinaryFloatingPoint = 0x80,

1584 CompiledWithXPLink = 0x01,

1585 CompiledUnitASCII = 0x04,

1586 HasServiceInfo = 0x20,

1587 };

1588

1589 PPA2MemberSubId MemberSubId = PPA2MemberSubId::LLVMBasedLang;

1590 if (auto *MD = M.getModuleFlag("zos_cu_language")) {

1593 .Case("C", PPA2MemberSubId::C)

1594 .Case("C++", PPA2MemberSubId::CXX)

1595 .Case("Swift", PPA2MemberSubId::Swift)

1596 .Case("Go", PPA2MemberSubId::Go)

1597 .Default(PPA2MemberSubId::LLVMBasedLang);

1598 }

1599

1600

1602 OutStreamer->emitInt8(static_cast<uint8_t>(PPA2MemberId::LE_C_Runtime));

1604 OutStreamer->emitInt8(0x22);

1605 OutStreamer->emitInt8(0x04);

1606 OutStreamer->emitAbsoluteSymbolDiff(CELQSTRT, PPA2Sym, 4);

1608 OutStreamer->emitAbsoluteSymbolDiff(DateVersionSym, PPA2Sym, 4);

1610 0x00000000);

1611 uint8_t Flgs = static_cast<uint8_t>(PPA2Flags::CompileForBinaryFloatingPoint);

1612 Flgs |= static_cast<uint8_t>(PPA2Flags::CompiledWithXPLink);

1613

1614 if (auto *MD = M.getModuleFlag("zos_le_char_mode")) {

1615 const StringRef &CharMode = cast(MD)->getString();

1616 if (CharMode == "ascii") {

1617 Flgs |= static_cast<uint8_t>(

1618 PPA2Flags::CompiledUnitASCII);

1619 } else if (CharMode != "ebcdic") {

1621 "Only ascii or ebcdic are valid values for zos_le_char_mode "

1622 "metadata");

1623 }

1624 }

1625

1627 OutStreamer->emitInt8(0x00);

1628

1629

1630

1631 OutStreamer->emitInt16(0x0000);

1632

1633

1635 OutStreamer->emitBytes(CompilationTimeStr.str());

1636 OutStreamer->emitBytes(VersionStr.str());

1637

1638 OutStreamer->emitInt16(0x0000);

1639

1640

1641

1643

1644

1645 OutStreamer->AddComment("A(PPA2-CELQSTRT)");

1646 OutStreamer->emitAbsoluteSymbolDiff(PPA2Sym, CELQSTRT, 8);

1648}

1649

1652

1653 if (Subtarget.getTargetTriple().isOSzOS()) {

1655

1656

1659 : "");

1660

1661 CurrentFnEPMarkerSym =

1663 CurrentFnPPA1Sym =

1665

1666

1671

1672

1674 if (IsLeaf)

1675 Flags |= 0x08;

1676 if (IsUsingAlloca)

1677 Flags |= 0x04;

1678

1679

1680 uint32_t DSAAndFlags = DSASize & 0xFFFFFFE0;

1681 DSAAndFlags |= Flags;

1682

1683

1684 OutStreamer->AddComment("XPLINK Routine Layout Entry");

1685 OutStreamer->emitLabel(CurrentFnEPMarkerSym);

1686 OutStreamer->AddComment("Eyecatcher 0x00C300C500C500");

1687 OutStreamer->emitIntValueInHex(0x00C300C500C500, 7);

1688 OutStreamer->AddComment("Mark Type C'1'");

1689 OutStreamer->emitInt8(0xF1);

1690 OutStreamer->AddComment("Offset to PPA1");

1691 OutStreamer->emitAbsoluteSymbolDiff(CurrentFnPPA1Sym, CurrentFnEPMarkerSym,

1692 4);

1696 if (Flags & 0x08)

1697 OutStreamer->AddComment(" Bit 1: 1 = Leaf function");

1698 else

1699 OutStreamer->AddComment(" Bit 1: 0 = Non-leaf function");

1700 if (Flags & 0x04)

1701 OutStreamer->AddComment(" Bit 2: 1 = Uses alloca");

1702 else

1703 OutStreamer->AddComment(" Bit 2: 0 = Does not use alloca");

1704 }

1706 }

1707

1709}

1710

1711

1714}

unsigned const MachineRegisterInfo * MRI

static MCSymbolRefExpr::VariantKind getModifierVariantKind(ARMCP::ARMCPModifier Modifier)

#define LLVM_EXTERNAL_VISIBILITY

This file provides utility functions for converting between EBCDIC-1047 and UTF-8.

static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")

const HexagonInstrInfo * TII

Module.h This file contains the declarations for the Module class.

unsigned const TargetRegisterInfo * TRI

assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())

static bool contains(SmallPtrSetImpl< ConstantExpr * > &Cache, ConstantExpr *Expr, Constant *C)

static bool printOperand(raw_ostream &OS, const SelectionDAG *G, const SDValue Value)

static void emitPPA1Name(std::unique_ptr< MCStreamer > &OutStreamer, StringRef OutName)

static void lowerAlignmentHint(const MachineInstr *MI, MCInst &LoweredMI, unsigned Opcode)

#define EMIT_COMMENT(Str)

static const MCSymbolRefExpr * getGlobalOffsetTable(MCContext &Context)

static void printFormattedRegName(const MCAsmInfo *MAI, unsigned RegNo, raw_ostream &OS)

static MCInst lowerRILow(const MachineInstr *MI, unsigned Opcode)

static uint32_t getProductVersion(Module &M)

static std::string getProductID(Module &M)

static MCInst lowerRIHigh(const MachineInstr *MI, unsigned Opcode)

static void emitPPA1Flags(std::unique_ptr< MCStreamer > &OutStreamer, bool VarArg, bool StackProtector, bool FPRMask, bool VRMask, bool EHBlock, bool HasName)

LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSystemZAsmPrinter()

static void printAddress(const MCAsmInfo *MAI, unsigned Base, const MCOperand &DispMO, unsigned Index, raw_ostream &OS)

static time_t getTranslationTime(Module &M)

static const MCSymbolRefExpr * getTLSGetOffset(MCContext &Context)

static MCInst lowerSubvectorStore(const MachineInstr *MI, unsigned Opcode)

static unsigned EmitNop(MCContext &OutContext, MCStreamer &OutStreamer, unsigned NumBytes, const MCSubtargetInfo &STI)

static uint32_t getProductRelease(Module &M)

static MCInst lowerSubvectorLoad(const MachineInstr *MI, unsigned Opcode)

static uint32_t getProductPatch(Module &M)

static MCInst lowerRIEfLow(const MachineInstr *MI, unsigned Opcode)

const TargetLoweringObjectFile & getObjFileLowering() const

Return information about object file lowering.

MCSymbol * getSymbol(const GlobalValue *GV) const

void EmitToStreamer(MCStreamer &S, const MCInst &Inst)

TargetMachine & TM

Target machine description.

const MCAsmInfo * MAI

Target Asm Printer information.

MachineFunction * MF

The current machine function.

virtual void emitStartOfAsmFile(Module &)

This virtual method can be overridden by targets that want to emit something at the start of their fi...

void recordSled(MCSymbol *Sled, const MachineInstr &MI, SledKind Kind, uint8_t Version=0)

MCContext & OutContext

This is the context for the output file that we are streaming.

MCSymbol * createTempSymbol(const Twine &Name) const

std::unique_ptr< MCStreamer > OutStreamer

This is the MCStreamer object for the file we are generating.

const DataLayout & getDataLayout() const

Return information about data layout.

virtual void emitFunctionEntryLabel()

EmitFunctionEntryLabel - Emit the label that is the entrypoint for the function.

const MCSubtargetInfo & getSubtargetInfo() const

Return information about subtarget.

virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, const char *ExtraCode, raw_ostream &OS)

Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant.

const Constant * stripPointerCasts() const

This class represents an Operation in the Expression.

TypeSize getTypeAllocSize(Type *Ty) const

Returns the offset in bytes between successive objects of the specified type, including alignment pad...

unsigned getPointerSize(unsigned AS=0) const

Layout pointer size in bytes, rounded up to a whole number of bytes.

Constant * getPersonalityFn() const

Get the personality function associated with this function.

bool isVarArg() const

isVarArg - Return true if this function takes a variable number of arguments.

bool hasFnAttribute(Attribute::AttrKind Kind) const

Return true if the function has the attribute.

This class is intended to be used as a base class for asm properties and features specific to the tar...

unsigned getAssemblerDialect() const

static const MCBinaryExpr * createAdd(const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx)

static const MCConstantExpr * create(int64_t Value, MCContext &Ctx, bool PrintInHex=false, unsigned SizeInBytes=0)

Context object for machine code objects.

MCSymbol * createTempSymbol()

Create a temporary symbol with a unique name.

MCSectionELF * getELFSection(const Twine &Section, unsigned Type, unsigned Flags)

MCSymbol * getOrCreateSymbol(const Twine &Name)

Lookup the symbol inside with the specified Name.

const Triple & getTargetTriple() const

Base class for the full range of assembler expressions which are needed for parsing.

void print(raw_ostream &OS, const MCAsmInfo *MAI, bool InParens=false) const

MCInstBuilder & addReg(MCRegister Reg)

Add a new register operand.

MCInstBuilder & addImm(int64_t Val)

Add a new integer immediate operand.

MCInstBuilder & addExpr(const MCExpr *Val)

Add a new MCExpr operand.

Instances of this class represent a single low-level machine instruction.

void addOperand(const MCOperand Op)

void setOpcode(unsigned Op)

Instances of this class represent operands of the MCInst class.

static MCOperand createReg(MCRegister Reg)

static MCOperand createImm(int64_t Val)

MCRegister getReg() const

Returns the register number.

const MCExpr * getExpr() const

MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...

Streaming machine code generation interface.

virtual void emitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI)

Emit the given Instruction into the current section.

virtual void emitLabel(MCSymbol *Symbol, SMLoc Loc=SMLoc())

Emit a label for Symbol into the current section.

Generic base class for all target subtargets.

bool hasFeature(unsigned Feature) const

Represent a reference to a symbol from inside an expression.

static const MCSymbolRefExpr * create(const MCSymbol *Symbol, MCContext &Ctx)

MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...

Abstract base class for all machine specific constantpool value subclasses.

The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.

bool hasVarSizedObjects() const

This method may be called any time after instruction selection is complete to determine if the stack ...

uint64_t getStackSize() const

Return the number of bytes that must be allocated to hold all of the fixed size frame objects.

int64_t getOffsetAdjustment() const

Return the correction for frame offsets.

const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const

Returns a reference to call saved info vector for the current function.

bool hasStackProtectorIndex() const

int64_t getObjectOffset(int ObjectIdx) const

Return the assigned stack offset of the specified object from the incoming stack pointer.

unsigned getFunctionNumber() const

getFunctionNumber - Return a unique ID for the current function.

const TargetSubtargetInfo & getSubtarget() const

getSubtarget - Return the subtarget for which this machine code is being compiled.

MachineFrameInfo & getFrameInfo()

getFrameInfo - Return the frame info object for the current function.

MCContext & getContext() const

MachineRegisterInfo & getRegInfo()

getRegInfo - Return information about the registers currently in use.

Function & getFunction()

Return the LLVM function that this machine code represents.

const std::vector< LandingPadInfo > & getLandingPads() const

Return a reference to the landing pad info for the current function.

Ty * getInfo()

getInfo - Keep track of various per-function pieces of information for backends that would like to do...

const TargetMachine & getTarget() const

getTarget - Return the target machine this machine code is compiled with

Representation of each machine instruction.

const MachineFunction * getMF() const

Return the function that contains the basic block that this instruction belongs to.

MachineOperand class - Representation of each machine instruction operand.

const GlobalValue * getGlobal() const

bool isReg() const

isReg - Tests if this is a MO_Register operand.

bool isImm() const

isImm - Tests if this is a MO_Immediate operand.

MachineInstr * getParent()

getParent - Return the instruction that this operand belongs to.

unsigned getTargetFlags() const

bool isGlobal() const

isGlobal - Tests if this is a MO_GlobalAddress operand.

MachineOperandType getType() const

getType - Returns the MachineOperandType for this operand.

const char * getSymbolName() const

getReg - Returns the register number.

@ MO_GlobalAddress

Address of a global value.

@ MO_ExternalSymbol

Name of external global symbol.

const TargetRegisterInfo * getTargetRegisterInfo() const

A Module instance is used to store all the information related to an LLVM module.

MI-level patchpoint operands.

Wrapper class representing virtual and physical registers.

SmallString - A SmallString is just a SmallVector with methods and accessors that make it work better...

StringRef str() const

Explicit conversion to StringRef.

void recordPatchPoint(const MCSymbol &L, const MachineInstr &MI)

Generate a stackmap record for a patchpoint instruction.

void recordStackMap(const MCSymbol &L, const MachineInstr &MI)

Generate a stackmap record for a stackmap instruction.

StringRef - Represent a constant reference to a string, i.e.

constexpr StringRef substr(size_t Start, size_t N=npos) const

Return a reference to the substring from [Start, Start + N).

constexpr size_t size() const

size - Get the string size.

A switch()-like statement whose cases are string literals.

StringSwitch & Case(StringLiteral S, T Value)

void emitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) override

void emitFunctionBodyEnd() override

Targets can override this to emit stuff after the last basic block in the function.

void emitStartOfAsmFile(Module &M) override

This virtual method can be overridden by targets that want to emit something at the start of their fi...

void emitInstruction(const MachineInstr *MI) override

Targets should implement this to emit instructions.

bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, const char *ExtraCode, raw_ostream &OS) override

Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant as...

void emitFunctionEntryLabel() override

EmitFunctionEntryLabel - Emit the label that is the entrypoint for the function.

bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, const char *ExtraCode, raw_ostream &OS) override

Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant.

void emitEndOfAsmFile(Module &M) override

This virtual method can be overridden by targets that want to emit something at the end of their file...

A SystemZ-specific constant pool value.

static const char * getRegisterName(MCRegister Reg)

static const SystemZMCExpr * create(VariantKind Kind, const MCExpr *Expr, MCContext &Ctx)

SystemZ::GPRRegs getSpillGPRRegs() const

unsigned getSizeOfFnParams() const

const SystemZInstrInfo * getInstrInfo() const override

const TargetFrameLowering * getFrameLowering() const override

std::pair< MCInst, const MCSubtargetInfo * > MCInstSTIPair

EXRLT2SymMap EXRLTargets2Sym

const Triple & getTargetTriple() const

const MCSubtargetInfo * getMCSubtargetInfo() const

MCSymbol * getSymbol(const GlobalValue *GV) const

const MCRegisterInfo * getMCRegisterInfo() const

TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...

Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...

std::string str() const

Return the twine contents as a std::string.

Twine concat(const Twine &Suffix) const

static Twine utohexstr(const uint64_t &Val)

StringRef getName() const

Return a constant reference to the value's name.

This class implements an extremely fast bulk output stream that can only output to a stream.

A raw_ostream that writes to an SmallVector or SmallString.

#define llvm_unreachable(msg)

Marks that the current location is not supposed to be reachable.

constexpr char Language[]

Key for Kernel::Metadata::mLanguage.

@ Swift

Calling convention for Swift.

@ C

The default llvm calling convention, compatible with C.

std::error_code convertToEBCDIC(StringRef Source, SmallVectorImpl< char > &Result)

@ MO_ADA_DATA_SYMBOL_ADDR

@ MO_ADA_DIRECT_FUNC_DESC

@ MO_ADA_INDIRECT_FUNC_DESC

unsigned getRegAsGR32(unsigned Reg)

const unsigned GR64Regs[16]

unsigned getRegAsGRH32(unsigned Reg)

unsigned getRegAsVR128(unsigned Reg)

unsigned getRegAsGR64(unsigned Reg)

Reg

All possible values of the reg field in the ModR/M byte.

constexpr size_t NameSize

constexpr uint64_t PointerSize

aarch64 pointer size.

UtcTime< std::chrono::seconds > toUtcTime(std::time_t T)

Convert a std::time_t to a UtcTime.

This is an optimization pass for GlobalISel generic memory operations.

Target & getTheSystemZTarget()

detail::concat_range< ValueT, RangeTs... > concat(RangeTs &&...Ranges)

Returns a concatenated range across two or more ranges.

auto formatv(bool Validate, const char *Fmt, Ts &&...Vals)

void report_fatal_error(Error Err, bool gen_crash_diag=true)

Report a serious error, calling any installed error handler.

@ LLVM_MARK_AS_BITMASK_ENUM

Printable printReg(Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)

Prints virtual and physical registers with or without a TRI instance.

@ MCSA_IndirectSymbol

.indirect_symbol (MachO)

This struct is a compact representation of a valid (non-zero power of two) alignment.

RegisterAsmPrinter - Helper template for registering a target specific assembly printer,...