LLVM: include/llvm/Analysis/TargetTransformInfo.h Source File (original) (raw)

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21#ifndef LLVM_ANALYSIS_TARGETTRANSFORMINFO_H

22#define LLVM_ANALYSIS_TARGETTRANSFORMINFO_H

23

38#include

39#include

40#include

41

42namespace llvm {

43

45typedef unsigned ID;

46}

47

74

75

77

78

79

80

82

83

85

86

88

92

94

100};

101

102

126

127

129

130

132

133

134 const Value *Ptr = nullptr;

135

136

137 Type *DataTy = nullptr;

138

139

141

142

143

144 bool VariableMask = true;

145

146

147 unsigned AddressSpace = 0;

148

149

151

152public:

154 const Value *Ptr, bool VariableMask,

157 : I(I), Ptr(Ptr), DataTy(DataTy), IID(Id), VariableMask(VariableMask),

158 Alignment(Alignment) {}

159

162 unsigned AddressSpace = 0)

163 : DataTy(DataTy), IID(Id), AddressSpace(AddressSpace),

164 Alignment(Alignment) {}

165

167 bool VariableMask, Align Alignment,

169 : I(I), DataTy(DataTy), IID(Id), VariableMask(VariableMask),

170 Alignment(Alignment) {}

171

179};

180

183 Type *RetTy = nullptr;

188

189

192

193public:

197 bool TypeBasedOnly = false, TargetLibraryInfo const *LibInfo = nullptr);

198

203

206

213

222

224 return Arguments.empty();

225 }

226

228};

229

231

233

234

235

236

237

238

239

240

242

243

244

245

246

248

249

250

251

252

254

255

256

258

259

261};

262

271

272class TargetTransformInfo;

275

276

277

279public:

281

282

285

288

289

290

291

292

293

295 std::unique_ptr Impl);

296

297

298

299

300

301

303

304

307

308

309

311

312

313

314

315

316

318 FunctionAnalysisManager::Invalidator &) {

319

320

321 return false;

322 }

323

324

325

326

327

328

329

330

331

332

339

340

341

342

343

344

345

346

347

348

349

350

351

352

353

354

355

356

357

363

364

365

366

367

368

369

370

371

372

373

374

379

380

382

384

385

387

390

394

396 return {1, 1,

397 1, 0};

398 }

400 return {1, 0,

401 1, 0};

402 }

404 return {1, 0,

405 0, 0};

406 }

407 };

408 static_assert(sizeof(PointersChainInfo) == 4, "Was size increase justified?");

409

410

411

412

413

416 const PointersChainInfo &Info, Type *AccessTy,

418

419

420

421

422

423

424

426

429

430

432

433

435

436

437

440

441

442

443

444

445

446

447

448

449

450

452

453

454

456

457

458

460

461

462

463

468

469

470

471

472

473

474

475

476

477

478

479

480

481

484 TargetCostKind CostKind) const;

485

486

487

493

494

495

497

498

499

500

501

503

504

505

506

507

508

509

510

511

512

514

515

516

517

518

519

520

521

523

524

525

527

528

530

531

532

533

534

535

536

537

538

539

540

541

542

543

544

545

546

548

549

550

551

552

555

557

558

559

562

564

566

567 LLVM_ABI std::pair<const Value *, unsigned>

569

570

571

572

573

574

577 Value *NewV) const;

578

579

580

581

582

583

584

585

586

587

588

589

590

592

605

606

608

609

610

611

612

613

614

616

617

618

619

620

621

622

623

624

625

627

628

630

631

633

634

635

637

638

639

640

642

644

645

646

647

649

650

651

653

654

655

657

658

659

660

662

663

665

666

667

669

671

672

674

675

677

679

681

683

684

685

686

688

689

691

693

694

696

697

698

699

701

703 };

704

705

706

707

711

712

713

718

719

720

722

723

724

726

727

728

729

730

731

732

735

736

738

739

740

742

744

746

747

748

749

751

752

754 };

755

756

757

758

761

762

763

764

765

766

767

768

769 LLVM_ABI std::optional<Instruction *>

771

772

773 LLVM_ABI std::optional<Value *>

776 bool &KnownBitsComputed) const;

777

778

781 APInt &UndefElts2, APInt &UndefElts3,

783 SimplifyAndSetOp) const;

784

785

786

787

788

789

790

791

792

793

794

795

796

798

799

800

801

803

804

805

806

807

809

810

811

812

813

815

816

817

818

819

820

821

822

823

824

825

827 int64_t BaseOffset, bool HasBaseReg,

828 int64_t Scale, unsigned AddrSpace = 0,

830 int64_t ScalableOffset = 0) const;

831

832

835

836

837

838

840

841

842

844

845

847

848

849

850

852

853

854

858

859

867

868

871

872

877

878

882

886

887

889

891

892

893

896

897

899

901

902

904 Align Alignment) const;

905

906

908 Align Alignment) const;

909

910

912 Align Alignment) const;

913

915

916

918

919

920

921

924 unsigned AddrSpace) const;

925

926

928 Type *DataType) const;

929

930

931

932

933

934

935

936

938 unsigned Opcode1,

940

941

943

944

945

946

947

948

950

951

952

953

954

955

957

958

960

961

962

963

964

965

966

969 bool HasBaseReg, int64_t Scale,

970 unsigned AddrSpace = 0) const;

971

972

973

974

975

977

978

979

980

982

983

984

986

988

989

991

992

994

995

996

998

999

1000

1002

1003

1005

1006

1007

1009

1010

1011

1013

1015

1016

1018 unsigned ScalarOpdIdx) const;

1019

1020

1021

1022

1024 int OpdIdx) const;

1025

1026

1027

1030 int RetIdx) const;

1031

1032

1033

1034

1035

1037 VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract,

1040

1041

1042

1045

1046

1047

1048

1050

1051

1053

1054

1056

1057

1059

1060

1061

1063

1065

1066

1068

1069

1071

1072

1073

1074

1075

1076

1077

1078

1079

1081

1082

1083

1084

1086

1087

1088

1089

1090

1091

1092

1093

1094

1095

1097 };

1099 bool IsZeroCmp) const;

1100

1101

1103

1104

1105

1106

1107

1109

1110

1112

1113

1114

1115

1117

1118

1119

1120

1121

1122

1123

1124

1126

1127

1132 unsigned *Fast = nullptr) const;

1133

1134

1136

1137

1139

1140

1141

1142

1143

1144

1145

1147

1148

1149

1150

1151

1153

1154

1155

1157

1158

1159

1162

1163

1164

1165

1173

1174

1175

1176

1177

1178

1179

1180

1182 const APInt &Imm,

1183 Type *Ty) const;

1184

1185

1186

1187

1188

1189

1190

1193

1194

1195

1196

1197

1198

1199

1218

1219

1226

1227

1233

1234

1235

1236

1258

1259

1261

1262

1263

1265

1266

1267

1268

1269

1270

1271

1272

1273

1274

1275

1276

1278 Type *Ty = nullptr) const;

1279

1280

1282

1284

1285

1287

1288

1290

1291

1292

1294

1295

1297

1298

1300

1301

1302

1303

1304

1305

1306

1307

1310

1311

1312

1313

1314

1316

1317

1318

1319

1321

1322

1323

1324

1325

1326

1327

1328

1329

1331 Type *ScalarValTy) const;

1332

1333

1334

1335

1337 const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const;

1338

1339

1341

1342

1351

1352

1354

1355

1356 LLVM_ABI std::optional

1358

1359

1361

1362

1363

1364

1366

1367

1368

1369

1370

1371

1372

1373

1374

1375

1376

1377

1378

1379

1380

1381

1382

1383

1385 unsigned NumStridedMemAccesses,

1386 unsigned NumPrefetches,

1387 bool HasCall) const;

1388

1389

1390

1391

1393

1394

1396

1397

1399

1400

1401

1402

1403

1404

1405

1406

1407

1408

1409

1410

1411

1412

1413

1414

1415

1416

1417

1418

1420 unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType,

1424

1425

1426

1427

1429

1430

1432

1433

1434

1435

1436

1437

1438

1439

1440

1441

1442

1443

1444

1445

1446

1447

1448

1449

1450

1452 unsigned Opcode, Type *Ty,

1457 const TargetLibraryInfo *TLibInfo = nullptr) const;

1458

1459

1460

1461

1462

1463

1464

1465

1467 VectorType *VecTy, unsigned Opcode0, unsigned Opcode1,

1468 const SmallBitVector &OpcodeMask,

1470

1471

1472

1473

1474

1475

1476

1477

1479 ShuffleKind Kind, VectorType *DstTy, VectorType *SrcTy,

1480 ArrayRef Mask = {},

1483 const Instruction *CxtI = nullptr) const;

1484

1485

1486

1487

1488

1489

1490

1491

1492

1493

1494

1495

1496

1497

1498

1499

1500

1501

1502

1503

1504

1513

1514

1515

1516

1517

1518

1520

1521

1522

1523

1528

1529

1530

1534

1535

1536

1540

1541

1542

1543

1544

1545

1546

1547

1554

1555

1556

1557

1558

1559

1562 unsigned Index = -1,

1563 const Value *Op0 = nullptr,

1564 const Value *Op1 = nullptr) const;

1565

1566

1567

1568

1569

1570

1571

1572

1573

1574

1578 ArrayRef<std::tuple<Value *, User *, int>> ScalarUserAndIdx) const;

1579

1580

1581

1582

1583

1584

1585

1588 unsigned Index = -1) const;

1589

1590

1591

1592

1593

1596 unsigned Index) const;

1597

1598

1599

1600

1603

1604

1605

1606

1607

1608

1610 Type *EltTy, int ReplicationFactor, int VF, const APInt &DemandedDstElts,

1612

1613

1614

1615

1617 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace,

1621

1622

1623

1624

1625

1626

1627

1628

1629

1630

1631

1633 unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef Indices,

1636 bool UseMaskForCond = false, bool UseMaskForGaps = false) const;

1637

1638

1639

1641 return FMF && !(*FMF).allowReassoc();

1642 }

1643

1644

1645

1646

1647

1648

1649

1650

1651

1652

1653

1654

1655

1656

1657

1658

1659

1660

1661

1662

1663

1664

1665

1666

1667

1669 unsigned Opcode, VectorType *Ty, std::optional FMF,

1671

1675

1676

1677

1678

1679

1680

1682 bool IsUnsigned, unsigned RedOpcode, Type *ResTy, VectorType *Ty,

1684

1685

1686

1687

1688

1690 unsigned Opcode, bool IsUnsigned, Type *ResTy, VectorType *Ty,

1691 std::optional FMF,

1693

1694

1695

1696

1699

1700

1701

1705

1706

1710

1711

1712

1714

1715

1716

1717

1718

1719

1720

1721

1725

1726

1727

1728

1729

1730

1733

1734

1735

1736

1737

1740

1741

1742

1744

1745

1746

1747

1748

1751 bool CanCreate = true) const;

1752

1753

1756 unsigned DestAddrSpace, Align SrcAlign, Align DestAlign,

1757 std::optional<uint32_t> AtomicElementSize = std::nullopt) const;

1758

1759

1760

1761

1762

1763

1764

1767 unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace,

1769 std::optional<uint32_t> AtomicCpySize = std::nullopt) const;

1770

1771

1772

1774 const Function *Callee) const;

1775

1776

1777

1778

1779

1780

1781

1784 unsigned DefaultCallPenalty) const;

1785

1786

1787

1788

1789

1793

1794

1802

1803

1805

1806

1808

1809

1810

1812

1813

1815

1816

1818

1819

1821 Align Alignment,

1822 unsigned AddrSpace) const;

1823

1824

1826 Align Alignment,

1827 unsigned AddrSpace) const;

1828

1829

1832

1833

1835

1836

1837

1839 unsigned ChainSizeInBytes,

1841

1842

1843

1845 unsigned ChainSizeInBytes,

1847

1848

1849

1850

1851

1853

1854

1855

1857

1858

1859

1861

1862

1863

1864

1865

1866

1867

1868

1869

1870

1871

1872

1874

1875

1876

1878

1879

1880

1882

1883

1884

1886

1888

1889

1890

1893

1894

1895

1897

1898

1899

1901

1902

1904

1905

1907

1908

1909

1910

1911

1912

1914

1915

1916

1917

1918

1919

1922

1923

1924

1925

1926

1927

1929

1939

1940

1941

1942

1943

1945

1946

1947

1948

1949

1951

1957 };

1958

1959

1960

1963

1964

1965

1966

1967

1968

1969

1970

1971

1972

1973

1975

1976

1977

1979

1980

1981

1983

1984

1986

1987

1989

1990

1991

1994

1995

1996

1997

2000 SmallVectorImpl<std::pair<StringRef, int64_t>> &LB) const;

2001

2002

2003

2005

2006private:

2007 std::unique_ptr TTIImpl;

2008};

2009

2010

2011

2012

2013

2014

2015

2016

2017

2018

2019

2020

2022public:

2024

2025

2026

2027

2028

2030

2031

2032

2033

2034

2037

2038

2040 : TTICallback(Arg.TTICallback) {}

2042 : TTICallback(std::move(Arg.TTICallback)) {}

2044 TTICallback = RHS.TTICallback;

2045 return *this;

2046 }

2048 TTICallback = std::move(RHS.TTICallback);

2049 return *this;

2050 }

2051

2053

2054private:

2057

2058

2059

2060

2061

2062

2063

2064

2065

2066

2067

2068 std::function<Result(const Function &)> TTICallback;

2069

2070

2072};

2073

2074

2075

2076

2077

2080 std::optional TTI;

2081

2082 virtual void anchor();

2083

2084public:

2086

2087

2088

2089

2090

2092

2094

2096};

2097

2098

2099

2100

2101

2104

2105}

2106

2107#endif

This file implements a class to represent arbitrary precision integral constant values and operations...

MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL

Atomic ordering constants.

Analysis containing CSE Info

static cl::opt< OutputCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(OutputCostKind::RecipThroughput), cl::values(clEnumValN(OutputCostKind::RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(OutputCostKind::Latency, "latency", "Instruction latency"), clEnumValN(OutputCostKind::CodeSize, "code-size", "Code size"), clEnumValN(OutputCostKind::SizeAndLatency, "size-latency", "Code size and latency"), clEnumValN(OutputCostKind::All, "all", "Print all cost kinds")))

TargetTransformInfo::VPLegalization VPLegalization

static cl::opt< bool > ForceNestedLoop("force-nested-hardware-loop", cl::Hidden, cl::init(false), cl::desc("Force allowance of nested hardware loops"))

static cl::opt< bool > ForceHardwareLoopPHI("force-hardware-loop-phi", cl::Hidden, cl::init(false), cl::desc("Force hardware loop counter to be updated through a phi"))

This header defines various interfaces for pass management in LLVM.

This file defines an InstructionCost class that is used when calculating the cost of an instruction,...

const AbstractManglingParser< Derived, Alloc >::OperatorInfo AbstractManglingParser< Derived, Alloc >::Ops[]

uint64_t IntrinsicInst * II

static cl::opt< RegAllocEvictionAdvisorAnalysisLegacy::AdvisorMode > Mode("regalloc-enable-advisor", cl::Hidden, cl::init(RegAllocEvictionAdvisorAnalysisLegacy::AdvisorMode::Default), cl::desc("Enable regalloc advisor mode"), cl::values(clEnumValN(RegAllocEvictionAdvisorAnalysisLegacy::AdvisorMode::Default, "default", "Default"), clEnumValN(RegAllocEvictionAdvisorAnalysisLegacy::AdvisorMode::Release, "release", "precompiled"), clEnumValN(RegAllocEvictionAdvisorAnalysisLegacy::AdvisorMode::Development, "development", "for training")))

Class for arbitrary precision integers.

an instruction to allocate memory on the stack

ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...

Class to represent array types.

A cache of @llvm.assume calls within a function.

LLVM Basic Block Representation.

BlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate IR basic block frequen...

Conditional or Unconditional Branch instruction.

Base class for all callable instructions (InvokeInst and CallInst) Holds everything related to callin...

Predicate

This enumeration lists the possible predicates for CmpInst subclasses.

This is an important base class in LLVM.

A parsed version of the target data layout string in and methods for querying it.

Concrete subclass of DominatorTreeBase that is used to compute a normal dominator tree.

Convenience struct for specifying and reasoning about fast-math flags.

ImmutablePass class - This class is used to provide information that does not need to be run.

The core instruction combiner logic.

static InstructionCost getInvalid(CostType Val=0)

Class to represent integer types.

Drive the analysis of interleaved memory accesses in the loop.

FastMathFlags getFlags() const

Definition TargetTransformInfo.h:217

const TargetLibraryInfo * getLibInfo() const

Definition TargetTransformInfo.h:221

const SmallVectorImpl< Type * > & getArgTypes() const

Definition TargetTransformInfo.h:220

Type * getReturnType() const

Definition TargetTransformInfo.h:216

bool skipScalarizationCost() const

Definition TargetTransformInfo.h:227

const SmallVectorImpl< const Value * > & getArgs() const

Definition TargetTransformInfo.h:219

LLVM_ABI IntrinsicCostAttributes(Intrinsic::ID Id, const CallBase &CI, InstructionCost ScalarCost=InstructionCost::getInvalid(), bool TypeBasedOnly=false, TargetLibraryInfo const *LibInfo=nullptr)

InstructionCost getScalarizationCost() const

Definition TargetTransformInfo.h:218

const IntrinsicInst * getInst() const

Definition TargetTransformInfo.h:215

Intrinsic::ID getID() const

Definition TargetTransformInfo.h:214

bool isTypeBasedOnly() const

Definition TargetTransformInfo.h:223

A wrapper class for inspecting calls to intrinsic functions.

This is an important class for using LLVM in a threaded context.

An instruction for reading from memory.

LoopVectorizationLegality checks if it is legal to vectorize a loop, and to what vectorization factor...

Represents a single loop in the control flow graph.

Information for memory intrinsic cost model.

Definition TargetTransformInfo.h:128

Align getAlignment() const

Definition TargetTransformInfo.h:178

unsigned getAddressSpace() const

Definition TargetTransformInfo.h:177

Type * getDataType() const

Definition TargetTransformInfo.h:175

const Value * getPointer() const

Definition TargetTransformInfo.h:174

LLVM_ABI MemIntrinsicCostAttributes(Intrinsic::ID Id, Type *DataTy, bool VariableMask, Align Alignment, const Instruction *I=nullptr)

Definition TargetTransformInfo.h:166

bool getVariableMask() const

Definition TargetTransformInfo.h:176

LLVM_ABI MemIntrinsicCostAttributes(Intrinsic::ID Id, Type *DataTy, Align Alignment, unsigned AddressSpace=0)

Definition TargetTransformInfo.h:160

Intrinsic::ID getID() const

Definition TargetTransformInfo.h:172

const Instruction * getInst() const

Definition TargetTransformInfo.h:173

LLVM_ABI MemIntrinsicCostAttributes(Intrinsic::ID Id, Type *DataTy, const Value *Ptr, bool VariableMask, Align Alignment, const Instruction *I=nullptr)

Definition TargetTransformInfo.h:153

A set of analyses that are preserved following a run of a transformation pass.

Analysis providing profile information.

The RecurrenceDescriptor is used to identify recurrences variables in a loop.

This class represents an analyzed expression in the program.

The main scalar evolution driver.

This is a 'bitvector' (really, a variable-sized bit array), optimized for the case when the array is ...

This class consists of common code factored out of the SmallVector class to reduce code duplication b...

This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.

StackOffset holds a fixed and a scalable offset in bytes.

An instruction for storing to memory.

Analysis pass providing the TargetTransformInfo.

Definition TargetTransformInfo.h:2021

TargetIRAnalysis(const TargetIRAnalysis &Arg)

Definition TargetTransformInfo.h:2039

TargetIRAnalysis & operator=(const TargetIRAnalysis &RHS)

Definition TargetTransformInfo.h:2043

LLVM_ABI Result run(const Function &F, FunctionAnalysisManager &)

TargetTransformInfo Result

Definition TargetTransformInfo.h:2023

LLVM_ABI TargetIRAnalysis()

Default construct a target IR analysis.

TargetIRAnalysis & operator=(TargetIRAnalysis &&RHS)

Definition TargetTransformInfo.h:2047

TargetIRAnalysis(TargetIRAnalysis &&Arg)

Definition TargetTransformInfo.h:2041

Provides information about what library functions are available for the current target.

Base class for use as a mix-in that aids implementing a TargetTransformInfo-compatible class.

TargetTransformInfoWrapperPass()

We must provide a default constructor for the pass but it should never be used.

TargetTransformInfo & getTTI(const Function &F)

static char ID

Definition TargetTransformInfo.h:2085

This pass provides access to the codegen interfaces that are needed for IR-level transformations.

Definition TargetTransformInfo.h:278

LLVM_ABI bool getTgtMemIntrinsic(IntrinsicInst *Inst, MemIntrinsicInfo &Info) const

LLVM_ABI Value * getOrCreateResultFromMemIntrinsic(IntrinsicInst *Inst, Type *ExpectedType, bool CanCreate=true) const

LLVM_ABI bool isLegalToVectorizeLoad(LoadInst *LI) const

LLVM_ABI std::optional< unsigned > getVScaleForTuning() const

ReductionShuffle

Definition TargetTransformInfo.h:1887

@ Pairwise

Definition TargetTransformInfo.h:1887

@ SplitHalf

Definition TargetTransformInfo.h:1887

static LLVM_ABI CastContextHint getCastContextHint(const Instruction *I)

Calculates a CastContextHint from I.

LLVM_ABI unsigned getMaxNumArgs() const

LLVM_ABI bool addrspacesMayAlias(unsigned AS0, unsigned AS1) const

Return false if a AS0 address cannot possibly alias a AS1 address.

LLVM_ABI bool isLegalMaskedScatter(Type *DataType, Align Alignment) const

Return true if the target supports masked scatter.

LLVM_ABI bool shouldBuildLookupTables() const

Return true if switches should be turned into lookup tables for the target.

LLVM_ABI bool isLegalToVectorizeStore(StoreInst *SI) const

LLVM_ABI InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index=-1, const Value *Op0=nullptr, const Value *Op1=nullptr) const

LLVM_ABI InstructionCost getMulAccReductionCost(bool IsUnsigned, unsigned RedOpcode, Type *ResTy, VectorType *Ty, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput) const

Calculate the cost of an extended reduction pattern, similar to getArithmeticReductionCost of an Add/...

LLVM_ABI bool areTypesABICompatible(const Function *Caller, const Function *Callee, ArrayRef< Type * > Types) const

LLVM_ABI bool enableAggressiveInterleaving(bool LoopHasReductions) const

Don't restrict interleaved unrolling to small loops.

LLVM_ABI InstructionCost getScalarizationOverhead(VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract, TTI::TargetCostKind CostKind, bool ForPoisonSrc=true, ArrayRef< Value * > VL={}) const

Estimate the overhead of scalarizing an instruction.

LLVM_ABI bool isMultiversionedFunction(const Function &F) const

Returns true if this is an instance of a function with multiple versions.

LLVM_ABI InstructionUniformity getInstructionUniformity(const Value *V) const

Get target-specific uniformity information for an instruction.

LLVM_ABI bool isFCmpOrdCheaperThanFCmpZero(Type *Ty) const

Return true if it is faster to check if a floating-point value is NaN (or not-NaN) versus a compariso...

LLVM_ABI bool isLegalMaskedStore(Type *DataType, Align Alignment, unsigned AddressSpace, MaskKind MaskKind=VariableOrConstantMask) const

Return true if the target supports masked store.

LLVM_ABI bool supportsEfficientVectorElementLoadStore() const

If target has efficient vector element load/store instructions, it can return true here so that inser...

LLVM_ABI unsigned getAssumedAddrSpace(const Value *V) const

LLVM_ABI bool preferAlternateOpcodeVectorization() const

LLVM_ABI bool shouldDropLSRSolutionIfLessProfitable() const

Return true if LSR should drop a found solution if it's calculated to be less profitable than the bas...

LLVM_ABI bool isLSRCostLess(const TargetTransformInfo::LSRCost &C1, const TargetTransformInfo::LSRCost &C2) const

Return true if LSR cost of C1 is lower than C2.

LLVM_ABI unsigned getPrefetchDistance() const

LLVM_ABI Type * getMemcpyLoopLoweringType(LLVMContext &Context, Value *Length, unsigned SrcAddrSpace, unsigned DestAddrSpace, Align SrcAlign, Align DestAlign, std::optional< uint32_t > AtomicElementSize=std::nullopt) const

LLVM_ABI bool isLegalMaskedExpandLoad(Type *DataType, Align Alignment) const

Return true if the target supports masked expand load.

LLVM_ABI bool prefersVectorizedAddressing() const

Return true if target doesn't mind addresses in vectors.

LLVM_ABI InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, OperandValueInfo Op1Info={OK_AnyValue, OP_None}, OperandValueInfo Op2Info={OK_AnyValue, OP_None}, const Instruction *I=nullptr) const

LLVM_ABI bool hasBranchDivergence(const Function *F=nullptr) const

Return true if branch divergence exists.

LLVM_ABI MemCmpExpansionOptions enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const

bool invalidate(Function &, const PreservedAnalyses &, FunctionAnalysisManager::Invalidator &)

Handle the invalidation of this information.

Definition TargetTransformInfo.h:317

LLVM_ABI void getUnrollingPreferences(Loop *L, ScalarEvolution &, UnrollingPreferences &UP, OptimizationRemarkEmitter *ORE) const

Get target-customized preferences for the generic loop unrolling transformation.

LLVM_ABI bool shouldBuildLookupTablesForConstant(Constant *C) const

Return true if switches should be turned into lookup tables containing this constant value for the ta...

LLVM_ABI bool supportsTailCallFor(const CallBase *CB) const

If target supports tail call on CB.

LLVM_ABI std::optional< Instruction * > instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const

Targets can implement their own combinations for target-specific intrinsics.

LLVM_ABI bool isProfitableLSRChainElement(Instruction *I) const

LLVM_ABI TypeSize getRegisterBitWidth(RegisterKind K) const

MaskKind

Some targets only support masked load/store with a constant mask.

Definition TargetTransformInfo.h:873

@ VariableOrConstantMask

Definition TargetTransformInfo.h:874

@ ConstantMask

Definition TargetTransformInfo.h:875

LLVM_ABI unsigned getInlineCallPenalty(const Function *F, const CallBase &Call, unsigned DefaultCallPenalty) const

Returns a penalty for invoking call Call in F.

LLVM_ABI bool hasActiveVectorLength() const

LLVM_ABI bool isExpensiveToSpeculativelyExecute(const Instruction *I) const

Return true if the cost of the instruction is too high to speculatively execute and should be kept be...

LLVM_ABI bool preferFixedOverScalableIfEqualCost(bool IsEpilogue) const

LLVM_ABI bool isLegalMaskedGather(Type *DataType, Align Alignment) const

Return true if the target supports masked gather.

LLVM_ABI InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, OperandValueInfo OpdInfo={OK_AnyValue, OP_None}, const Instruction *I=nullptr) const

LLVM_ABI std::optional< unsigned > getMaxVScale() const

LLVM_ABI InstructionCost getReplicationShuffleCost(Type *EltTy, int ReplicationFactor, int VF, const APInt &DemandedDstElts, TTI::TargetCostKind CostKind) const

LLVM_ABI bool allowVectorElementIndexingUsingGEP() const

Returns true if GEP should not be used to index into vectors for this target.

LLVM_ABI InstructionCost getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, bool UseMaskForCond=false, bool UseMaskForGaps=false) const

LLVM_ABI bool isSingleThreaded() const

LLVM_ABI std::optional< Value * > simplifyDemandedVectorEltsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp) const

Can be used to implement target-specific instruction combining.

LLVM_ABI bool enableOrderedReductions() const

Return true if we should be enabling ordered reductions for the target.

InstructionCost getInstructionCost(const User *U, TargetCostKind CostKind) const

This is a helper function which calls the three-argument getInstructionCost with Operands which are t...

Definition TargetTransformInfo.h:488

LLVM_ABI unsigned getInliningCostBenefitAnalysisProfitableMultiplier() const

LLVM_ABI InstructionCost getShuffleCost(ShuffleKind Kind, VectorType *DstTy, VectorType *SrcTy, ArrayRef< int > Mask={}, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, int Index=0, VectorType *SubTp=nullptr, ArrayRef< const Value * > Args={}, const Instruction *CxtI=nullptr) const

LLVM_ABI InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const

LLVM_ABI InstructionCost getArithmeticReductionCost(unsigned Opcode, VectorType *Ty, std::optional< FastMathFlags > FMF, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput) const

Calculate the cost of vector reduction intrinsics.

LLVM_ABI unsigned getAtomicMemIntrinsicMaxElementSize() const

LLVM_ABI InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind=TTI::TCK_SizeAndLatency, const Instruction *I=nullptr) const

LLVM_ABI bool LSRWithInstrQueries() const

Return true if the loop strength reduce pass should make Instruction* based TTI queries to isLegalAdd...

LLVM_ABI unsigned getStoreVectorFactor(unsigned VF, unsigned StoreSize, unsigned ChainSizeInBytes, VectorType *VecTy) const

LLVM_ABI VPLegalization getVPLegalizationStrategy(const VPIntrinsic &PI) const

static LLVM_ABI PartialReductionExtendKind getPartialReductionExtendKind(Instruction *I)

Get the kind of extension that an instruction represents.

LLVM_ABI bool shouldConsiderVectorizationRegPressure() const

LLVM_ABI bool enableWritePrefetching() const

LLVM_ABI bool shouldTreatInstructionLikeSelect(const Instruction *I) const

Should the Select Optimization pass treat the given instruction like a select, potentially converting...

LLVM_ABI bool isNoopAddrSpaceCast(unsigned FromAS, unsigned ToAS) const

LLVM_ABI bool shouldMaximizeVectorBandwidth(TargetTransformInfo::RegisterKind K) const

LLVM_ABI TailFoldingStyle getPreferredTailFoldingStyle(bool IVUpdateMayOverflow=true) const

Query the target what the preferred style of tail folding is.

LLVM_ABI InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr, ArrayRef< const Value * > Operands, Type *AccessType=nullptr, TargetCostKind CostKind=TCK_SizeAndLatency) const

Estimate the cost of a GEP operation when lowered.

LLVM_ABI bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const

LLVM_ABI bool isLegalInterleavedAccessType(VectorType *VTy, unsigned Factor, Align Alignment, unsigned AddrSpace) const

Return true is the target supports interleaved access for the given vector type VTy,...

LLVM_ABI unsigned getRegUsageForType(Type *Ty) const

Returns the estimated number of registers required to represent Ty.

LLVM_ABI bool isLegalBroadcastLoad(Type *ElementTy, ElementCount NumElements) const

\Returns true if the target supports broadcasting a load to a vector of type <NumElements x ElementTy...

LLVM_ABI bool isIndexedStoreLegal(enum MemIndexedMode Mode, Type *Ty) const

LLVM_ABI std::pair< const Value *, unsigned > getPredicatedAddrSpace(const Value *V) const

LLVM_ABI InstructionCost getExtendedReductionCost(unsigned Opcode, bool IsUnsigned, Type *ResTy, VectorType *Ty, std::optional< FastMathFlags > FMF, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput) const

Calculate the cost of an extended reduction pattern, similar to getArithmeticReductionCost of a reduc...

LLVM_ABI unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) const

LLVM_ABI ReductionShuffle getPreferredExpandedReductionShuffle(const IntrinsicInst *II) const

static LLVM_ABI OperandValueInfo getOperandInfo(const Value *V)

Collect properties of V used in cost analysis, e.g. OP_PowerOf2.

LLVM_ABI unsigned getRegisterClassForType(bool Vector, Type *Ty=nullptr) const

LLVM_ABI bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace=0, Instruction *I=nullptr, int64_t ScalableOffset=0) const

Return true if the addressing mode represented by AM is legal for this target, for a load/store of th...

LLVM_ABI PopcntSupportKind getPopcntSupport(unsigned IntTyWidthInBit) const

Return hardware support for population count.

LLVM_ABI unsigned getEstimatedNumberOfCaseClusters(const SwitchInst &SI, unsigned &JTSize, ProfileSummaryInfo *PSI, BlockFrequencyInfo *BFI) const

LLVM_ABI bool isElementTypeLegalForScalableVector(Type *Ty) const

LLVM_ABI bool forceScalarizeMaskedGather(VectorType *Type, Align Alignment) const

Return true if the target forces scalarizing of llvm.masked.gather intrinsics.

LLVM_ABI unsigned getMaxPrefetchIterationsAhead() const

LLVM_ABI bool canHaveNonUndefGlobalInitializerInAddressSpace(unsigned AS) const

Return true if globals in this address space can have initializers other than undef.

LLVM_ABI ElementCount getMinimumVF(unsigned ElemWidth, bool IsScalable) const

LLVM_ABI InstructionCost getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, const APInt &Imm, Type *Ty, TargetCostKind CostKind) const

LLVM_ABI bool enableMaskedInterleavedAccessVectorization() const

Enable matching of interleaved access groups that contain predicated accesses or gaps and therefore v...

LLVM_ABI InstructionCost getIntImmCostInst(unsigned Opc, unsigned Idx, const APInt &Imm, Type *Ty, TargetCostKind CostKind, Instruction *Inst=nullptr) const

Return the expected cost of materialization for the given integer immediate of the specified type for...

LLVM_ABI bool isLegalStridedLoadStore(Type *DataType, Align Alignment) const

Return true if the target supports strided load.

LLVM_ABI TargetTransformInfo & operator=(TargetTransformInfo &&RHS)

LLVM_ABI InstructionCost getMinMaxReductionCost(Intrinsic::ID IID, VectorType *Ty, FastMathFlags FMF=FastMathFlags(), TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput) const

TargetCostKind

The kind of cost model.

Definition TargetTransformInfo.h:333

@ TCK_RecipThroughput

Reciprocal throughput.

Definition TargetTransformInfo.h:334

@ TCK_CodeSize

Instruction code size.

Definition TargetTransformInfo.h:336

@ TCK_SizeAndLatency

The weighted sum of size and latency.

Definition TargetTransformInfo.h:337

@ TCK_Latency

The latency of instruction.

Definition TargetTransformInfo.h:335

LLVM_ABI InstructionCost getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, TTI::OperandValueInfo Opd1Info={TTI::OK_AnyValue, TTI::OP_None}, TTI::OperandValueInfo Opd2Info={TTI::OK_AnyValue, TTI::OP_None}, ArrayRef< const Value * > Args={}, const Instruction *CxtI=nullptr, const TargetLibraryInfo *TLibInfo=nullptr) const

This is an approximation of reciprocal throughput of a math/logic op.

LLVM_ABI bool enableSelectOptimize() const

Should the Select Optimization pass be enabled and ran.

LLVM_ABI bool collectFlatAddressOperands(SmallVectorImpl< int > &OpIndexes, Intrinsic::ID IID) const

Return any intrinsic address operand indexes which may be rewritten if they use a flat address space ...

OperandValueProperties

Additional properties of an operand's values.

Definition TargetTransformInfo.h:1228

@ OP_NegatedPowerOf2

Definition TargetTransformInfo.h:1231

@ OP_None

Definition TargetTransformInfo.h:1229

@ OP_PowerOf2

Definition TargetTransformInfo.h:1230

LLVM_ABI int getInliningLastCallToStaticBonus() const

LLVM_ABI InstructionCost getPointersChainCost(ArrayRef< const Value * > Ptrs, const Value *Base, const PointersChainInfo &Info, Type *AccessTy, TargetCostKind CostKind=TTI::TCK_RecipThroughput) const

Estimate the cost of a chain of pointers (typically pointer operands of a chain of loads or stores wi...

LLVM_ABI bool isVScaleKnownToBeAPowerOfTwo() const

LLVM_ABI bool isIndexedLoadLegal(enum MemIndexedMode Mode, Type *Ty) const

LLVM_ABI unsigned getMaximumVF(unsigned ElemWidth, unsigned Opcode) const

LLVM_ABI bool isLegalICmpImmediate(int64_t Imm) const

Return true if the specified immediate is legal icmp immediate, that is the target has icmp instructi...

LLVM_ABI bool isTypeLegal(Type *Ty) const

Return true if this type is legal.

static bool requiresOrderedReduction(std::optional< FastMathFlags > FMF)

A helper function to determine the type of reduction algorithm used for a given Opcode and set of Fas...

Definition TargetTransformInfo.h:1640

LLVM_ABI bool isLegalToVectorizeReduction(const RecurrenceDescriptor &RdxDesc, ElementCount VF) const

LLVM_ABI std::optional< unsigned > getCacheAssociativity(CacheLevel Level) const

LLVM_ABI bool isLegalNTLoad(Type *DataType, Align Alignment) const

Return true if the target supports nontemporal load.

LLVM_ABI InstructionCost getMemcpyCost(const Instruction *I) const

LLVM_ABI unsigned adjustInliningThreshold(const CallBase *CB) const

LLVM_ABI bool isLegalAddImmediate(int64_t Imm) const

Return true if the specified immediate is legal add immediate, that is the target has add instruction...

LLVM_ABI bool isTargetIntrinsicWithStructReturnOverloadAtField(Intrinsic::ID ID, int RetIdx) const

Identifies if the vector form of the intrinsic that returns a struct is overloaded at the struct elem...

LLVM_ABI unsigned getLoadVectorFactor(unsigned VF, unsigned LoadSize, unsigned ChainSizeInBytes, VectorType *VecTy) const

LLVM_ABI InstructionCost getMemIntrinsicInstrCost(const MemIntrinsicCostAttributes &MICA, TTI::TargetCostKind CostKind) const

LLVM_ABI bool canSaveCmp(Loop *L, BranchInst **BI, ScalarEvolution *SE, LoopInfo *LI, DominatorTree *DT, AssumptionCache *AC, TargetLibraryInfo *LibInfo) const

Return true if the target can save a compare for loop count, for example hardware loop saves a compar...

LLVM_ABI bool isTargetIntrinsicTriviallyScalarizable(Intrinsic::ID ID) const

LLVM_ABI Value * rewriteIntrinsicWithAddressSpace(IntrinsicInst *II, Value *OldV, Value *NewV) const

Rewrite intrinsic call II such that OldV will be replaced with NewV, which has a different address sp...

LLVM_ABI InstructionCost getCostOfKeepingLiveOverCall(ArrayRef< Type * > Tys) const

RegisterKind

Definition TargetTransformInfo.h:1283

@ RGK_FixedWidthVector

Definition TargetTransformInfo.h:1283

@ RGK_ScalableVector

Definition TargetTransformInfo.h:1283

@ RGK_Scalar

Definition TargetTransformInfo.h:1283

LLVM_ABI unsigned getMinPrefetchStride(unsigned NumMemAccesses, unsigned NumStridedMemAccesses, unsigned NumPrefetches, bool HasCall) const

Some HW prefetchers can handle accesses up to a certain constant stride.

LLVM_ABI bool shouldPrefetchAddressSpace(unsigned AS) const

LLVM_ABI InstructionCost getIntImmCost(const APInt &Imm, Type *Ty, TargetCostKind CostKind) const

Return the expected cost of materializing for the given integer immediate of the specified type.

LLVM_ABI unsigned getMinVectorRegisterBitWidth() const

LLVM_ABI InstructionCost getAddressComputationCost(Type *PtrTy, ScalarEvolution *SE, const SCEV *Ptr, TTI::TargetCostKind CostKind) const

LLVM_ABI bool isLegalNTStore(Type *DataType, Align Alignment) const

Return true if the target supports nontemporal store.

LLVM_ABI InstructionCost getPartialReductionCost(unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType, ElementCount VF, PartialReductionExtendKind OpAExtend, PartialReductionExtendKind OpBExtend, std::optional< unsigned > BinOp, TTI::TargetCostKind CostKind) const

LLVM_ABI unsigned getFlatAddressSpace() const

Returns the address space ID for a target's 'flat' address space.

LLVM_ABI bool preferToKeepConstantsAttached(const Instruction &Inst, const Function &Fn) const

It can be advantageous to detach complex constants from their uses to make their generation cheaper.

LLVM_ABI bool hasArmWideBranch(bool Thumb) const

LLVM_ABI const char * getRegisterClassName(unsigned ClassID) const

LLVM_ABI bool preferEpilogueVectorization() const

Return true if the loop vectorizer should consider vectorizing an otherwise scalar epilogue loop.

LLVM_ABI bool shouldConsiderAddressTypePromotion(const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const

LLVM_ABI bool useAA() const

LLVM_ABI APInt getPriorityMask(const Function &F) const

Returns a bitmask constructed from the target-features or fmv-features metadata of a function corresp...

LLVM_ABI BranchProbability getPredictableBranchThreshold() const

If a branch or a select condition is skewed in one direction by more than this factor,...

LLVM_ABI TargetTransformInfo(std::unique_ptr< const TargetTransformInfoImplBase > Impl)

Construct a TTI object using a type implementing the Concept API below.

LLVM_ABI bool preferInLoopReduction(RecurKind Kind, Type *Ty) const

LLVM_ABI unsigned getCallerAllocaCost(const CallBase *CB, const AllocaInst *AI) const

LLVM_ABI bool hasConditionalLoadStoreForType(Type *Ty, bool IsStore) const

LLVM_ABI unsigned getCacheLineSize() const

LLVM_ABI bool allowsMisalignedMemoryAccesses(LLVMContext &Context, unsigned BitWidth, unsigned AddressSpace=0, Align Alignment=Align(1), unsigned *Fast=nullptr) const

Determine if the target supports unaligned memory accesses.

LLVM_ABI int getInlinerVectorBonusPercent() const

LLVM_ABI unsigned getEpilogueVectorizationMinVF() const

LLVM_ABI void collectKernelLaunchBounds(const Function &F, SmallVectorImpl< std::pair< StringRef, int64_t > > &LB) const

Collect kernel launch bounds for F into LB.

PopcntSupportKind

Flags indicating the kind of support for population count.

Definition TargetTransformInfo.h:797

@ PSK_SlowHardware

Definition TargetTransformInfo.h:797

@ PSK_Software

Definition TargetTransformInfo.h:797

@ PSK_FastHardware

Definition TargetTransformInfo.h:797

LLVM_ABI bool preferPredicatedReductionSelect() const

LLVM_ABI InstructionCost getIntImmCodeSizeCost(unsigned Opc, unsigned Idx, const APInt &Imm, Type *Ty) const

Return the expected cost for the given integer when optimising for size.

LLVM_ABI AddressingModeKind getPreferredAddressingMode(const Loop *L, ScalarEvolution *SE) const

Return the preferred addressing mode LSR should make efforts to generate.

LLVM_ABI bool isLoweredToCall(const Function *F) const

Test whether calls to a function lower to actual program function calls.

LLVM_ABI bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const

LLVM_ABI bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const

Query the target whether it would be profitable to convert the given loop into a hardware loop.

LLVM_ABI unsigned getInliningThresholdMultiplier() const

LLVM_ABI InstructionCost getBranchMispredictPenalty() const

Returns estimated penalty of a branch misprediction in latency.

LLVM_ABI unsigned getNumberOfRegisters(unsigned ClassID) const

LLVM_ABI bool isLegalAltInstr(VectorType *VecTy, unsigned Opcode0, unsigned Opcode1, const SmallBitVector &OpcodeMask) const

Return true if this is an alternating opcode pattern that can be lowered to a single instruction on t...

LLVM_ABI bool isProfitableToHoist(Instruction *I) const

Return true if it is profitable to hoist instruction in the then/else to before if.

LLVM_ABI bool supportsScalableVectors() const

LLVM_ABI bool hasVolatileVariant(Instruction *I, unsigned AddrSpace) const

Return true if the given instruction (assumed to be a memory access instruction) has a volatile varia...

LLVM_ABI bool isLegalMaskedCompressStore(Type *DataType, Align Alignment) const

Return true if the target supports masked compress store.

LLVM_ABI std::optional< unsigned > getMinPageSize() const

LLVM_ABI bool isFPVectorizationPotentiallyUnsafe() const

Indicate that it is potentially unsafe to automatically vectorize floating-point operations because t...

LLVM_ABI InstructionCost getInsertExtractValueCost(unsigned Opcode, TTI::TargetCostKind CostKind) const

LLVM_ABI bool shouldBuildRelLookupTables() const

Return true if lookup tables should be turned into relative lookup tables.

PartialReductionExtendKind

Definition TargetTransformInfo.h:280

@ PR_SignExtend

Definition TargetTransformInfo.h:280

@ PR_ZeroExtend

Definition TargetTransformInfo.h:280

@ PR_None

Definition TargetTransformInfo.h:280

LLVM_ABI unsigned getStoreMinimumVF(unsigned VF, Type *ScalarMemTy, Type *ScalarValTy) const

LLVM_ABI std::optional< unsigned > getCacheSize(CacheLevel Level) const

LLVM_ABI std::optional< Value * > simplifyDemandedUseBitsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, bool &KnownBitsComputed) const

Can be used to implement target-specific instruction combining.

LLVM_ABI bool isLegalAddScalableImmediate(int64_t Imm) const

Return true if adding the specified scalable immediate is legal, that is the target has add instructi...

LLVM_ABI bool isTargetIntrinsicWithScalarOpAtArg(Intrinsic::ID ID, unsigned ScalarOpdIdx) const

Identifies if the vector form of the intrinsic has a scalar operand.

LLVM_ABI bool hasDivRemOp(Type *DataType, bool IsSigned) const

Return true if the target has a unified operation to calculate division and remainder.

LLVM_ABI InstructionCost getAltInstrCost(VectorType *VecTy, unsigned Opcode0, unsigned Opcode1, const SmallBitVector &OpcodeMask, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput) const

Returns the cost estimation for alternating opcode pattern that can be lowered to a single instructio...

TargetCostConstants

Underlying constants for 'cost' values in this interface.

Definition TargetTransformInfo.h:358

@ TCC_Expensive

The cost of a 'div' instruction on x86.

Definition TargetTransformInfo.h:361

@ TCC_Free

Expected to fold away in lowering.

Definition TargetTransformInfo.h:359

@ TCC_Basic

The cost of a typical 'add' instruction.

Definition TargetTransformInfo.h:360

LLVM_ABI bool enableInterleavedAccessVectorization() const

Enable matching of interleaved access groups.

LLVM_ABI unsigned getMinTripCountTailFoldingThreshold() const

LLVM_ABI InstructionCost getInstructionCost(const User *U, ArrayRef< const Value * > Operands, TargetCostKind CostKind) const

Estimate the cost of a given IR user when lowered.

LLVM_ABI unsigned getMaxInterleaveFactor(ElementCount VF) const

LLVM_ABI bool enableScalableVectorization() const

LLVM_ABI bool useFastCCForInternalCall(Function &F) const

Return true if the input function is internal, should use fastcc calling convention.

LLVM_ABI bool isVectorShiftByScalarCheap(Type *Ty) const

Return true if it's significantly cheaper to shift a vector by a uniform scalar than by an amount whi...

LLVM_ABI bool isNumRegsMajorCostOfLSR() const

Return true if LSR major cost is number of registers.

LLVM_ABI unsigned getInliningCostBenefitAnalysisSavingsMultiplier() const

LLVM_ABI bool isLegalMaskedVectorHistogram(Type *AddrType, Type *DataType) const

LLVM_ABI unsigned getGISelRematGlobalCost() const

LLVM_ABI unsigned getNumBytesToPadGlobalArray(unsigned Size, Type *ArrayType) const

MemIndexedMode

The type of load/store indexing.

Definition TargetTransformInfo.h:1795

@ MIM_Unindexed

No indexing.

Definition TargetTransformInfo.h:1796

@ MIM_PostInc

Post-incrementing.

Definition TargetTransformInfo.h:1799

@ MIM_PostDec

Post-decrementing.

Definition TargetTransformInfo.h:1800

@ MIM_PreDec

Pre-decrementing.

Definition TargetTransformInfo.h:1798

@ MIM_PreInc

Pre-incrementing.

Definition TargetTransformInfo.h:1797

LLVM_ABI bool isLegalMaskedLoad(Type *DataType, Align Alignment, unsigned AddressSpace, MaskKind MaskKind=VariableOrConstantMask) const

Return true if the target supports masked load.

LLVM_ABI InstructionCost getIndexedVectorInstrCostFromEnd(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index) const

LLVM_ABI bool areInlineCompatible(const Function *Caller, const Function *Callee) const

LLVM_ABI bool useColdCCForColdCall(Function &F) const

Return true if the input function which is cold at all call sites, should use coldcc calling conventi...

LLVM_ABI InstructionCost getFPOpCost(Type *Ty) const

Return the expected cost of supporting the floating point operation of the specified type.

LLVM_ABI bool supportsTailCalls() const

If the target supports tail calls.

LLVM_ABI bool canMacroFuseCmp() const

Return true if the target can fuse a compare and branch.

LLVM_ABI bool isValidAddrSpaceCast(unsigned FromAS, unsigned ToAS) const

Query the target whether the specified address space cast from FromAS to ToAS is valid.

LLVM_ABI unsigned getNumberOfParts(Type *Tp) const

LLVM_ABI InstructionCost getOperandsScalarizationOverhead(ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind) const

Estimate the overhead of scalarizing operands with the given types.

AddressingModeKind

Which addressing mode Loop Strength Reduction will try to generate.

Definition TargetTransformInfo.h:860

@ AMK_PostIndexed

Prefer post-indexed addressing mode.

Definition TargetTransformInfo.h:863

@ AMK_All

Consider all addressing modes.

Definition TargetTransformInfo.h:864

@ AMK_PreIndexed

Prefer pre-indexed addressing mode.

Definition TargetTransformInfo.h:862

@ AMK_None

Don't prefer any addressing mode.

Definition TargetTransformInfo.h:861

LLVM_ABI InstructionCost getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, StackOffset BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace=0) const

Return the cost of the scaling factor used in the addressing mode represented by AM for this target,...

LLVM_ABI bool isTruncateFree(Type *Ty1, Type *Ty2) const

Return true if it's free to truncate a value of type Ty1 to type Ty2.

LLVM_ABI bool isProfitableToSinkOperands(Instruction *I, SmallVectorImpl< Use * > &Ops) const

Return true if sinking I's operands to the same basic block as I is profitable, e....

LLVM_ABI void getMemcpyLoopResidualLoweringType(SmallVectorImpl< Type * > &OpsOut, LLVMContext &Context, unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace, Align SrcAlign, Align DestAlign, std::optional< uint32_t > AtomicCpySize=std::nullopt) const

LLVM_ABI bool preferPredicateOverEpilogue(TailFoldingInfo *TFI) const

Query the target whether it would be prefered to create a predicated vector loop, which can avoid the...

LLVM_ABI bool forceScalarizeMaskedScatter(VectorType *Type, Align Alignment) const

Return true if the target forces scalarizing of llvm.masked.scatter intrinsics.

LLVM_ABI bool isTargetIntrinsicWithOverloadTypeAtArg(Intrinsic::ID ID, int OpdIdx) const

Identifies if the vector form of the intrinsic is overloaded on the type of the operand at index OpdI...

LLVM_ABI bool haveFastSqrt(Type *Ty) const

Return true if the hardware has a fast square-root instruction.

LLVM_ABI bool shouldExpandReduction(const IntrinsicInst *II) const

LLVM_ABI uint64_t getMaxMemIntrinsicInlineSizeThreshold() const

Returns the maximum memset / memcpy size in bytes that still makes it profitable to inline the call.

ShuffleKind

The various kinds of shuffle patterns for vector queries.

Definition TargetTransformInfo.h:1200

@ SK_InsertSubvector

InsertSubvector. Index indicates start offset.

Definition TargetTransformInfo.h:1207

@ SK_Select

Selects elements from the corresponding lane of either source operand.

Definition TargetTransformInfo.h:1203

@ SK_PermuteSingleSrc

Shuffle elements of single source vector with any shuffle mask.

Definition TargetTransformInfo.h:1211

@ SK_Transpose

Transpose two vectors.

Definition TargetTransformInfo.h:1206

@ SK_Splice

Concatenates elements from the first input vector with elements of the second input vector.

Definition TargetTransformInfo.h:1213

@ SK_Broadcast

Broadcast element 0 to all other elements.

Definition TargetTransformInfo.h:1201

@ SK_PermuteTwoSrc

Merge elements from two source vectors into one with any shuffle mask.

Definition TargetTransformInfo.h:1209

@ SK_Reverse

Reverse the order of the vector.

Definition TargetTransformInfo.h:1202

@ SK_ExtractSubvector

ExtractSubvector Index indicates start offset.

Definition TargetTransformInfo.h:1208

LLVM_ABI APInt getFeatureMask(const Function &F) const

Returns a bitmask constructed from the target-features or fmv-features metadata of a function corresp...

LLVM_ABI void getPeelingPreferences(Loop *L, ScalarEvolution &SE, PeelingPreferences &PP) const

Get target-customized preferences for the generic loop peeling transformation.

LLVM_ABI InstructionCost getCallInstrCost(Function *F, Type *RetTy, ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind=TTI::TCK_SizeAndLatency) const

LLVM_ABI InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind=TTI::TCK_SizeAndLatency, const Instruction *I=nullptr) const

CastContextHint

Represents a hint about the context in which a cast is used.

Definition TargetTransformInfo.h:1505

@ Reversed

The cast is used with a reversed load/store.

Definition TargetTransformInfo.h:1511

@ Masked

The cast is used with a masked load/store.

Definition TargetTransformInfo.h:1508

@ None

The cast is not used with a load/store of any kind.

Definition TargetTransformInfo.h:1506

@ Normal

The cast is used with a normal load/store.

Definition TargetTransformInfo.h:1507

@ Interleave

The cast is used with an interleaved load/store.

Definition TargetTransformInfo.h:1510

@ GatherScatter

The cast is used with a gather/scatter.

Definition TargetTransformInfo.h:1509

LLVM_ABI InstructionCost getExtractWithExtendCost(unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index, TTI::TargetCostKind CostKind) const

LLVM_ABI ~TargetTransformInfo()

OperandValueKind

Additional information about an operand's possible values.

Definition TargetTransformInfo.h:1220

@ OK_UniformConstantValue

Definition TargetTransformInfo.h:1223

@ OK_UniformValue

Definition TargetTransformInfo.h:1222

@ OK_AnyValue

Definition TargetTransformInfo.h:1221

@ OK_NonUniformConstantValue

Definition TargetTransformInfo.h:1224

CacheLevel

The possible cache levels.

Definition TargetTransformInfo.h:1343

@ L1D

Definition TargetTransformInfo.h:1344

@ L2D

Definition TargetTransformInfo.h:1345

The instances of the Type class are immutable: once they are created, they are never changed.

This is the common base class for vector predication intrinsics.

LLVM Value Representation.

Base class of all SIMD vector types.

constexpr char Args[]

Key for Kernel::Metadata::mArgs.

unsigned ID

LLVM IR allows to use arbitrary numbers as calling convention identifiers.

@ Fast

Attempts to make calls as fast as possible (e.g.

@ C

The default llvm calling convention, compatible with C.

This namespace contains an enum with a value for every intrinsic/builtin function known by LLVM.

friend class Instruction

Iterator for Instructions in a `BasicBlock.

This is an optimization pass for GlobalISel generic memory operations.

FunctionAddr VTableAddr Value

LLVM_ATTRIBUTE_VISIBILITY_DEFAULT AnalysisKey InnerAnalysisManagerProxy< AnalysisManagerT, IRUnitT, ExtraArgTs... >::Key

AtomicOrdering

Atomic ordering for LLVM's memory model.

@ LLVM_MARK_AS_BITMASK_ENUM

TargetTransformInfo TTI

Definition TargetTransformInfo.h:273

FunctionAddr VTableAddr uintptr_t uintptr_t Data

LLVM_ABI ImmutablePass * createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA)

Create an analysis pass wrapper around a TTI object.

RecurKind

These are the kinds of recurrences that we support.

ArrayRef(const T &OneElt) -> ArrayRef< T >

constexpr unsigned BitWidth

OutputIt move(R &&Range, OutputIt Out)

Provide wrappers to std::move which take ranges instead of having to pass begin/end explicitly.

TailFoldingStyle

Definition TargetTransformInfo.h:230

@ DataAndControlFlowWithoutRuntimeCheck

Use predicate to control both data and control flow, but modify the trip count so that a runtime over...

Definition TargetTransformInfo.h:257

@ DataWithEVL

Use predicated EVL instructions for tail-folding.

Definition TargetTransformInfo.h:260

@ DataAndControlFlow

Use predicate to control both data and control flow.

Definition TargetTransformInfo.h:253

@ DataWithoutLaneMask

Same as Data, but avoids using the get.active.lane.mask intrinsic to calculate the mask and instead i...

Definition TargetTransformInfo.h:247

AnalysisManager< Function > FunctionAnalysisManager

Convenience typedef for the Function analysis manager.

InstructionUniformity

Enum describing how instructions behave with respect to uniformity and divergence,...

Implement std::hash so that hash_code can be used in STL containers.

This struct is a compact representation of a valid (non-zero power of two) alignment.

A CRTP mix-in that provides informational APIs needed for analysis passes.

A special type used by analysis passes to provide an address that identifies that particular analysis...

Attributes of a target dependent hardware loop.

Definition TargetTransformInfo.h:103

Loop * L

Definition TargetTransformInfo.h:106

BranchInst * ExitBranch

Definition TargetTransformInfo.h:108

BasicBlock * ExitBlock

Definition TargetTransformInfo.h:107

Value * LoopDecrement

Definition TargetTransformInfo.h:111

LLVM_ABI bool canAnalyze(LoopInfo &LI)

bool CounterInReg

Definition TargetTransformInfo.h:115

const SCEV * ExitCount

Definition TargetTransformInfo.h:109

IntegerType * CountType

Definition TargetTransformInfo.h:110

bool IsNestingLegal

Definition TargetTransformInfo.h:113

HardwareLoopInfo()=delete

bool PerformEntryTest

Definition TargetTransformInfo.h:117

LLVM_ABI bool isHardwareLoopCandidate(ScalarEvolution &SE, LoopInfo &LI, DominatorTree &DT, bool ForceNestedLoop=false, bool ForceHardwareLoopPHI=false)

Information about a load/store intrinsic defined by the target.

Definition TargetTransformInfo.h:76

SmallVector< InterestingMemoryOperand, 1 > InterestingOperands

Definition TargetTransformInfo.h:93

unsigned short MatchingId

Definition TargetTransformInfo.h:87

bool ReadMem

Definition TargetTransformInfo.h:89

bool IsVolatile

Definition TargetTransformInfo.h:91

bool WriteMem

Definition TargetTransformInfo.h:90

Value * PtrVal

This is the pointer that the intrinsic is loading from or storing to.

Definition TargetTransformInfo.h:81

AtomicOrdering Ordering

Definition TargetTransformInfo.h:84

bool isUnordered() const

Definition TargetTransformInfo.h:95

InterleavedAccessInfo * IAI

Definition TargetTransformInfo.h:266

TailFoldingInfo(TargetLibraryInfo *TLI, LoopVectorizationLegality *LVL, InterleavedAccessInfo *IAI)

Definition TargetTransformInfo.h:267

TargetLibraryInfo * TLI

Definition TargetTransformInfo.h:264

LoopVectorizationLegality * LVL

Definition TargetTransformInfo.h:265

unsigned NumIVMuls

Definition TargetTransformInfo.h:599

unsigned ScaleCost

Definition TargetTransformInfo.h:603

unsigned Insns

TODO: Some of these could be merged.

Definition TargetTransformInfo.h:596

unsigned ImmCost

Definition TargetTransformInfo.h:601

unsigned AddRecCost

Definition TargetTransformInfo.h:598

unsigned NumRegs

Definition TargetTransformInfo.h:597

unsigned NumBaseAdds

Definition TargetTransformInfo.h:600

unsigned SetupCost

Definition TargetTransformInfo.h:602

Returns options for expansion of memcmp. IsZeroCmp is.

Definition TargetTransformInfo.h:1062

SmallVector< unsigned, 8 > LoadSizes

Definition TargetTransformInfo.h:1070

unsigned NumLoadsPerBlock

Definition TargetTransformInfo.h:1080

bool AllowOverlappingLoads

Definition TargetTransformInfo.h:1085

unsigned MaxNumLoads

Definition TargetTransformInfo.h:1067

SmallVector< unsigned, 4 > AllowedTailExpansions

Definition TargetTransformInfo.h:1096

bool isConstant() const

Definition TargetTransformInfo.h:1241

bool isNegatedPowerOf2() const

Definition TargetTransformInfo.h:1250

OperandValueKind Kind

Definition TargetTransformInfo.h:1238

OperandValueInfo getNoProps() const

Definition TargetTransformInfo.h:1254

bool isPowerOf2() const

Definition TargetTransformInfo.h:1247

bool isUniform() const

Definition TargetTransformInfo.h:1244

OperandValueProperties Properties

Definition TargetTransformInfo.h:1239

bool AllowPeeling

Allow peeling off loop iterations.

Definition TargetTransformInfo.h:743

bool AllowLoopNestsPeeling

Allow peeling off loop iterations for loop nests.

Definition TargetTransformInfo.h:745

bool PeelLast

Peel off the last PeelCount loop iterations.

Definition TargetTransformInfo.h:753

bool PeelProfiledIterations

Allow peeling basing on profile.

Definition TargetTransformInfo.h:750

unsigned PeelCount

A forced peeling factor (the number of bodied of the original loop that should be peeled off before t...

Definition TargetTransformInfo.h:741

Describe known properties for a set of pointers.

Definition TargetTransformInfo.h:381

unsigned IsKnownStride

True if distance between any two neigbouring pointers is a known value.

Definition TargetTransformInfo.h:388

static PointersChainInfo getKnownStride()

Definition TargetTransformInfo.h:399

bool isUnitStride() const

Definition TargetTransformInfo.h:392

unsigned Reserved

Definition TargetTransformInfo.h:389

bool isSameBase() const

Definition TargetTransformInfo.h:391

unsigned IsUnitStride

These properties only valid if SameBaseAddress is set.

Definition TargetTransformInfo.h:386

bool isKnownStride() const

Definition TargetTransformInfo.h:393

unsigned IsSameBaseAddress

All the GEPs in a set have same base address.

Definition TargetTransformInfo.h:383

static PointersChainInfo getUnitStride()

Definition TargetTransformInfo.h:395

static PointersChainInfo getUnknownStride()

Definition TargetTransformInfo.h:403

Parameters that control the generic loop unrolling transformation.

Definition TargetTransformInfo.h:607

unsigned MaxCount

Definition TargetTransformInfo.h:648

unsigned Count

A forced unrolling factor (the number of concatenated bodies of the original loop in the unrolled loo...

Definition TargetTransformInfo.h:641

bool UpperBound

Allow using trip count upper bound to unroll loops.

Definition TargetTransformInfo.h:678

unsigned Threshold

The cost threshold for the unrolled loop.

Definition TargetTransformInfo.h:615

bool Force

Apply loop unroll on any kind of loop (mainly to loops that fail runtime unrolling).

Definition TargetTransformInfo.h:676

unsigned PartialOptSizeThreshold

The cost threshold for the unrolled loop when optimizing for size, like OptSizeThreshold,...

Definition TargetTransformInfo.h:636

bool UnrollVectorizedLoop

Don't disable runtime unroll for the loops which were vectorized.

Definition TargetTransformInfo.h:692

unsigned DefaultUnrollRuntimeCount

Default unroll count for loops with run-time trip count.

Definition TargetTransformInfo.h:643

unsigned MaxPercentThresholdBoost

If complete unrolling will reduce the cost of the loop, we will boost the Threshold by a certain perc...

Definition TargetTransformInfo.h:626

bool RuntimeUnrollMultiExit

Allow runtime unrolling multi-exit loops.

Definition TargetTransformInfo.h:700

unsigned SCEVExpansionBudget

Don't allow runtime unrolling if expanding the trip count takes more than SCEVExpansionBudget.

Definition TargetTransformInfo.h:695

bool AddAdditionalAccumulators

Allow unrolling to add parallel reduction phis.

Definition TargetTransformInfo.h:702

unsigned UnrollAndJamInnerLoopThreshold

Threshold for unroll and jam, for inner loop size.

Definition TargetTransformInfo.h:687

unsigned MaxIterationsCountToAnalyze

Don't allow loop unrolling to simulate more than this number of iterations when checking full unroll ...

Definition TargetTransformInfo.h:690

bool AllowRemainder

Allow generation of a loop remainder (extra iterations after unroll).

Definition TargetTransformInfo.h:670

bool UnrollAndJam

Allow unroll and jam. Used to enable unroll and jam for the target.

Definition TargetTransformInfo.h:682

bool UnrollRemainder

Allow unrolling of all the iterations of the runtime loop remainder.

Definition TargetTransformInfo.h:680

unsigned FullUnrollMaxCount

Set the maximum unrolling factor for full unrolling.

Definition TargetTransformInfo.h:656

unsigned BEInsns

Definition TargetTransformInfo.h:661

unsigned PartialThreshold

The cost threshold for the unrolled loop, like Threshold, but used for partial/runtime unrolling (set...

Definition TargetTransformInfo.h:632

bool Runtime

Allow runtime unrolling (unrolling of loops to expand the size of the loop body even when the number ...

Definition TargetTransformInfo.h:668

bool Partial

Allow partial unrolling (unrolling of loops to expand the size of the loop body, not only to eliminat...

Definition TargetTransformInfo.h:664

unsigned OptSizeThreshold

The cost threshold for the unrolled loop when optimizing for size (set to UINT_MAX to disable).

Definition TargetTransformInfo.h:629

bool AllowExpensiveTripCount

Allow emitting expensive instructions (such as divisions) when computing the trip count of a loop for...

Definition TargetTransformInfo.h:673

unsigned MaxUpperBound

Set the maximum upper bound of trip count.

Definition TargetTransformInfo.h:652

VPTransform OpStrategy

Definition TargetTransformInfo.h:1950

bool shouldDoNothing() const

Definition TargetTransformInfo.h:1952

VPTransform EVLParamStrategy

Definition TargetTransformInfo.h:1944

VPTransform

Definition TargetTransformInfo.h:1931

@ Convert

Definition TargetTransformInfo.h:1937

@ Legal

Definition TargetTransformInfo.h:1933

@ Discard

Definition TargetTransformInfo.h:1935

VPLegalization(VPTransform EVLParamStrategy, VPTransform OpStrategy)

Definition TargetTransformInfo.h:1955