VEAsmPrinter.cpp Source File (original) (raw)

18#include "VE.h"

33using namespace llvm;

35#define DEBUG_TYPE "ve-asmprinter"

37namespace {

38class VEAsmPrinter : public AsmPrinter {

40 return static_cast<VETargetStreamer &>(*OutStreamer->getTargetStreamer());

41 }

43public:

44 explicit VEAsmPrinter(TargetMachine &TM, std::unique_ptr Streamer)

47 StringRef getPassName() const override { return "VE Assembly Printer"; }

49 void lowerGETGOTAndEmitMCInsts(const MachineInstr *MI,

51 void lowerGETFunPLTAndEmitMCInsts(const MachineInstr *MI,

53 void lowerGETTLSAddrAndEmitMCInsts(const MachineInstr *MI,

56 void emitInstruction(const MachineInstr *MI) override;

60 }

62 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,

63 const char *ExtraCode, raw_ostream &O) override;

64 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,

65 const char *ExtraCode, raw_ostream &O) override;

67 static char ID;

68};

69}

103

115

127

139

151

162

165 emitBinary(OutStreamer, VE::ANDrm, RS1, Imm, RD, STI);

166}

167

171

174 emitLEAzzi(OutStreamer, lo, RD, STI);

176 emitANDrm(OutStreamer, RD, M032, RD, STI);

178}

179

180void VEAsmPrinter::lowerGETGOTAndEmitMCInsts(const MachineInstr *MI,

183 OutContext.getOrCreateSymbol(Twine("_GLOBAL_OFFSET_TABLE_"));

184

185 const MachineOperand &MO = MI->getOperand(0);

187

188 if (!isPositionIndependent()) {

189

190 switch (TM.getCodeModel()) {

191 default:

197 OutContext, STI);

198 break;

199 }

200 return;

201 }

202

205

206

207

208

209

212 emitLEAzii(*OutStreamer, cim24, loImm, MCRegOP, STI);

214 emitANDrm(*OutStreamer, MCRegOP, M032, MCRegOP, STI);

215 emitSIC(*OutStreamer, RegPLT, STI);

217 emitLEASLrri(*OutStreamer, RegGOT, RegPLT, hiImm, MCRegOP, STI);

218}

219

220void VEAsmPrinter::lowerGETFunPLTAndEmitMCInsts(const MachineInstr *MI,

221 const MCSubtargetInfo &STI) {

222 const MachineOperand &MO = MI->getOperand(0);

224 const MachineOperand &Addr = MI->getOperand(1);

226

227 switch (Addr.getType()) {

228 default:

230 return;

233 return;

236 return;

238 AddrSym = GetExternalSymbolSymbol(Addr.getSymbolName());

239 break;

241 AddrSym = getSymbol(Addr.getGlobal());

242 break;

243 }

244

245 if (!isPositionIndependent()) {

246 llvm_unreachable("Unsupported uses of %plt in not PIC code");

247 return;

248 }

249

251

252

253

254

255

258 emitLEAzii(*OutStreamer, cim24, loImm, MCRegOP, STI);

260 emitANDrm(*OutStreamer, MCRegOP, M032, MCRegOP, STI);

261 emitSIC(*OutStreamer, RegPLT, STI);

263 emitLEASLrri(*OutStreamer, MCRegOP, RegPLT, hiImm, MCRegOP, STI);

264}

265

266void VEAsmPrinter::lowerGETTLSAddrAndEmitMCInsts(const MachineInstr *MI,

267 const MCSubtargetInfo &STI) {

268 const MachineOperand &Addr = MI->getOperand(0);

270

271 switch (Addr.getType()) {

272 default:

274 return;

277 return;

280 return;

282 AddrSym = GetExternalSymbolSymbol(Addr.getSymbolName());

283 break;

285 AddrSym = getSymbol(Addr.getGlobal());

286 break;

287 }

288

292 MCSymbol *GetTLSLabel = OutContext.getOrCreateSymbol(Twine("__tls_get_addr"));

293

294

295

296

297

298

299

300

301

304 emitLEAzii(*OutStreamer, cim24, loImm, RegS0, STI);

306 emitANDrm(*OutStreamer, RegS0, M032, RegS0, STI);

307 emitSIC(*OutStreamer, RegLR, STI);

309 emitLEASLrri(*OutStreamer, RegS0, RegLR, hiImm, RegS0, STI);

311 MCOperand loImm2 =

313 emitLEAzii(*OutStreamer, ci8, loImm2, RegS12, STI);

314 emitANDrm(*OutStreamer, RegS12, M032, RegS12, STI);

315 MCOperand hiImm2 =

317 emitLEASLrri(*OutStreamer, RegS12, RegLR, hiImm2, RegS12, STI);

318 emitBSIC(*OutStreamer, RegLR, RegS12, STI);

319}

320

321void VEAsmPrinter::emitInstruction(const MachineInstr *MI) {

322 VE_MC::verifyInstructionPredicates(MI->getOpcode(),

323 getSubtargetInfo().getFeatureBits());

324

325 switch (MI->getOpcode()) {

326 default:

327 break;

328 case TargetOpcode::DBG_VALUE:

329

330 return;

331 case VE::GETGOT:

332 lowerGETGOTAndEmitMCInsts(MI, getSubtargetInfo());

333 return;

334 case VE::GETFUNPLT:

335 lowerGETFunPLTAndEmitMCInsts(MI, getSubtargetInfo());

336 return;

337 case VE::GETTLSADDR:

338 lowerGETTLSAddrAndEmitMCInsts(MI, getSubtargetInfo());

339 return;

340 }

341

344 do {

345 MCInst TmpInst;

347 EmitToStreamer(*OutStreamer, TmpInst);

348 } while ((++I != E) && I->isInsideBundle());

349}

350

351void VEAsmPrinter::printOperand(const MachineInstr *MI, int OpNum,

352 raw_ostream &O) {

353 const MachineOperand &MO = MI->getOperand(OpNum);

354

358 break;

361 break;

362 default:

364 }

365}

366

367

368bool VEAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,

369 const char *ExtraCode, raw_ostream &O) {

370 if (ExtraCode && ExtraCode[0]) {

371 if (ExtraCode[1] != 0)

372 return true;

373

374 switch (ExtraCode[0]) {

375 default:

376

378 case 'r':

379 case 'v':

380 break;

381 }

382 }

383

385

386 return false;

387}

388

389bool VEAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,

390 const char *ExtraCode,

391 raw_ostream &O) {

392 if (ExtraCode && ExtraCode[0])

393 return true;

394

395 if (MI->getOperand(OpNo+1).isImm() &&

396 MI->getOperand(OpNo+1).getImm() == 0) {

397

398 } else {

400 }

401 if (MI->getOperand(OpNo).isImm() &&

402 MI->getOperand(OpNo).getImm() == 0) {

403 if (MI->getOperand(OpNo+1).isImm() &&

404 MI->getOperand(OpNo+1).getImm() == 0) {

405 O << "0";

406 } else {

407

408 }

409 } else {

410 O << "(";

412 O << ")";

413 }

414 return false;

415}

416

417char VEAsmPrinter::ID = 0;

418

419 INITIALIZE_PASS(VEAsmPrinter, "ve-asm-printer", "VE Assembly Printer", false,

420 false)

421

422

425}

static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")

#define LLVM_EXTERNAL_VISIBILITY

static std::string getRegisterName(const TargetRegisterInfo *TRI, Register Reg)

#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)

static bool printOperand(raw_ostream &OS, const SelectionDAG *G, const SDValue Value)

static void emitHiLo(MCStreamer &OutStreamer, MCSymbol *GOTSym, uint16_t HiKind, uint16_t LoKind, MCOperand &RD, MCContext &OutContext, const MCSubtargetInfo &STI)

static TableGen::Emitter::OptClass< SkeletonEmitter > X("gen-skeleton-class", "Generate example skeleton class")

static void emitSIC(MCStreamer &OutStreamer, MCOperand &RD, const MCSubtargetInfo &STI)

Definition VEAsmPrinter.cpp:84

static void emitHiLo(MCStreamer &OutStreamer, MCSymbol *GOTSym, VE::Specifier HiKind, VE::Specifier LoKind, MCOperand &RD, MCContext &OutContext, const MCSubtargetInfo &STI)

Definition VEAsmPrinter.cpp:168

static void emitBinary(MCStreamer &OutStreamer, unsigned Opcode, MCOperand &RS1, MCOperand &Src2, MCOperand &RD, const MCSubtargetInfo &STI)

Definition VEAsmPrinter.cpp:152

static void emitLEAzii(MCStreamer &OutStreamer, MCOperand &RS1, MCOperand &Imm, MCOperand &RD, const MCSubtargetInfo &STI)

Definition VEAsmPrinter.cpp:128

static void emitLEASLzzi(MCStreamer &OutStreamer, MCOperand &Imm, MCOperand &RD, const MCSubtargetInfo &STI)

Definition VEAsmPrinter.cpp:116

static MCOperand createGOTRelExprOp(VE::Specifier Kind, MCSymbol *GOTLabel, MCContext &OutContext)

Definition VEAsmPrinter.cpp:78

static void emitBSIC(MCStreamer &OutStreamer, MCOperand &R1, MCOperand &R2, const MCSubtargetInfo &STI)

Definition VEAsmPrinter.cpp:92

static MCOperand createVEMCOperand(VE::Specifier Kind, MCSymbol *Sym, MCContext &OutContext)

Definition VEAsmPrinter.cpp:71

static void emitLEAzzi(MCStreamer &OutStreamer, MCOperand &Imm, MCOperand &RD, const MCSubtargetInfo &STI)

Definition VEAsmPrinter.cpp:104

static void emitANDrm(MCStreamer &OutStreamer, MCOperand &RS1, MCOperand &Imm, MCOperand &RD, const MCSubtargetInfo &STI)

Definition VEAsmPrinter.cpp:163

static void emitLEASLrri(MCStreamer &OutStreamer, MCOperand &RS1, MCOperand &RS2, MCOperand &Imm, MCOperand &RD, const MCSubtargetInfo &STI)

Definition VEAsmPrinter.cpp:140

This class is intended to be used as a driving class for all asm writers.

virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, const char *ExtraCode, raw_ostream &OS)

Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant.

Context object for machine code objects.

Instances of this class represent a single low-level machine instruction.

void addOperand(const MCOperand Op)

void setOpcode(unsigned Op)

Instances of this class represent operands of the MCInst class.

static MCOperand createExpr(const MCExpr *Val)

static MCOperand createReg(MCRegister Reg)

static MCOperand createImm(int64_t Val)

Wrapper class representing physical registers. Should be passed by value.

static const MCSpecifierExpr * create(const MCExpr *Expr, Spec S, MCContext &Ctx, SMLoc Loc=SMLoc())

Streaming machine code generation interface.

virtual void emitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI)

Emit the given Instruction into the current section.

Generic base class for all target subtargets.

Represent a reference to a symbol from inside an expression.

static const MCSymbolRefExpr * create(const MCSymbol *Symbol, MCContext &Ctx, SMLoc Loc=SMLoc())

MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...

Instructions::const_iterator const_instr_iterator

Representation of each machine instruction.

const GlobalValue * getGlobal() const

MachineOperandType getType() const

getType - Returns the MachineOperandType for this operand.

const char * getSymbolName() const

getReg - Returns the register number.

@ MO_Immediate

Immediate operand.

@ MO_ConstantPoolIndex

Address of indexed Constant in Constant Pool.

@ MO_GlobalAddress

Address of a global value.

@ MO_MachineBasicBlock

MachineBasicBlock reference.

@ MO_Register

@ MO_ExternalSymbol

Name of external global symbol.

StringRef - Represent a constant reference to a string, i.e.

Primary interface to the complete machine description for the target machine.

static const char * getRegisterName(MCRegister Reg, unsigned AltIdx=VE::NoRegAltName)

This class implements an extremely fast bulk output stream that can only output to a stream.

#define llvm_unreachable(msg)

Marks that the current location is not supposed to be reachable.

unsigned ID

LLVM IR allows to use arbitrary numbers as calling convention identifiers.

This is an optimization pass for GlobalISel generic memory operations.

void LowerVEMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI, AsmPrinter &AP)

Target & getTheVETarget()

LLVM_ABI void report_fatal_error(Error Err, bool gen_crash_diag=true)

unsigned M0(unsigned Val)

RegisterAsmPrinter - Helper template for registering a target specific assembly printer,...