| dbo:abstract |
Analog verification is a methodology for performing functional verification on analog, mixed-signal and RF integrated circuits and systems on chip. Discussion of analog verification began in 2005 when it started to become recognized that the analog portion of large mixed-signal chips had become so complex that a significant and ever increasing number of these chips were being designed with functional errors in the analog portion that prevented them from operating correctly. (en) 模拟验证（英語：analog verification）是对模拟电路、混合信号电路、射频集成电路以及系統單晶片功能进行验证的工作流程。人们逐渐意识到模拟验证的重要程度，关于模拟验证的技术讨论于2005年开始。当时，大型混合信号集成电路中的模拟部分变得十分复杂，以至于在模拟部分中尚大量存在功能错误的芯片被设计出来，这些问题都阻碍了集成电路正确工作。 (zh) |
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dbc:Hardware_testing dbc:IEEE_DASC_standards |
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dbr:Methodology |
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| rdfs:comment |
Analog verification is a methodology for performing functional verification on analog, mixed-signal and RF integrated circuits and systems on chip. Discussion of analog verification began in 2005 when it started to become recognized that the analog portion of large mixed-signal chips had become so complex that a significant and ever increasing number of these chips were being designed with functional errors in the analog portion that prevented them from operating correctly. (en) 模拟验证（英語：analog verification）是对模拟电路、混合信号电路、射频集成电路以及系統單晶片功能进行验证的工作流程。人们逐渐意识到模拟验证的重要程度，关于模拟验证的技术讨论于2005年开始。当时，大型混合信号集成电路中的模拟部分变得十分复杂，以至于在模拟部分中尚大量存在功能错误的芯片被设计出来，这些问题都阻碍了集成电路正确工作。 (zh) |
| rdfs:label |
Analog verification (en) 模拟验证 (zh) |
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