| dbo:abstract |
The QCDPAX was a processor array designed and built jointly by the University of Tsukuba and Anritsu Corporation for the simulation of the lattice QCD. PAX (Processor Array eXperiment) was the name of the series of the parallel computers since 1977 for the study of parallel high-speed computation in scientific and engineering applications.The first and second machines were made at Kyoto University in 1978 and 1980 respectively, and the project was moved to the University of Tsukuba in 1981.It utilized the MIMD processor array architecture with the two-dimensionalnearest-neighbor connection and the broadcasting bus. QCDPAX was the fifth model in the PAX series. A prototype with fourprocessing units was constructed in the April 1988, and a practicalsystem with 288 processing units was built in the April 1989.In the spring of 1990, it was increased with PU number to 480and achieved a peak speed of 14GFLOPS. Each processing unit was an independent one-board microcomputer. Motorola's microprocessor MC68020 (25 MHz) was used as the CPU.The local memory was 4MBytes with 100ns 1Mbit DRAM.The QCDPAX utilized LSI Logic's floating-point processing unit L64133 onthe market. L64133 had peak performance of the 33MFLOPS.The floating-point processing unit controller, newly developed by the gate array, was alsoutilized to derive the performance from the FPU by controlling the direct memory accessbetween the data memory and floating-point processing unit. The QCDPAX was followed by the 2048 processor CP-PACS with a speed of 614.4 GFlops, which itself has been succeeded by a range of successively faster computers dedicated to computational physics. From the CP-PACS onwards all were located at and operated by the dedicated Center for Computational Physics of the University of Tsukuba. (en) PACS（Processor Array for Continuum Simulation, パックス）及びPAXは、1977年、当時京都大学原子力研究所助教授であったに、その頃普及し始めたマイクロプロセッサを使ったアレイ型計算機の構築提案を日立製作所のが行ったことがきっかけで開発が始まった、並列計算機である。 (ja) |
| dbo:wikiPageExternalLink |
https://www.ccs.tsukuba.ac.jp/eng/ https://arxiv.org/abs/hep-lat/9211027 https://arxiv.org/abs/hep-lat/9311051 https://tsukuba.repo.nii.ac.jp/index.php%3Faction=pages_view_main&active_action=repository_action_common_download&item_id=7510&item_no=1&attribute_id=17&file_no=1&page_id=13&block_id=83 https://www.ccs.tsukuba.ac.jp/eng/projects/ha-pacs/history/ |
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dbr:University_of_Tsukuba dbr:Motorola dbr:Anritsu dbr:Lattice_QCD dbr:Hitachi_SR2201 dbc:Parallel_computing dbc:Supercomputers dbr:LSI_Corporation dbr:Kyoto_University dbr:Multiple_instruction,_multiple_data dbr:MC68020 |
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dbc:Parallel_computing dbc:Supercomputers |
| gold:hypernym |
dbr:Array |
| rdf:type |
dbo:Place yago:WikicatSupercomputers yago:Artifact100021939 yago:Computer103082979 yago:Device103183080 yago:DigitalComputer103196324 yago:Instrumentality103575240 yago:Machine103699975 yago:Mainframe103711711 yago:Object100002684 yago:PhysicalEntity100001930 yago:Supercomputer104358117 yago:Whole100003553 |
| rdfs:comment |
PACS（Processor Array for Continuum Simulation, パックス）及びPAXは、1977年、当時京都大学原子力研究所助教授であったに、その頃普及し始めたマイクロプロセッサを使ったアレイ型計算機の構築提案を日立製作所のが行ったことがきっかけで開発が始まった、並列計算機である。 (ja) The QCDPAX was a processor array designed and built jointly by the University of Tsukuba and Anritsu Corporation for the simulation of the lattice QCD. PAX (Processor Array eXperiment) was the name of the series of the parallel computers since 1977 for the study of parallel high-speed computation in scientific and engineering applications.The first and second machines were made at Kyoto University in 1978 and 1980 respectively, and the project was moved to the University of Tsukuba in 1981.It utilized the MIMD processor array architecture with the two-dimensionalnearest-neighbor connection and the broadcasting bus. (en) |
| rdfs:label |
PACS (並列計算機) (ja) QCDPAX (en) |
| owl:sameAs |
freebase:QCDPAX yago-res:QCDPAX wikidata:QCDPAX dbpedia-ja:QCDPAX https://global.dbpedia.org/id/4tRwe |
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wikipedia-en:QCDPAX?oldid=1104423052&ns=0 |
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wikipedia-en:QCDPAX |
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wikipedia-en:QCDPAX |