SpecC (original) (raw)
SpecC is a (SDL), or (SLDL), and is an extension of the ANSI C programming language. It is used to aid the design and specification of digital embedded systems, providing improved productivity whilst retaining the ability to change a design at functional and specification level, unlike HDLs like Verilog and VHDL. An architectural model can be created which allows other tools to directly map the design onto silicon or FPGA. The main aim is for the reuse, exchange and integration of IP at various levels of abstraction.
| Property | Value |
|---|---|
| dbo:abstract | SpecC is a (SDL), or (SLDL), and is an extension of the ANSI C programming language. It is used to aid the design and specification of digital embedded systems, providing improved productivity whilst retaining the ability to change a design at functional and specification level, unlike HDLs like Verilog and VHDL. An architectural model can be created which allows other tools to directly map the design onto silicon or FPGA. The main aim is for the reuse, exchange and integration of IP at various levels of abstraction. The language and design methodology were created by Rainer Dömer and Daniel Gajski at the Centre for Embedded Computer Systems at University of California, Irvine in 2001. Similar projects and design methodologies include SystemC, an SDL based on C++. Although this rival language has seen much more widespread industry usage (although SpecC is popular in Japan), SpecC retains simplicity whilst also providing the vital features of any SDL, such as concurrency (SpecC provides pipelined and parallel flows), synchronisation, state transitions (not available in Verilog), and composite data types . (en) |
| dbo:wikiPageExternalLink | http://class.ece.iastate.edu/cpre588/2006/docs/cecs_TR02-30.pdf |
| dbo:wikiPageID | 18565350 (xsd:integer) |
| dbo:wikiPageLength | 1674 (xsd:nonNegativeInteger) |
| dbo:wikiPageRevisionID | 1012505516 (xsd:integer) |
| dbo:wikiPageWikiLink | dbr:University_of_California,_Irvine dbr:VHDL dbr:Verilog dbr:Concurrency_(computer_science) dbr:SystemC dbr:Composite_data_type dbr:Embedded_system dbr:C++ dbc:System_description_languages dbr:Accellera dbr:FPGA dbr:PDF dbr:Daniel_Gajski dbr:Hardware_description_language dbr:Japan dbr:ANSI_C dbc:Hardware_description_languages dbr:Synchronisation dbr:SystemVerilog dbr:Silicon dbr:Programming_language dbr:State_transition dbr:System-level_Design_Language dbr:System_Description_Language |
| dbp:wikiPageUsesTemplate | dbt:Authority_control dbt:Official_website dbt:Unreferenced |
| dct:subject | dbc:System_description_languages dbc:Hardware_description_languages |
| gold:hypernym | dbr:Language |
| rdf:type | owl:Thing dbo:Language yago:Abstraction100002137 yago:Communication100033020 yago:Language106282651 yago:WikicatHardwareDescriptionLanguages yago:WikicatSystemDescriptionLanguages |
| rdfs:comment | SpecC is a (SDL), or (SLDL), and is an extension of the ANSI C programming language. It is used to aid the design and specification of digital embedded systems, providing improved productivity whilst retaining the ability to change a design at functional and specification level, unlike HDLs like Verilog and VHDL. An architectural model can be created which allows other tools to directly map the design onto silicon or FPGA. The main aim is for the reuse, exchange and integration of IP at various levels of abstraction. (en) |
| rdfs:label | SpecC (en) |
| owl:sameAs | freebase:SpecC yago-res:SpecC wikidata:SpecC https://global.dbpedia.org/id/4vsNq |
| prov:wasDerivedFrom | wikipedia-en:SpecC?oldid=1012505516&ns=0 |
| foaf:isPrimaryTopicOf | wikipedia-en:SpecC |
| is dbo:wikiPageRedirects of | dbr:Spec-C |
| is dbo:wikiPageWikiLink of | dbr:SystemC dbr:Daniel_Gajski dbr:Flow_to_HDL dbr:SystemVerilog dbr:Spec-C |
| is foaf:primaryTopic of | wikipedia-en:SpecC |