Finite state machine (original) (raw)
In computer science, a finite-state machine (FSM) or finite-state automaton (FSA) is an abstract machine that has only a finite, constant amount of memory. The internal statess of the machine carry no further structure. This kind of model is very widely used in the study of computation and languages.
It can be conceptualised as a directed graph. There are a finitely many states, and each state has transitions to states. There is an input string that determines which transition is followed (some transitions may be from a state to itself). Finite state machines are studied in automata theory, a subfield of theoretical computer science.
There are several types of finite state machines:
Acceptors produce a "yes" or "no" answer to the input; they either accept the input or do not. Recognizers categorise the input. Transducers are used to generate an output from a given input.
Finite automata may operate on languages of finite words (the standard case), infinite words (Rabin automata, B�chi automata), or various types of trees (tree automata), to name the most important cases.
A further distinction is between deterministic and non-deterministic automata. In deterministic automata, for each state there is at most one transition for each possible input. In non-deterministic automata, there can be more than one transition from a given state for a given possible input. Non-deterministic automata are usually implemented by converting them to deterministic automata - in the worst case, the generated deterministic automaton is exponentially bigger than the non-deterministic automaton (although it can usually be substantially optimised).
The standard acceptance condition for non-deterministic automata requires that some computation accepts the input. Alternating automata also provide a dual notion, where for acceptance all non-deterministic computations must accept.
Apart from theory, finite state machines occur also in hardware circuits, where the input, the state and the output are bit vectors of fixed size (Moore machines and Mealy machines).
Mealy machines have actions (outputs) associated with transitions and Moore machines have actions associated with states.
Formal definitions
Deterministic finite automaton
Formally, a deterministic finite automaton (DFA) is a 5-tuple: (S, Σ, T, s, A)
- an alphabet (Σ)
- a set of states (S)
- a transition function (T : S × Σ → S).
- a start state (s ∈ S)
- a set of accept states (A ⊆ S)
The machine starts in the start state and reads in a string of symbols from its alphabet. It uses the transition function T to determine the next state using the current state and the symbol just read. If, when it has finished reading, it is in an accepting state, it is said to accept the string, otherwise it is said to reject the string. The set of strings it accepts form a language, which is the language the DFA recognises.
Non-deterministic finite automaton
A non-deterministic finite automaton (NFA) is a 5-tuple: (S, Σ, T, s, A)
- an alphabet (Σ)
- a set of states (S)
- a transition function (T : S × (Σ ∪{ε}) → P(S)).
- a start state (s ∈ S)
- a set of accept states (A ⊆ S)
Where P(S) is the power set of S and ε is the empty string.
The machine starts in the start state and reads in a string of symbols from its alphabet. It uses the transition relation T to determine the next state(s) using the current state and the symbol just read or the empty string. If, when it has finished reading, it is in an accepting state, it is said to accept the string, otherwise it is said to reject the string. The set of strings it accepts form a language, which is the language the NFA recognises.
Generalized non-deterministic finite automaton
A generalized non-deterministic finite automaton (GNFA) is a 5-tuple: (S, Σ, T, s, a)
- S is a finite set of states
- Σ is a finite set of symbols
- T : (S -{a}) × (S - {s}) → R
- s ∈ S is the start state
- a ∈ S is the accept state
Where R is the collection of all regular expressions over the alphabet Σ.
A DFA or NFA can easily be converted into a GNFA and then the GNFA can be easily converted into a regular expression by reducing the number of states until S = {s, a}.
Examples of FSMs
Deterministic finite state machine
The following example explains a deterministic finite state machine (M) with a binary alphabet, which determines if the input contains an even number of 0s.
M = (S, Σ, T, s, A)
- Σ = {0, 1}
- S = {_S_1, _S_2}
- s = _S_1
- A\ = {_S_1}
- The transition function T is visualised by the directed graph shown on the right, and defined as follows:
- T(_S_1, 0) = _S_2
- T(_S_1, 1) = _S_1
- T(_S_2, 0) = _S_1
- T(_S_2, 1) = _S_2 Simply put, the state _S_1 represents that there has been an even number of 0s in the input so far, while _S_2 signifies an odd number. A 1 in the input does not change the state of the automaton. When the input ends, the state will show whether the input contained an even number of 0s or not.
Optimization and Canonicalisation
The problem of optimizing an FSM (finding the machine with the least number of states that performs the same function) is decidable, unlike the same problem for more computationally powerful machines. Furthermore, it is possible to construct a canonical version of any FSM, in order to test for equality. Both of these problems can be solved using a colouring algorithm.
Computational power
FSMs can only recognize regular languages, and hence they are less computationally powerful than Turing machines - there are decidable problems that are not computable using a FSM.
For each non-deterministic FSM a deterministic FSM of equal computational power can be constructed with an algorithm.
Representation
A FSM may be represented using a state transition table or a state diagram.
Implementation
A finite state machine can be implemented in software with a state transition matrix (in some cases a sparse matrix implemented with linked lists or a huge _switch_-statement for detecting the internal state and then individual switch statements for decoding the input symbol).
In hardware a FSM may be built from a programmable logic device.
See also