Sharmila Shivaswamy | Anna University (original) (raw)
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Papers by Sharmila Shivaswamy
The enhanced Built in self test (BIST) is a combined form of both hardware and software together ... more The enhanced Built in self test (BIST) is a combined form of both hardware and software together to resolve the memory problem in self testing. So it automatically comprises own test using self test pattern generation. The implementation can be done using the microcontroller MSP 430 series. Here
we are using the Xilinx software for compilation in the design implementation. Also its functional can be done using dynamic RAM and reduces the external testing methods also includes diagnosis of test.
Content addressable memory (CAM) is a memory unit that performs single clock cycle content matchi... more Content addressable memory (CAM) is a memory unit that performs single clock cycle content matching instead of an address. CAMs are vastly used in network routers and cache controllers, as basics look-up table function is performed over all the stored memory information with high power
dissipation. There is a trade-off between power consumption, area used and speed. A robust, low power and soaring speed sensing amplifier are requisite after memory design. In this paper, a parity bit is used to reduce the peak and average power consumption and enhance the robustness of the design against process variation. Thus, proposed method is a reordering overlapped mechanism used to reduce power consumption. In this mechanism, the word circuit is split into two sections that are searched sequentially. The main CAM
challenges are to reduce power consumption associated with large amount of parallel process, exclusive of sacrificing speed or memory density.
The enhanced Built in self test (BIST) is a combined form of both hardware and software together ... more The enhanced Built in self test (BIST) is a combined form of both hardware and software together to resolve the memory problem in self testing. So it automatically comprises own test using self test pattern generation. The implementation can be done using the microcontroller MSP 430 series. Here
we are using the Xilinx software for compilation in the design implementation. Also its functional can be done using dynamic RAM and reduces the external testing methods also includes diagnosis of test.
Content addressable memory (CAM) is a memory unit that performs single clock cycle content matchi... more Content addressable memory (CAM) is a memory unit that performs single clock cycle content matching instead of an address. CAMs are vastly used in network routers and cache controllers, as basics look-up table function is performed over all the stored memory information with high power
dissipation. There is a trade-off between power consumption, area used and speed. A robust, low power and soaring speed sensing amplifier are requisite after memory design. In this paper, a parity bit is used to reduce the peak and average power consumption and enhance the robustness of the design against process variation. Thus, proposed method is a reordering overlapped mechanism used to reduce power consumption. In this mechanism, the word circuit is split into two sections that are searched sequentially. The main CAM
challenges are to reduce power consumption associated with large amount of parallel process, exclusive of sacrificing speed or memory density.