Kevin Nordquist | Arizona State University (original) (raw)
Papers by Kevin Nordquist
1996 IEEE MTT-S International Microwave Symposium Digest, 1996
... microwave applications due to several unique properties of Sic, including a high bredidown el... more ... microwave applications due to several unique properties of Sic, including a high bredidown electric field, high saturated electron velocity and high thermal conductivity. In this paper we report on Sic MESFET's with 0.7 pm x 332 pm gates that were measured under Class B bias ...
Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena, 2002
Proximity effects and resist heating during high energy electron-beam (e-beam) patterning of extr... more Proximity effects and resist heating during high energy electron-beam (e-beam) patterning of extreme ultraviolet lithography (EUVL) mask were investigated for the 50 nm node and beyond. These effects were observed experimentally on both silicon wafers and standard 6025 photomasks coated with two different EUVL absorber stacks. Monte Carlo and resist simulations were used for proximity effect correction and resist heating effect verification. The estimated temperature change during electron-beam writing was also attempted using the finite element method.
Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena, 2000
The use of chemically amplified (CA) resists in integrated circuit fabrication is accepted in sem... more The use of chemically amplified (CA) resists in integrated circuit fabrication is accepted in semiconductor manufacturing as a way to achieve high resolution with excellent critical dimension (CD) control and etch selectivity. The use of CA resists for mask fabrication has not had as much favor due to resist storage stability issues and CD variations due to postexposure bake (PEB) sensitivities. One key component to the CD control on SCALPEL membrane masks is the thermal uniformity of the membranes and baking environment during the PEB process. This article discusses the numerical models created to predict temperature gradients within membranes and across membranes on a 200 mm SCALPEL mask. Verifications of the model by comparison of simulation results and actual CD data are also presented.
Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena, 1997
The fabrication of magnetoresistive random access memory (MRAM) devices requires full characteriz... more The fabrication of magnetoresistive random access memory (MRAM) devices requires full characterization of the giant magnetoresistive ratio (GMR) permalloy films at the sub-0.5 μm feature dimensions. Future memory arrays of the 1 and 4 Gb density require GMR bit cells of a 0.25 μm and below in configurations which will require close proximity of cells. Since the cells are magnetic and act like tiny magnets, the switching field of a cell may be influenced by the polarization direction of the neighboring cell. This article describes the development of sub-0.5 μm MRAM devices using current e-beam microfabrication techniques and the implementation of the latest chemically amplified deep ultraviolet resists. Etch processing is also discussed as well as the testing results for the 0.25 μm arrays. Testing the GMR material at these dimensions consists of evaluating the single magnetic domain behavior and observing the effect of cell size on the magnetoresistance ratio. Array testing will con...
Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena, 2003
As a means of studying process windows with short turnaround time while avoiding substrate-to-sub... more As a means of studying process windows with short turnaround time while avoiding substrate-to-substrate repeatability issues, Step and Flash Imprint Lithography templates were fabricated with physical masking of quadrants during dry etching used to introduce process perturbations. For every 20 s of descum (Ar/O2 etch) time, critical dimensions (CD) were observed to change approximately 2.6 nm on sub-100 nm features. Similarly, increasing Cr overetch time by 20% resulted in a positive CD change of 3.8 nm. Line edge roughness decreased with increasing descum and Cr overetch times. Best overall performance was observed for a 20 s descum used in conjunction with a 110% Cr overetch. Of four tip types studied, sharpened silicon atomic force microscopy tips were able to accurately measure etch depth of 80 nm trenches, but geometrical considerations limited sidewall angle determination to greater than 100°. Cross-sectioning of features on 6×6×0.25 in. quartz plates was successfully accompli...
Proceedings IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits, 1995
4H-SiC MESFETs have been fabricated, packaged, and RF power tested under a wide range of bias con... more 4H-SiC MESFETs have been fabricated, packaged, and RF power tested under a wide range of bias conditions, ranging from Class A to Class B gate bias, and from 10 V to 50 V drain bias. Peak device performance included output power of 30.2 dBm (3.1 W/mm) at the 3 dB compression point and 38.9% power added efficiency in Class A operation, and 65.7% power added efficiency with 28.8 dBm (2.27 W/mm) maximum output power under Class B conditions. We believe this to be both the highest power density and the highest power added efficiency reported for a SiC MESFET.
Journal of Photopolymer Science and Technology, 2004
Advances in Resist Technology and Processing XIX, 2002
ABSTRACT Sub 100 nm T-gate structures have been produced using a tri- level resist stack modified... more ABSTRACT Sub 100 nm T-gate structures have been produced using a tri- level resist stack modified from previously published results utilizing ZEP7000A, PMGI and ZEP520A positive e-beam resists. The new resist stack replaces the top resist with the more sensitive ZEP7000A from Zeon Chemical. The does sensitivity of the ZEP1000A is an order of magnitude higher than the ZEP520A. This difference provides the flexibility to create T-gate structures with larger top cross-sectional dimensions, which increase the transconductance. The technique can also be used to create other novel structures such as gamma-gates and small air bridges, by varying the dose on the different parts of a feature design to achieve the desired three-dimensional resist structure.
1995 53rd Annual Device Research Conference Digest
MESFET's fabricated on high TeeesiStiVity 4H-Sic substrates have attained anfmax of
MRS Proceedings, 1994
ABSTRACTThe breakdown electric field of 4H-SiC as a function of doping was measured using pn junc... more ABSTRACTThe breakdown electric field of 4H-SiC as a function of doping was measured using pn junction rectifiers, with maximum voltages of 1130 V being achieved. 4H-SiC vertical power MOSFET structures have shown specific on-resistances of 33 mΩ-cm2 for devices capable of blocking 150 V. A current density of 100 A/cm2 was achieved at a drain voltage of 3.3 V. Thyristors fabricated in SiC have also shown blocking voltages of 160 V and 100 A/cm2 at 3.0 V. High temperature operation was measured, with the power MOSFETs operating to 300°C, and the thyristors operating to 500°C.Submicron 6H- and 4H-SiC MESFETs have shown good I-V characteristics to Vd= 40 V, with an Idss of 200–300 mA/mm. The maximum operating frequencies (fmax) achieved for 6H-SiC MESFETs is 13.8 GHz, with small-signal power gains of 9.8 dB and 2.9 dB at 5 GHz and 10 GHz, respectively. 4H-SiC MESFETs have demonstrated an RF output power density of 2.8 W/mm at 1.8 GHz. This is the highest power density ever reported for ...
Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena, 2004
In order for step and flash imprint lithography (S-FIL) to become a truly viable manufacturing te... more In order for step and flash imprint lithography (S-FIL) to become a truly viable manufacturing technology, infrastructure including template repair must be commercially available. Extensive template repair studies were undertaken using RAVE’s nm 650 tool which is predicated on an AFM platform and relies upon a nanomachining technique for opaque defect removal. On S-FIL templates, the standard deviation for depth repairs in quartz from the target depth was found to be 3.1nm (1σ). At 21.5nm (1σ), the analogous spread in edge placement data for opaque line protrusions was somewhat higher. Trench cuts through lines were successfully created with a minimum size of about 55nm. The effectiveness of the repairs on the template was verified by imprinting experiments. The range of depth offsets studied (−15to+15nm) had no bearing on the imprinting process. The edge placement on wafers virtually mirrored the edge placement of the repaired templates. Connections between features which were crea...
Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena, 2003
The escalating cost for next generation lithography (NGL) tools is driven in part by the need for... more The escalating cost for next generation lithography (NGL) tools is driven in part by the need for complex sources and optics. The cost for a single NGL tool could exceed $50M in the next few years, a prohibitive number for many companies. As a result, several researchers are looking at low cost alternative methods for printing sub-100 nm features. In the mid-1990’s, several research groups started investigating different methods for imprinting small features. Many of these methods, although very effective at printing small features across an entire wafer, are limited in their ability to do precise overlay. In 1999, Colburn et al. [Proc. SPIE 379 (1999)] discovered that imprinting could be done at low pressures and at room temperatures by using low viscosity UV curable monomers. The technology is typically referred to as step and flash imprint lithography. The use of a quartz template enabled the photocuring process to occur and also opened up the potential for optical alignment of t...
Microelectronic Engineering, 2002
A theoretical analysis and an experimental verification have been carried out to investigate the ... more A theoretical analysis and an experimental verification have been carried out to investigate the need for the inclusion of secondary electron emission and Bremsstrahlung absorption into e-beam lithography simulations for the correct prediction of the proximity effect at high beam voltages and sub-100-nm dimensions. The experimental verification has been performed at 100 kV for a variety of exposure and development conditions for sub-250-nm features. In all cases, good agreement between simulation and experimental data has been obtained using a simplified chemically amplified resist model with the inclusion of secondary electron emission in the Monte Carlo calculations. The role of the Bremsstrahlung X-ray absorption in the resist has been estimated to be negligible. The deficiency of the model when using only primary electrons in the Monte Carlo calculations is also discussed.
Microelectronic Engineering, 2003
Step and flash imprint lithography (SFIL) is an attractive method for printing sub-100 nm geometr... more Step and flash imprint lithography (SFIL) is an attractive method for printing sub-100 nm geometries. Relative to other imprinting processes, SFIL has the advantage that the template is transparent, thereby facilitating conventional overlay techniques. In addition, the imprint process is performed at low pressures and room temperature, which minimizes magnification and distortion errors. Several different methods for fabricating templates are presented in this study. One scheme addresses some of the weaknesses associated with a solid glass substrate by incorporating a conductive and transparent layer of indium tin oxide (ITO) on the surface of the substrate. Features are defined on the templates by patterning a thin layer of PECVD oxide that is deposited on the ITO layer. A second method bypasses the oxide etch process by imaging a thin layer of hydrogen silsesquioxane (HSQ). By using a combination of these two methods, it is also possible to form multi-tiered structures on a template. Templates with features as small as 20 nm have been fabricated using the methods described above. The templates were then used to imprint patterns on 200 mm silicon wafers. It appears that any feature defined in the template is faithfully replicated on the wafer.
Microelectronic Engineering, 2001
A traditional method of e-beam lithography simulation uses the convolution of beam point spread f... more A traditional method of e-beam lithography simulation uses the convolution of beam point spread function (a.k.a. ''proximity function'') with the electron dose image to calculate density of energy deposited in resist. The proximity function is calculated by the Monte Carlo (MC) technique and a large number of simulated electrons are required to provide sufficient calculation accuracy. The purpose of this work is to describe effective algorithmic improvements that increase the performance of MC simulations while maintaining high accuracy of the calculated proximity function. We also consider the issue of robust integration when convolving the proximity function with electron dose image.
Microelectronic Engineering, 1999
Microelectronic Engineering, 2003
Step and flash imprint lithography (SFIL) replicates patterns by using a transparent template wit... more Step and flash imprint lithography (SFIL) replicates patterns by using a transparent template with relief images etched into its surface. Recent work has examined alternative methods for template fabrication. One scheme incorporates a conductive and transparent layer of indium tin oxide (ITO) on the surface of the substrate. Features are defined on the templates by patterning a thin layer of PECVD oxide that is deposited on the ITO layer. A second method bypasses the oxide etch process by imaging a thin layer of hydrogen silsesquioxane (HSQ). By combining or iterating the two methods, it is possible to form multi-tiered structures on a template. Two and three tier structures were fabricated on silicon wafers and templates. A two layer structure was fabricated on a quartz photoplate by patterning PECVD oxide and subsequently patterning a second tier using HSQ. The resulting relief structures were successfully replicated on wafers using SFIL.
Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena, 2002
The feasibility of using hydrogen silsesquioxane (HSQ) to directly pattern the relief layer of st... more The feasibility of using hydrogen silsesquioxane (HSQ) to directly pattern the relief layer of step and flash imprint lithography (SFIL) templates has been successfully demonstrated. HSQ is a spin-coatable oxide, which is capable of high resolution electron-beam lithography. Negative acting and nonchemically amplified, HSQ has moderate electron-beam sensitivity and excellent processing latitude. In this novel approach, 6 ×6 × 0.25 in.3 quartz photomask substrates are coated with a 60 nm indium tin oxide (ITO) charge dissipation layer and directly electron-beam written using a 100 nm film of HSQ. Direct patterning of an oxide relief layer eliminates the problems of critical dimension control associated with both chromium and oxide etches, both required processes of previous template fabrication schemes. Resolution of isolated and semidense lines of 30 nm has been demonstrated on imprinted wafers using this type of template. During this evaluation, a failure of the release layer to pr...
This invention relates to a lithographic template, a method of forming the lithographic template ... more This invention relates to a lithographic template, a method of forming the lithographic template and a method for forming devices with the lithographic template. The lithographic template (10, 110, 210) is formed having a substrate (12, 112, 212) and a charge dissipation layer (20, 120, 220), and a patterned imageable relief layer, (16, 116, 216) formed on a surface (14, 114, 214) of the substrate (10, 110, 210) using radiation. The template (10, 110, 210) is used in the fabrication of a semiconductor device (344) for affecting a pattern in the device (344) by positioning (338) the template (10, 11, 210) in close proximity to semiconductor device (344) having a radiation sensitive material (334) formed thereon and applying a pressure (340) to cause the radiation sensitive material to flow into the relief image present on the template (10, 110, 210). Radiation (342) is then applied through the template (10, 110, 210) to cure portions of the radiation sensitive material and define the...
Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures, 2001
Extreme ultraviolet lithography ͑EUVL͒ is the leading candidate for next generation lithography w... more Extreme ultraviolet lithography ͑EUVL͒ is the leading candidate for next generation lithography with the potential for extendibility beyond the 50 nm node. Selecting the proper materials for the absorber stack directly impacts one's ability to conduct effective electron beam patterning, focused ion beam repair, and inspection of an EUVL reticle. An attempt to define the optimal absorber stack based on the interaction of electrons, ions, and photons with the absorber stack is studied from the perspective of patterning, repair, and inspection of EUVL reticles, respectively.
1996 IEEE MTT-S International Microwave Symposium Digest, 1996
... microwave applications due to several unique properties of Sic, including a high bredidown el... more ... microwave applications due to several unique properties of Sic, including a high bredidown electric field, high saturated electron velocity and high thermal conductivity. In this paper we report on Sic MESFET's with 0.7 pm x 332 pm gates that were measured under Class B bias ...
Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena, 2002
Proximity effects and resist heating during high energy electron-beam (e-beam) patterning of extr... more Proximity effects and resist heating during high energy electron-beam (e-beam) patterning of extreme ultraviolet lithography (EUVL) mask were investigated for the 50 nm node and beyond. These effects were observed experimentally on both silicon wafers and standard 6025 photomasks coated with two different EUVL absorber stacks. Monte Carlo and resist simulations were used for proximity effect correction and resist heating effect verification. The estimated temperature change during electron-beam writing was also attempted using the finite element method.
Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena, 2000
The use of chemically amplified (CA) resists in integrated circuit fabrication is accepted in sem... more The use of chemically amplified (CA) resists in integrated circuit fabrication is accepted in semiconductor manufacturing as a way to achieve high resolution with excellent critical dimension (CD) control and etch selectivity. The use of CA resists for mask fabrication has not had as much favor due to resist storage stability issues and CD variations due to postexposure bake (PEB) sensitivities. One key component to the CD control on SCALPEL membrane masks is the thermal uniformity of the membranes and baking environment during the PEB process. This article discusses the numerical models created to predict temperature gradients within membranes and across membranes on a 200 mm SCALPEL mask. Verifications of the model by comparison of simulation results and actual CD data are also presented.
Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena, 1997
The fabrication of magnetoresistive random access memory (MRAM) devices requires full characteriz... more The fabrication of magnetoresistive random access memory (MRAM) devices requires full characterization of the giant magnetoresistive ratio (GMR) permalloy films at the sub-0.5 μm feature dimensions. Future memory arrays of the 1 and 4 Gb density require GMR bit cells of a 0.25 μm and below in configurations which will require close proximity of cells. Since the cells are magnetic and act like tiny magnets, the switching field of a cell may be influenced by the polarization direction of the neighboring cell. This article describes the development of sub-0.5 μm MRAM devices using current e-beam microfabrication techniques and the implementation of the latest chemically amplified deep ultraviolet resists. Etch processing is also discussed as well as the testing results for the 0.25 μm arrays. Testing the GMR material at these dimensions consists of evaluating the single magnetic domain behavior and observing the effect of cell size on the magnetoresistance ratio. Array testing will con...
Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena, 2003
As a means of studying process windows with short turnaround time while avoiding substrate-to-sub... more As a means of studying process windows with short turnaround time while avoiding substrate-to-substrate repeatability issues, Step and Flash Imprint Lithography templates were fabricated with physical masking of quadrants during dry etching used to introduce process perturbations. For every 20 s of descum (Ar/O2 etch) time, critical dimensions (CD) were observed to change approximately 2.6 nm on sub-100 nm features. Similarly, increasing Cr overetch time by 20% resulted in a positive CD change of 3.8 nm. Line edge roughness decreased with increasing descum and Cr overetch times. Best overall performance was observed for a 20 s descum used in conjunction with a 110% Cr overetch. Of four tip types studied, sharpened silicon atomic force microscopy tips were able to accurately measure etch depth of 80 nm trenches, but geometrical considerations limited sidewall angle determination to greater than 100°. Cross-sectioning of features on 6×6×0.25 in. quartz plates was successfully accompli...
Proceedings IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits, 1995
4H-SiC MESFETs have been fabricated, packaged, and RF power tested under a wide range of bias con... more 4H-SiC MESFETs have been fabricated, packaged, and RF power tested under a wide range of bias conditions, ranging from Class A to Class B gate bias, and from 10 V to 50 V drain bias. Peak device performance included output power of 30.2 dBm (3.1 W/mm) at the 3 dB compression point and 38.9% power added efficiency in Class A operation, and 65.7% power added efficiency with 28.8 dBm (2.27 W/mm) maximum output power under Class B conditions. We believe this to be both the highest power density and the highest power added efficiency reported for a SiC MESFET.
Journal of Photopolymer Science and Technology, 2004
Advances in Resist Technology and Processing XIX, 2002
ABSTRACT Sub 100 nm T-gate structures have been produced using a tri- level resist stack modified... more ABSTRACT Sub 100 nm T-gate structures have been produced using a tri- level resist stack modified from previously published results utilizing ZEP7000A, PMGI and ZEP520A positive e-beam resists. The new resist stack replaces the top resist with the more sensitive ZEP7000A from Zeon Chemical. The does sensitivity of the ZEP1000A is an order of magnitude higher than the ZEP520A. This difference provides the flexibility to create T-gate structures with larger top cross-sectional dimensions, which increase the transconductance. The technique can also be used to create other novel structures such as gamma-gates and small air bridges, by varying the dose on the different parts of a feature design to achieve the desired three-dimensional resist structure.
1995 53rd Annual Device Research Conference Digest
MESFET's fabricated on high TeeesiStiVity 4H-Sic substrates have attained anfmax of
MRS Proceedings, 1994
ABSTRACTThe breakdown electric field of 4H-SiC as a function of doping was measured using pn junc... more ABSTRACTThe breakdown electric field of 4H-SiC as a function of doping was measured using pn junction rectifiers, with maximum voltages of 1130 V being achieved. 4H-SiC vertical power MOSFET structures have shown specific on-resistances of 33 mΩ-cm2 for devices capable of blocking 150 V. A current density of 100 A/cm2 was achieved at a drain voltage of 3.3 V. Thyristors fabricated in SiC have also shown blocking voltages of 160 V and 100 A/cm2 at 3.0 V. High temperature operation was measured, with the power MOSFETs operating to 300°C, and the thyristors operating to 500°C.Submicron 6H- and 4H-SiC MESFETs have shown good I-V characteristics to Vd= 40 V, with an Idss of 200–300 mA/mm. The maximum operating frequencies (fmax) achieved for 6H-SiC MESFETs is 13.8 GHz, with small-signal power gains of 9.8 dB and 2.9 dB at 5 GHz and 10 GHz, respectively. 4H-SiC MESFETs have demonstrated an RF output power density of 2.8 W/mm at 1.8 GHz. This is the highest power density ever reported for ...
Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena, 2004
In order for step and flash imprint lithography (S-FIL) to become a truly viable manufacturing te... more In order for step and flash imprint lithography (S-FIL) to become a truly viable manufacturing technology, infrastructure including template repair must be commercially available. Extensive template repair studies were undertaken using RAVE’s nm 650 tool which is predicated on an AFM platform and relies upon a nanomachining technique for opaque defect removal. On S-FIL templates, the standard deviation for depth repairs in quartz from the target depth was found to be 3.1nm (1σ). At 21.5nm (1σ), the analogous spread in edge placement data for opaque line protrusions was somewhat higher. Trench cuts through lines were successfully created with a minimum size of about 55nm. The effectiveness of the repairs on the template was verified by imprinting experiments. The range of depth offsets studied (−15to+15nm) had no bearing on the imprinting process. The edge placement on wafers virtually mirrored the edge placement of the repaired templates. Connections between features which were crea...
Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena, 2003
The escalating cost for next generation lithography (NGL) tools is driven in part by the need for... more The escalating cost for next generation lithography (NGL) tools is driven in part by the need for complex sources and optics. The cost for a single NGL tool could exceed $50M in the next few years, a prohibitive number for many companies. As a result, several researchers are looking at low cost alternative methods for printing sub-100 nm features. In the mid-1990’s, several research groups started investigating different methods for imprinting small features. Many of these methods, although very effective at printing small features across an entire wafer, are limited in their ability to do precise overlay. In 1999, Colburn et al. [Proc. SPIE 379 (1999)] discovered that imprinting could be done at low pressures and at room temperatures by using low viscosity UV curable monomers. The technology is typically referred to as step and flash imprint lithography. The use of a quartz template enabled the photocuring process to occur and also opened up the potential for optical alignment of t...
Microelectronic Engineering, 2002
A theoretical analysis and an experimental verification have been carried out to investigate the ... more A theoretical analysis and an experimental verification have been carried out to investigate the need for the inclusion of secondary electron emission and Bremsstrahlung absorption into e-beam lithography simulations for the correct prediction of the proximity effect at high beam voltages and sub-100-nm dimensions. The experimental verification has been performed at 100 kV for a variety of exposure and development conditions for sub-250-nm features. In all cases, good agreement between simulation and experimental data has been obtained using a simplified chemically amplified resist model with the inclusion of secondary electron emission in the Monte Carlo calculations. The role of the Bremsstrahlung X-ray absorption in the resist has been estimated to be negligible. The deficiency of the model when using only primary electrons in the Monte Carlo calculations is also discussed.
Microelectronic Engineering, 2003
Step and flash imprint lithography (SFIL) is an attractive method for printing sub-100 nm geometr... more Step and flash imprint lithography (SFIL) is an attractive method for printing sub-100 nm geometries. Relative to other imprinting processes, SFIL has the advantage that the template is transparent, thereby facilitating conventional overlay techniques. In addition, the imprint process is performed at low pressures and room temperature, which minimizes magnification and distortion errors. Several different methods for fabricating templates are presented in this study. One scheme addresses some of the weaknesses associated with a solid glass substrate by incorporating a conductive and transparent layer of indium tin oxide (ITO) on the surface of the substrate. Features are defined on the templates by patterning a thin layer of PECVD oxide that is deposited on the ITO layer. A second method bypasses the oxide etch process by imaging a thin layer of hydrogen silsesquioxane (HSQ). By using a combination of these two methods, it is also possible to form multi-tiered structures on a template. Templates with features as small as 20 nm have been fabricated using the methods described above. The templates were then used to imprint patterns on 200 mm silicon wafers. It appears that any feature defined in the template is faithfully replicated on the wafer.
Microelectronic Engineering, 2001
A traditional method of e-beam lithography simulation uses the convolution of beam point spread f... more A traditional method of e-beam lithography simulation uses the convolution of beam point spread function (a.k.a. ''proximity function'') with the electron dose image to calculate density of energy deposited in resist. The proximity function is calculated by the Monte Carlo (MC) technique and a large number of simulated electrons are required to provide sufficient calculation accuracy. The purpose of this work is to describe effective algorithmic improvements that increase the performance of MC simulations while maintaining high accuracy of the calculated proximity function. We also consider the issue of robust integration when convolving the proximity function with electron dose image.
Microelectronic Engineering, 1999
Microelectronic Engineering, 2003
Step and flash imprint lithography (SFIL) replicates patterns by using a transparent template wit... more Step and flash imprint lithography (SFIL) replicates patterns by using a transparent template with relief images etched into its surface. Recent work has examined alternative methods for template fabrication. One scheme incorporates a conductive and transparent layer of indium tin oxide (ITO) on the surface of the substrate. Features are defined on the templates by patterning a thin layer of PECVD oxide that is deposited on the ITO layer. A second method bypasses the oxide etch process by imaging a thin layer of hydrogen silsesquioxane (HSQ). By combining or iterating the two methods, it is possible to form multi-tiered structures on a template. Two and three tier structures were fabricated on silicon wafers and templates. A two layer structure was fabricated on a quartz photoplate by patterning PECVD oxide and subsequently patterning a second tier using HSQ. The resulting relief structures were successfully replicated on wafers using SFIL.
Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena, 2002
The feasibility of using hydrogen silsesquioxane (HSQ) to directly pattern the relief layer of st... more The feasibility of using hydrogen silsesquioxane (HSQ) to directly pattern the relief layer of step and flash imprint lithography (SFIL) templates has been successfully demonstrated. HSQ is a spin-coatable oxide, which is capable of high resolution electron-beam lithography. Negative acting and nonchemically amplified, HSQ has moderate electron-beam sensitivity and excellent processing latitude. In this novel approach, 6 ×6 × 0.25 in.3 quartz photomask substrates are coated with a 60 nm indium tin oxide (ITO) charge dissipation layer and directly electron-beam written using a 100 nm film of HSQ. Direct patterning of an oxide relief layer eliminates the problems of critical dimension control associated with both chromium and oxide etches, both required processes of previous template fabrication schemes. Resolution of isolated and semidense lines of 30 nm has been demonstrated on imprinted wafers using this type of template. During this evaluation, a failure of the release layer to pr...
This invention relates to a lithographic template, a method of forming the lithographic template ... more This invention relates to a lithographic template, a method of forming the lithographic template and a method for forming devices with the lithographic template. The lithographic template (10, 110, 210) is formed having a substrate (12, 112, 212) and a charge dissipation layer (20, 120, 220), and a patterned imageable relief layer, (16, 116, 216) formed on a surface (14, 114, 214) of the substrate (10, 110, 210) using radiation. The template (10, 110, 210) is used in the fabrication of a semiconductor device (344) for affecting a pattern in the device (344) by positioning (338) the template (10, 11, 210) in close proximity to semiconductor device (344) having a radiation sensitive material (334) formed thereon and applying a pressure (340) to cause the radiation sensitive material to flow into the relief image present on the template (10, 110, 210). Radiation (342) is then applied through the template (10, 110, 210) to cure portions of the radiation sensitive material and define the...
Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures, 2001
Extreme ultraviolet lithography ͑EUVL͒ is the leading candidate for next generation lithography w... more Extreme ultraviolet lithography ͑EUVL͒ is the leading candidate for next generation lithography with the potential for extendibility beyond the 50 nm node. Selecting the proper materials for the absorber stack directly impacts one's ability to conduct effective electron beam patterning, focused ion beam repair, and inspection of an EUVL reticle. An attempt to define the optimal absorber stack based on the interaction of electrons, ions, and photons with the absorber stack is studied from the perspective of patterning, repair, and inspection of EUVL reticles, respectively.