Sulaiman M Gana | Bayero University, Kano (original) (raw)

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Papers by Sulaiman M Gana

Research paper thumbnail of Design of a Scada-Based Water Flow and Distribution Monitoring System

The increasing awareness of water management problems has resulted in a need for information in g... more The increasing awareness of water management problems has resulted in a need for information in ground water flow and distrib ution. There have been various approaches to design water monitoring networks, some of these designs have not been effective and reliable. Optimization of a monitoring network requires that the system be organized and structured with respect to the number of locations of sampl ing points. Monitoring and control technologies are indispensable for the safe utilization of water. They allow for the surveillance of source water quality, quantity and the detection of threats, thus defining the boundary conditions for the subsequent prevention and providing earl y warning in case of unexpected contaminations or overflow. This paper therefore presents a design of a SCADA monitoring system with a with a radio telemetry techniques to monitor the distribution and flow of water from the source to some points.

Research paper thumbnail of TEMPERATURE VARIATION EFFECTS ON CARBON NANOTUBE FIELD EFFECT TRANSISTOR (CNTFET) BASED ON SIMULATION STUDY

MOSFETs (Galadanci, et al., 2017b). At the same time, the relatively low carrier mobility in sili... more MOSFETs (Galadanci, et al., 2017b). At the same time, the relatively low carrier mobility in silicon (compared with other semiconductors) may also degrade the MOSFET device performance (Meishoku et al., 2001). Various novel device structures and materials like carbon nanotube transistors (Cui et al., 2003); Wang et al., (2003); Javery et al. (2003) molecular transistors, the effect of gate length on the operation of silicon-on insulator (SOI) MOSFET structure, using three transistors with gate lengths of 100, 200 and 500 nm with a fixed channel length of 500nm were simulated and when the gate length is increased the output drain current and the transistor transconductance increases (Arabshahi Baedia, (2010), the effect of gate length on DG-MOSFET at Nano regime was studied, where by DG-MOSFETs with gate lengths of 20,40, 60, 80 and 100nm were simulated respectively with a fixed

Research paper thumbnail of TEMPERATURE VARIATION EFFECTS ON CARBON NANOTUBE FIELD EFFECT TRANSISTOR (CNTFET) BASED ON SIMULATION STUDY

MOSFETs (Galadanci, et al., 2017b). At the same time, the relatively low carrier mobility in sili... more MOSFETs (Galadanci, et al., 2017b). At the same time, the relatively low carrier mobility in silicon (compared with other semiconductors) may also degrade the MOSFET device performance (Meishoku et al., 2001). Various novel device structures and materials like carbon nanotube transistors (Cui et al., 2003); Wang et al., (2003); Javery et al. (2003) molecular transistors, the effect of gate length on the operation of silicon-on insulator (SOI) MOSFET structure, using three transistors with gate lengths of 100, 200 and 500 nm with a fixed channel length of 500nm were simulated and when the gate length is increased the output drain current and the transistor transconductance increases (Arabshahi Baedia, (2010), the effect of gate length on DG-MOSFET at Nano regime was studied, where by DG-MOSFETs with gate lengths of 20,40, 60, 80 and 100nm were simulated respectively with a fixed

Research paper thumbnail of Investigation of the Thermal Effect in Nano Silicon on Insulator (SOI) MOSFET

This paper study and investigates the thermal effect on the electronics and transport properties ... more This paper study and investigates the thermal effect on the electronics and transport properties of Silicon on Insulator Metal Oxide Semiconductor Field Effect Transistor (SOI MOSFET). Numerical simulations of the electronics characteristics (Average electron velocity, electron density, sub-band energy) are analyzed and presented. The simulation is to investigate the variation and effect of temperature covering a range of low, average and high temperatures (50K, 250K, 350K, 450K, 650K and 850K) on the electronics properties of SOI MOSFET using the quasi-ballistic electron transport model. The results obtained showed that the average electron velocity of the first valley electron is at the peak value of 8.20×〖10〗^5 m/s at 50K and the 2D electron density is 6.04×〖10〗^11 〖Cm〗^(-2) at 850K with sub-band energy of -1.86×〖10〗^(-1) eV resulting in high on-state current (I_on). The second valley electron exhibit the same behaviour as the first valley electron with a 2D electron density of 9.83×〖10〗^11 〖Cm〗^(-2) at 850K. At average, low and high temperature the third valley electron from the source to the drain drift with an average electron velocity at the peak value of 9.20×〖10〗^5 m/s at and the 2D electron density is 6.03×〖10〗^11 〖Cm〗^(-2) with sub-band energy of -1.21×〖10〗^(-1) eV resulting in high on-state current (I_on). This shows at a lower temperature the electron density is very low and almost constant through the channel region because of the high electron velocity average electron velocity and at an average temperature, the average electron velocity e barrier potential is high as such the electron density is relatively constant with increase in the channel length which is more appropriate for designing other analogue or digital system using the SOI MOSFET. The average electron velocity at high is relatively constant as the channel length increases with increases in the gate voltage.

Research paper thumbnail of INVESTIGATION OF THE EFFECT OF TEMPERATURE ON THE DRAIN CURRENT OF A 10NM DOUBLE GATE (DG) MOSFET

In this work, the effect of temperature on the drain current of a 10nm DG MOSFET is investigated ... more In this work, the effect of temperature on the drain current of a 10nm DG MOSFET is investigated for Elemental and Binary Compound semiconductors as channel materials. The semi-classical transport model is used to analysethe effect of temperature covering a range of low, average, and high temperatures (50K, 250K, 350K, 450K, 650K and 850K) using NanoMOS software. It was found that Si and Ge semiconductor channel offer high resistance at low temperature with high electron density and average electron velocity causing a rapid increase in drain current through the channel as the gate voltage increase above and very Low resistance at the range of room temperature (250K to 350K). At low temperature for the semiconductor channel the drain current increases with decrease in average electron velocity due to the suppression in the barrier potential at low temperature. At high temperatures (250K, 350K, 450K, 650K and 850K the drain current in the channel increase with increase in temperature due to the decrease in resistance. The results obtained show the the binary compound semiconductor channels have higher onstate current compared to the elemental semiconductors due to better mobility of electrons and holes which is in agreement with reports in the literature. This indicate that compound semiconductors are more suitable for designing Digital or Analogue System using DG MOSFET below the 10nm region.

Research paper thumbnail of DESIGN OF A 5-BIT GRAY CODE COUNTER FOR ROTARY POSITION ENCODER CONTROL USING FINITE STATE MACHINE

A 5-bits Gray Code Counter was designed for rotary position encoder (RPE) application using finit... more A 5-bits Gray Code Counter was designed for rotary position encoder (RPE) application using finite state machine (FSM) design techniques and simulated using National Instrument (Multisim Version 14.0). The RPE provide output in the form of a binary number of several digits, each number representing a particular angular position which provides information about the motion of the shaft. The slots of the shaft in the position encoder were arranged in such a way that the sequential output from the counter is a number in the gray code. The gray code is used for this design as it allows one-bit position change, unlike the linear code in which the count progress to the next state in more than two bits position changing simultaneously, this transition period give rises to error (glitches) in the position change. The research focuses mainly on the counter design by following the sequence of steps in the FSM design concept using flip-flops and the logical expressions/equations of the counter were obtained and implemented with the appropriate logic gates. Simulated result shows 32 unique number of states of Gray code counter output were successful, of which can be further processed to change the shaft position of the RPE with the desired accuracy. The result also show that the speed of the position change of the RPE is determined by the frequency of the counter clock pulse.

Research paper thumbnail of Publication

Research paper thumbnail of Autonomous ultrasonic based water level detection and control system

Nigerian Journal of Technology, 2018

Research paper thumbnail of Autonomous Ultrasonic Based Water Level Detection and Control System

This paper presents an automated non-intrusive control system for monitoring the water level of d... more This paper presents an automated non-intrusive control system for monitoring the water level of domestic overhead and underground reservoir tank base on the property of wave reflection. The system consists of two HC-SR04 Ultrasonic transceivers that generate ultrasonic pulses and determines the depth of the water surface based on the total Time of Flight (TOF) of the reflected wave. An ATMEGA328 microcontroller was programmed to read the sensors, control the water level and display the corresponding volume of the water on a Liquid Crystal Display (LCD). The experimental result proves the system stability both at turbulence and laminar flows. The proposed approach can be extended to monitor and control the volume and level of other valuable fluids such as diesel, kerosene etc.; as well as hazardous chemical where human interventions may be treacherous.

Research paper thumbnail of Effect of Temperature on the Quasi Ballistic Transport of a Double Gate Nano-MOSFET

Effect of Temperature on the Quasi Ballistic Transport of a Double Gate Nano-MOSFET, 2021

This work analyzes the variation and effect of temperature on the electron transport in a Double ... more This work analyzes the variation and effect of temperature on the electron transport in a Double Gate Nano-MOSFET (DG MOSFET) using quasi ballistic transport (semi-classical) model. NanoMOS version 4.0.4 is used to simulate and investigate the variation and the effect of temperature covering a range of 50k, 450k, and 850k and its influence on the channel dimension from 0nm to 50nm to obtained electronics properties such as the Average electron velocity, 2D electron density and the Sub-band energy along the channel. The study focuses on the elemental semiconductors (Si and Ge) Channel and compound semiconductors (GaAs and InAs) channel under high drain bias than under low drain bias. The result obtained showed that at low temperature for the Si,Ge,GaAs and InAs channels, the 2D electron density was found to be 5.76×〖10〗^11 〖Cm〗^(-2) with an average electron velocity at a peak value of 6.09×〖10〗^5 m/s and the Sub-band energy profile along the channels is -4.98×〖10〗^(-1) eV resulting in high on-state current (I_on). At an average temperature for the Si,Ge,GaAs and InAs channels the 2D electron density was found to be 1.75×〖10〗^12 〖Cm〗^(-2) with average electron velocity at a peak value of 5.76×〖10〗^5 m/s and the Sub-band energy profile along the channel is -3.65×〖10〗^(-1) eV, while at 850k the 2D electron density was found to be 3.38×〖10〗^12 〖Cm〗^(-2) with average electron velocity at a peak value of 5.23×〖10〗^5 m/s and the Sub-band energy profile along the channel is -1.87×〖10〗^(-1) eV for the Si,Ge,GaAs and InAs channels. The result shows that the average temperature range from 300k to 450k is more appropriate and suitable for digital system design using DG MOSFET.

Research paper thumbnail of Design, Implementation and Simulation of 12/24 Hours Digital Clock With Stop Watch and Date Indicator

In this paper thedesign, implementation and simulation of a digital clock capable of displaying s... more In this paper thedesign, implementation and simulation of a digital clock capable of displaying seconds, minutes and 12 or 24 hours timing, with a date indicator that display days ,months and years including a stop watch is presented. The architectural design was carried out using synchronous decade counters and logic gates. The basic clock frequency signal (in hertz) that drives the clock was generated using a clock voltage source of the simulator for frequency division of the desired clock pulse. The digital clock circuit was implemented and simulated using national instrument electronic work bench (multism) software version 13.0 on personal computer (PC). The result of the simulation showed that the designed clock and stop watch gives an approximate timing count, comparable to different existing digital clocks/stop watch with percentage error of 0.0033%.

Research paper thumbnail of Design of a Scada-Based Water Flow and Distribution Monitoring System

The increasing awareness of water management problems has resulted in a need for information in g... more The increasing awareness of water management problems has resulted in a need for information in ground water flow and distrib ution. There have been various approaches to design water monitoring networks, some of these designs have not been effective and reliable. Optimization of a monitoring network requires that the system be organized and structured with respect to the number of locations of sampl ing points. Monitoring and control technologies are indispensable for the safe utilization of water. They allow for the surveillance of source water quality, quantity and the detection of threats, thus defining the boundary conditions for the subsequent prevention and providing earl y warning in case of unexpected contaminations or overflow. This paper therefore presents a design of a SCADA monitoring system with a with a radio telemetry techniques to monitor the distribution and flow of water from the source to some points.

Research paper thumbnail of TEMPERATURE VARIATION EFFECTS ON CARBON NANOTUBE FIELD EFFECT TRANSISTOR (CNTFET) BASED ON SIMULATION STUDY

MOSFETs (Galadanci, et al., 2017b). At the same time, the relatively low carrier mobility in sili... more MOSFETs (Galadanci, et al., 2017b). At the same time, the relatively low carrier mobility in silicon (compared with other semiconductors) may also degrade the MOSFET device performance (Meishoku et al., 2001). Various novel device structures and materials like carbon nanotube transistors (Cui et al., 2003); Wang et al., (2003); Javery et al. (2003) molecular transistors, the effect of gate length on the operation of silicon-on insulator (SOI) MOSFET structure, using three transistors with gate lengths of 100, 200 and 500 nm with a fixed channel length of 500nm were simulated and when the gate length is increased the output drain current and the transistor transconductance increases (Arabshahi Baedia, (2010), the effect of gate length on DG-MOSFET at Nano regime was studied, where by DG-MOSFETs with gate lengths of 20,40, 60, 80 and 100nm were simulated respectively with a fixed

Research paper thumbnail of TEMPERATURE VARIATION EFFECTS ON CARBON NANOTUBE FIELD EFFECT TRANSISTOR (CNTFET) BASED ON SIMULATION STUDY

MOSFETs (Galadanci, et al., 2017b). At the same time, the relatively low carrier mobility in sili... more MOSFETs (Galadanci, et al., 2017b). At the same time, the relatively low carrier mobility in silicon (compared with other semiconductors) may also degrade the MOSFET device performance (Meishoku et al., 2001). Various novel device structures and materials like carbon nanotube transistors (Cui et al., 2003); Wang et al., (2003); Javery et al. (2003) molecular transistors, the effect of gate length on the operation of silicon-on insulator (SOI) MOSFET structure, using three transistors with gate lengths of 100, 200 and 500 nm with a fixed channel length of 500nm were simulated and when the gate length is increased the output drain current and the transistor transconductance increases (Arabshahi Baedia, (2010), the effect of gate length on DG-MOSFET at Nano regime was studied, where by DG-MOSFETs with gate lengths of 20,40, 60, 80 and 100nm were simulated respectively with a fixed

Research paper thumbnail of Investigation of the Thermal Effect in Nano Silicon on Insulator (SOI) MOSFET

This paper study and investigates the thermal effect on the electronics and transport properties ... more This paper study and investigates the thermal effect on the electronics and transport properties of Silicon on Insulator Metal Oxide Semiconductor Field Effect Transistor (SOI MOSFET). Numerical simulations of the electronics characteristics (Average electron velocity, electron density, sub-band energy) are analyzed and presented. The simulation is to investigate the variation and effect of temperature covering a range of low, average and high temperatures (50K, 250K, 350K, 450K, 650K and 850K) on the electronics properties of SOI MOSFET using the quasi-ballistic electron transport model. The results obtained showed that the average electron velocity of the first valley electron is at the peak value of 8.20×〖10〗^5 m/s at 50K and the 2D electron density is 6.04×〖10〗^11 〖Cm〗^(-2) at 850K with sub-band energy of -1.86×〖10〗^(-1) eV resulting in high on-state current (I_on). The second valley electron exhibit the same behaviour as the first valley electron with a 2D electron density of 9.83×〖10〗^11 〖Cm〗^(-2) at 850K. At average, low and high temperature the third valley electron from the source to the drain drift with an average electron velocity at the peak value of 9.20×〖10〗^5 m/s at and the 2D electron density is 6.03×〖10〗^11 〖Cm〗^(-2) with sub-band energy of -1.21×〖10〗^(-1) eV resulting in high on-state current (I_on). This shows at a lower temperature the electron density is very low and almost constant through the channel region because of the high electron velocity average electron velocity and at an average temperature, the average electron velocity e barrier potential is high as such the electron density is relatively constant with increase in the channel length which is more appropriate for designing other analogue or digital system using the SOI MOSFET. The average electron velocity at high is relatively constant as the channel length increases with increases in the gate voltage.

Research paper thumbnail of INVESTIGATION OF THE EFFECT OF TEMPERATURE ON THE DRAIN CURRENT OF A 10NM DOUBLE GATE (DG) MOSFET

In this work, the effect of temperature on the drain current of a 10nm DG MOSFET is investigated ... more In this work, the effect of temperature on the drain current of a 10nm DG MOSFET is investigated for Elemental and Binary Compound semiconductors as channel materials. The semi-classical transport model is used to analysethe effect of temperature covering a range of low, average, and high temperatures (50K, 250K, 350K, 450K, 650K and 850K) using NanoMOS software. It was found that Si and Ge semiconductor channel offer high resistance at low temperature with high electron density and average electron velocity causing a rapid increase in drain current through the channel as the gate voltage increase above and very Low resistance at the range of room temperature (250K to 350K). At low temperature for the semiconductor channel the drain current increases with decrease in average electron velocity due to the suppression in the barrier potential at low temperature. At high temperatures (250K, 350K, 450K, 650K and 850K the drain current in the channel increase with increase in temperature due to the decrease in resistance. The results obtained show the the binary compound semiconductor channels have higher onstate current compared to the elemental semiconductors due to better mobility of electrons and holes which is in agreement with reports in the literature. This indicate that compound semiconductors are more suitable for designing Digital or Analogue System using DG MOSFET below the 10nm region.

Research paper thumbnail of DESIGN OF A 5-BIT GRAY CODE COUNTER FOR ROTARY POSITION ENCODER CONTROL USING FINITE STATE MACHINE

A 5-bits Gray Code Counter was designed for rotary position encoder (RPE) application using finit... more A 5-bits Gray Code Counter was designed for rotary position encoder (RPE) application using finite state machine (FSM) design techniques and simulated using National Instrument (Multisim Version 14.0). The RPE provide output in the form of a binary number of several digits, each number representing a particular angular position which provides information about the motion of the shaft. The slots of the shaft in the position encoder were arranged in such a way that the sequential output from the counter is a number in the gray code. The gray code is used for this design as it allows one-bit position change, unlike the linear code in which the count progress to the next state in more than two bits position changing simultaneously, this transition period give rises to error (glitches) in the position change. The research focuses mainly on the counter design by following the sequence of steps in the FSM design concept using flip-flops and the logical expressions/equations of the counter were obtained and implemented with the appropriate logic gates. Simulated result shows 32 unique number of states of Gray code counter output were successful, of which can be further processed to change the shaft position of the RPE with the desired accuracy. The result also show that the speed of the position change of the RPE is determined by the frequency of the counter clock pulse.

Research paper thumbnail of Publication

Research paper thumbnail of Autonomous ultrasonic based water level detection and control system

Nigerian Journal of Technology, 2018

Research paper thumbnail of Autonomous Ultrasonic Based Water Level Detection and Control System

This paper presents an automated non-intrusive control system for monitoring the water level of d... more This paper presents an automated non-intrusive control system for monitoring the water level of domestic overhead and underground reservoir tank base on the property of wave reflection. The system consists of two HC-SR04 Ultrasonic transceivers that generate ultrasonic pulses and determines the depth of the water surface based on the total Time of Flight (TOF) of the reflected wave. An ATMEGA328 microcontroller was programmed to read the sensors, control the water level and display the corresponding volume of the water on a Liquid Crystal Display (LCD). The experimental result proves the system stability both at turbulence and laminar flows. The proposed approach can be extended to monitor and control the volume and level of other valuable fluids such as diesel, kerosene etc.; as well as hazardous chemical where human interventions may be treacherous.

Research paper thumbnail of Effect of Temperature on the Quasi Ballistic Transport of a Double Gate Nano-MOSFET

Effect of Temperature on the Quasi Ballistic Transport of a Double Gate Nano-MOSFET, 2021

This work analyzes the variation and effect of temperature on the electron transport in a Double ... more This work analyzes the variation and effect of temperature on the electron transport in a Double Gate Nano-MOSFET (DG MOSFET) using quasi ballistic transport (semi-classical) model. NanoMOS version 4.0.4 is used to simulate and investigate the variation and the effect of temperature covering a range of 50k, 450k, and 850k and its influence on the channel dimension from 0nm to 50nm to obtained electronics properties such as the Average electron velocity, 2D electron density and the Sub-band energy along the channel. The study focuses on the elemental semiconductors (Si and Ge) Channel and compound semiconductors (GaAs and InAs) channel under high drain bias than under low drain bias. The result obtained showed that at low temperature for the Si,Ge,GaAs and InAs channels, the 2D electron density was found to be 5.76×〖10〗^11 〖Cm〗^(-2) with an average electron velocity at a peak value of 6.09×〖10〗^5 m/s and the Sub-band energy profile along the channels is -4.98×〖10〗^(-1) eV resulting in high on-state current (I_on). At an average temperature for the Si,Ge,GaAs and InAs channels the 2D electron density was found to be 1.75×〖10〗^12 〖Cm〗^(-2) with average electron velocity at a peak value of 5.76×〖10〗^5 m/s and the Sub-band energy profile along the channel is -3.65×〖10〗^(-1) eV, while at 850k the 2D electron density was found to be 3.38×〖10〗^12 〖Cm〗^(-2) with average electron velocity at a peak value of 5.23×〖10〗^5 m/s and the Sub-band energy profile along the channel is -1.87×〖10〗^(-1) eV for the Si,Ge,GaAs and InAs channels. The result shows that the average temperature range from 300k to 450k is more appropriate and suitable for digital system design using DG MOSFET.

Research paper thumbnail of Design, Implementation and Simulation of 12/24 Hours Digital Clock With Stop Watch and Date Indicator

In this paper thedesign, implementation and simulation of a digital clock capable of displaying s... more In this paper thedesign, implementation and simulation of a digital clock capable of displaying seconds, minutes and 12 or 24 hours timing, with a date indicator that display days ,months and years including a stop watch is presented. The architectural design was carried out using synchronous decade counters and logic gates. The basic clock frequency signal (in hertz) that drives the clock was generated using a clock voltage source of the simulator for frequency division of the desired clock pulse. The digital clock circuit was implemented and simulated using national instrument electronic work bench (multism) software version 13.0 on personal computer (PC). The result of the simulation showed that the designed clock and stop watch gives an approximate timing count, comparable to different existing digital clocks/stop watch with percentage error of 0.0033%.