Ezz El-Masry | Dalhousie University (original) (raw)
Papers by Ezz El-Masry
Analog Integrated Circuits and Signal Processing, 1991
Observed spatiotemporal firings of biological neurons have lead many researchers to believe that ... more Observed spatiotemporal firings of biological neurons have lead many researchers to believe that the rate of firings of these biological neurons is what conveys neuronal information in the brain. In this paper we seek to highlight parallels between biological neurons and observed effects in real neurons, with artificial neurons implemented as switched-capacitor structures. One such effect is the heavy use
Novel voltage mode filters based on a new architecture for a current feedback amplifier are propo... more Novel voltage mode filters based on a new architecture for a current feedback amplifier are proposed in this paper. The new biquads are attractive because they exhibit low Q- and ω0-variability due the constant bandwidth of the new amplifier used. Theoretical results as well as experimental results obtained using an AD844 and a 741 operational amplifier are presented.
Electronics Letters, 1990
Proceedings of 1994 37th Midwest Symposium on Circuits and Systems, 1994
Page 1. Current-Mode Implementation of Discrete-Time Cellular Neural Networks Using the Pulse Wid... more Page 1. Current-Mode Implementation of Discrete-Time Cellular Neural Networks Using the Pulse Width Modulation Technique Hong-Kui Yang, Mohamed A. Yakout and Ezz I. El-Masry Dept. of Electrical Engineering Technical ...
Proceedings of the Fifteenth National Radio Science Conference. NRSC '98 (Cat. No.98EX109), 1998
... It always needs an A/D (DIA) interface for input (output) to deal with real-time problems, Th... more ... It always needs an A/D (DIA) interface for input (output) to deal with real-time problems, This interface slows down the whole system and makes its accuracy dependent on this A/D @/A). On the other hand, the hardware implementations (digital and / or analog) of' fuzzy systems ...
IEEE Transactions on Neural Networks, 1997
The use of a current-mode pulse width modulation (CM-PWM) technique to implement analog artificia... more The use of a current-mode pulse width modulation (CM-PWM) technique to implement analog artificial neural networks (ANNs) is presented. This technique can be used to efficiently implement the weighted summation operation (WSO) that are required in the realization of a general ANN. The sigmoidal transformation is inherently performed by the nonlinear transconductance amplifier, which is a key component in the
Midwest Symposium on Circuits and Systems, 1993
In this paper we examine all current-mode building blocks for implementation of artificial neural... more In this paper we examine all current-mode building blocks for implementation of artificial neural networks. The building blocks proposed include a current dependent pulse generator, a pulse frequency modulator used to multiply incoming pulses with variable weights, and a current in/current out sigmoid function circuit. The circuits can be easily implemented in a standard CMOS VLSI process. Simulations are presented
IEEE International Symposium on Circuits and Systems, 1994
This paper presents general first and second order switched-current building blocks. The circuits... more This paper presents general first and second order switched-current building blocks. The circuits can be easily implemented in standard CMOS technology without the need of a capacitance layer. The circuits can be used to realize almost any transfer function with high accuracy. A sixth-order cascade Chebyshev band-pass filter was realized using the proposed building blocks and simulated using HSPICE. The
The double sampling technique can be used to achieve twice the sampling frequency in a sampled-da... more The double sampling technique can be used to achieve twice the sampling frequency in a sampled-data system without extra requirements for op-amp's settling time, dc gain, etc. In this paper, theoretical analysis of path gain mismatch on the performance of double sampling delta-sigma modulators (ACM's) is given. Based on the result, a novel double sampling technique for ACM's that is insensitive to the path gain mismatch is presented. This technique uses a bilinear double sampling integrator in the first stage, achieving a first order shaping of the path gain mismatch error. Simulation results have been provided to verify the proposed technique.
The effects of parasitic capacitances on distributed high-pass MOSFET filters are investigated. T... more The effects of parasitic capacitances on distributed high-pass MOSFET filters are investigated. Three schemes of MOSFET configurations functioning as distributed high-pass filters are analyzed to demonstrate the parasitic effects. Ignoring the effects of the parasitic capacitances and making use of the element model of a MOSFET proposed in [6], the transfer functions of these filters are of a biquadratic form. When parasitic capacitances are not negligible, the transfer functions become of third-order. Of the three filters, it is found that only the one introduced in [l] maintains desirable high-pass characteristics when the junction capacitance of the MOSFET is large. The analysis are verified by the very high frequency numerical model of a MOSFET given in [7].
IEEE Journal of Solid-state Circuits, 1994
Abstmct-A wide-band, fast settling CMOS complementary folded ascode (CFC) transconductance amplif... more Abstmct-A wide-band, fast settling CMOS complementary folded ascode (CFC) transconductance amplifier for use in analog VLSI high frequency signal processing applications is introduced. The superior performance of the CFC architecture over that of the folder ascode (FC) or mirrored cascode (MC) approaches for VLSI ampliers is demonstrated. The symmetrically configured complementary input stage provides a wide common-mode input voltage range. The amplifier performs as an operational transconductance amplifier (OTA) and displays a first-order dominant pole when loaded by a shunt capacitor. The transconductance amplifier is small in area (0.016 mm'), and well suited for high frequency analog signal processing applications. Simulation and experimental results demonstrate a dc gain of approximately 50 dB, witth a 0.1% settling response of under 10 ns for loads varied from 0 to 2 pF.
Circuits and Systems II: Analog and Digital …, Jan 1, 1998
A new design approach for current-mode (CM) filters is presented. The proposed method is based on... more A new design approach for current-mode (CM) filters is presented. The proposed method is based on simulating RLC ladder networks using coupled-biquad structures. The loopand branch-currents are used as variables to generate transfer functions. These functions are realized by CM circuits implementing multiple output CMOS OTA's. The resulting CM structures use only grounded capacitors making them suitable for VLSI. To demonstrate the proposed approach, a low-pass and a band-pass ladder filter were designed and simulated using HSPICE.
… and Systems I: Fundamental Theory and …, Jan 1, 1999
Page 1. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMSI: FUNDAMENTAL THEORY AND APPLICATIONS, VOL. 46... more Page 1. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMSI: FUNDAMENTAL THEORY AND APPLICATIONS, VOL. 46, NO. 3, MARCH 1999 389 Transactions Briefs CMOS Micropower Universal Log-Domain Biquad Ezz I. El-Masry and Jie Wu ...
Solid-State Circuits, IEEE Journal …, Jan 1, 1997
In this paper, we present the design of a CMOS current operational amplifier (COA). A design tech... more In this paper, we present the design of a CMOS current operational amplifier (COA). A design technique based on current steering is proposed to enhance the frequency capability of the amplifier and achieve higher bandwidth of operation. A complete COA was designed and fabricated using a 1.2-m CMOS technology, the COA occupies an area of 0.13 mm 2 . Results from HSPICE simulations and measurements indicate an open-loop gain of 70 dB, a gain-bandwidth product exceeding 200 MHz, and a settling time of 5.1 ns. The amplifier operated under 63 V dc voltage supplies, and the power dissipation is approximately 4.5 mW.
Circuits and Systems II: Analog and …, Jan 1, 1996
Page 1. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS-11: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. ... more Page 1. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS-11: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 43, NO. 7, JULY 1996 LG A. Callewaert and WMC Sansen, Class AB CMOS amplifiers with high efficiency, LEEEJ. Solid-State Circuits, vol. 25, pp. ...
Neural Networks, IEEE …, Jan 1, 1997
The use of a current-mode pulse width modulation (CM-PWM) technique to implement analog artificia... more The use of a current-mode pulse width modulation (CM-PWM) technique to implement analog artificial neural networks (ANNs) is presented. This technique can be used to efficiently implement the weighted summation operation (WSO) that are required in the realization of a general ANN. The sigmoidal transformation is inherently performed by the nonlinear transconductance amplifier, which is a key component in the current integrator used in the realization of WSO. The CM-PWM implementation results in a minimum silicon area, and therefore is suitable for very large scale neural systems. Other pronounced features of the CM-PWM implementation are its easy programmability, electronically adjustable gains of neurons, and modular structures. In this paper, all the current-mode CMOS circuits (building blocks) required for the realization of CM-PWM ANNs are presented and simulated. Four modules for modular design of ANNs are introduced. Also, it is shown that the CM-PWM technique is an efficient method for implementing discrete-time cellular neural networks (DT-CNNs). Two application examples are given: a winner-take-all circuit and a connected component detector.
Circuits and Systems II: Express Briefs, …, Jan 1, 2004
... This paper was recommended by Associate Editor U.-K. Moon. The authors are with the Departmen... more ... This paper was recommended by Associate Editor U.-K. Moon. The authors are with the Department of Electrical and Computer Engineering, Dalhousie University, Halifax, NS B3J 2X4, Canada (e-mail: xzhang2@dal.ca; ezz.el-masry@dal.ca). ...
Circuits and Systems II: Analog and …, Jan 1, 1996
A b s~a t t -A novel continuous-time current-mode differentiator with a frequency range extending... more A b s~a t t -A novel continuous-time current-mode differentiator with a frequency range extending from dc to 100 h4Hi is presented. This circuit is constructed using a capacitively coupled current mirror. General first-and second-order circuits, using the differentiator, have also been introduced. To demonstrate how the proposed differentiator can be used to construct higher order filters a sixth-order band-pass filter with a center frequency at 2.5 MHz and a 1 dB pass-band ripple has been realized and simulated. All simulations were performed using HSPICE for a 1.2 pm CMOS process. The total power dissipation for the sixth-order filter is 23 mW from a single 3 V supply.
Microwave Theory and …, Jan 1, 2006
Circuits and Systems I: Regular Papers, …, Jan 1, 2007
... intel. com). EI El-Masry is with the Electrical and Computer Engineering Department, Dalhousi... more ... intel. com). EI El-Masry is with the Electrical and Computer Engineering Department, Dalhousie University, Halifax, NS B3J 1Z1, Canada (e-mail: ezz.el-masry@dal. ca). Digital Object Identifier 10.1109/TCSI.2007.897765 using ...
Analog Integrated Circuits and Signal Processing, 1991
Observed spatiotemporal firings of biological neurons have lead many researchers to believe that ... more Observed spatiotemporal firings of biological neurons have lead many researchers to believe that the rate of firings of these biological neurons is what conveys neuronal information in the brain. In this paper we seek to highlight parallels between biological neurons and observed effects in real neurons, with artificial neurons implemented as switched-capacitor structures. One such effect is the heavy use
Novel voltage mode filters based on a new architecture for a current feedback amplifier are propo... more Novel voltage mode filters based on a new architecture for a current feedback amplifier are proposed in this paper. The new biquads are attractive because they exhibit low Q- and ω0-variability due the constant bandwidth of the new amplifier used. Theoretical results as well as experimental results obtained using an AD844 and a 741 operational amplifier are presented.
Electronics Letters, 1990
Proceedings of 1994 37th Midwest Symposium on Circuits and Systems, 1994
Page 1. Current-Mode Implementation of Discrete-Time Cellular Neural Networks Using the Pulse Wid... more Page 1. Current-Mode Implementation of Discrete-Time Cellular Neural Networks Using the Pulse Width Modulation Technique Hong-Kui Yang, Mohamed A. Yakout and Ezz I. El-Masry Dept. of Electrical Engineering Technical ...
Proceedings of the Fifteenth National Radio Science Conference. NRSC '98 (Cat. No.98EX109), 1998
... It always needs an A/D (DIA) interface for input (output) to deal with real-time problems, Th... more ... It always needs an A/D (DIA) interface for input (output) to deal with real-time problems, This interface slows down the whole system and makes its accuracy dependent on this A/D @/A). On the other hand, the hardware implementations (digital and / or analog) of' fuzzy systems ...
IEEE Transactions on Neural Networks, 1997
The use of a current-mode pulse width modulation (CM-PWM) technique to implement analog artificia... more The use of a current-mode pulse width modulation (CM-PWM) technique to implement analog artificial neural networks (ANNs) is presented. This technique can be used to efficiently implement the weighted summation operation (WSO) that are required in the realization of a general ANN. The sigmoidal transformation is inherently performed by the nonlinear transconductance amplifier, which is a key component in the
Midwest Symposium on Circuits and Systems, 1993
In this paper we examine all current-mode building blocks for implementation of artificial neural... more In this paper we examine all current-mode building blocks for implementation of artificial neural networks. The building blocks proposed include a current dependent pulse generator, a pulse frequency modulator used to multiply incoming pulses with variable weights, and a current in/current out sigmoid function circuit. The circuits can be easily implemented in a standard CMOS VLSI process. Simulations are presented
IEEE International Symposium on Circuits and Systems, 1994
This paper presents general first and second order switched-current building blocks. The circuits... more This paper presents general first and second order switched-current building blocks. The circuits can be easily implemented in standard CMOS technology without the need of a capacitance layer. The circuits can be used to realize almost any transfer function with high accuracy. A sixth-order cascade Chebyshev band-pass filter was realized using the proposed building blocks and simulated using HSPICE. The
The double sampling technique can be used to achieve twice the sampling frequency in a sampled-da... more The double sampling technique can be used to achieve twice the sampling frequency in a sampled-data system without extra requirements for op-amp's settling time, dc gain, etc. In this paper, theoretical analysis of path gain mismatch on the performance of double sampling delta-sigma modulators (ACM's) is given. Based on the result, a novel double sampling technique for ACM's that is insensitive to the path gain mismatch is presented. This technique uses a bilinear double sampling integrator in the first stage, achieving a first order shaping of the path gain mismatch error. Simulation results have been provided to verify the proposed technique.
The effects of parasitic capacitances on distributed high-pass MOSFET filters are investigated. T... more The effects of parasitic capacitances on distributed high-pass MOSFET filters are investigated. Three schemes of MOSFET configurations functioning as distributed high-pass filters are analyzed to demonstrate the parasitic effects. Ignoring the effects of the parasitic capacitances and making use of the element model of a MOSFET proposed in [6], the transfer functions of these filters are of a biquadratic form. When parasitic capacitances are not negligible, the transfer functions become of third-order. Of the three filters, it is found that only the one introduced in [l] maintains desirable high-pass characteristics when the junction capacitance of the MOSFET is large. The analysis are verified by the very high frequency numerical model of a MOSFET given in [7].
IEEE Journal of Solid-state Circuits, 1994
Abstmct-A wide-band, fast settling CMOS complementary folded ascode (CFC) transconductance amplif... more Abstmct-A wide-band, fast settling CMOS complementary folded ascode (CFC) transconductance amplifier for use in analog VLSI high frequency signal processing applications is introduced. The superior performance of the CFC architecture over that of the folder ascode (FC) or mirrored cascode (MC) approaches for VLSI ampliers is demonstrated. The symmetrically configured complementary input stage provides a wide common-mode input voltage range. The amplifier performs as an operational transconductance amplifier (OTA) and displays a first-order dominant pole when loaded by a shunt capacitor. The transconductance amplifier is small in area (0.016 mm'), and well suited for high frequency analog signal processing applications. Simulation and experimental results demonstrate a dc gain of approximately 50 dB, witth a 0.1% settling response of under 10 ns for loads varied from 0 to 2 pF.
Circuits and Systems II: Analog and Digital …, Jan 1, 1998
A new design approach for current-mode (CM) filters is presented. The proposed method is based on... more A new design approach for current-mode (CM) filters is presented. The proposed method is based on simulating RLC ladder networks using coupled-biquad structures. The loopand branch-currents are used as variables to generate transfer functions. These functions are realized by CM circuits implementing multiple output CMOS OTA's. The resulting CM structures use only grounded capacitors making them suitable for VLSI. To demonstrate the proposed approach, a low-pass and a band-pass ladder filter were designed and simulated using HSPICE.
… and Systems I: Fundamental Theory and …, Jan 1, 1999
Page 1. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMSI: FUNDAMENTAL THEORY AND APPLICATIONS, VOL. 46... more Page 1. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMSI: FUNDAMENTAL THEORY AND APPLICATIONS, VOL. 46, NO. 3, MARCH 1999 389 Transactions Briefs CMOS Micropower Universal Log-Domain Biquad Ezz I. El-Masry and Jie Wu ...
Solid-State Circuits, IEEE Journal …, Jan 1, 1997
In this paper, we present the design of a CMOS current operational amplifier (COA). A design tech... more In this paper, we present the design of a CMOS current operational amplifier (COA). A design technique based on current steering is proposed to enhance the frequency capability of the amplifier and achieve higher bandwidth of operation. A complete COA was designed and fabricated using a 1.2-m CMOS technology, the COA occupies an area of 0.13 mm 2 . Results from HSPICE simulations and measurements indicate an open-loop gain of 70 dB, a gain-bandwidth product exceeding 200 MHz, and a settling time of 5.1 ns. The amplifier operated under 63 V dc voltage supplies, and the power dissipation is approximately 4.5 mW.
Circuits and Systems II: Analog and …, Jan 1, 1996
Page 1. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS-11: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. ... more Page 1. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS-11: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 43, NO. 7, JULY 1996 LG A. Callewaert and WMC Sansen, Class AB CMOS amplifiers with high efficiency, LEEEJ. Solid-State Circuits, vol. 25, pp. ...
Neural Networks, IEEE …, Jan 1, 1997
The use of a current-mode pulse width modulation (CM-PWM) technique to implement analog artificia... more The use of a current-mode pulse width modulation (CM-PWM) technique to implement analog artificial neural networks (ANNs) is presented. This technique can be used to efficiently implement the weighted summation operation (WSO) that are required in the realization of a general ANN. The sigmoidal transformation is inherently performed by the nonlinear transconductance amplifier, which is a key component in the current integrator used in the realization of WSO. The CM-PWM implementation results in a minimum silicon area, and therefore is suitable for very large scale neural systems. Other pronounced features of the CM-PWM implementation are its easy programmability, electronically adjustable gains of neurons, and modular structures. In this paper, all the current-mode CMOS circuits (building blocks) required for the realization of CM-PWM ANNs are presented and simulated. Four modules for modular design of ANNs are introduced. Also, it is shown that the CM-PWM technique is an efficient method for implementing discrete-time cellular neural networks (DT-CNNs). Two application examples are given: a winner-take-all circuit and a connected component detector.
Circuits and Systems II: Express Briefs, …, Jan 1, 2004
... This paper was recommended by Associate Editor U.-K. Moon. The authors are with the Departmen... more ... This paper was recommended by Associate Editor U.-K. Moon. The authors are with the Department of Electrical and Computer Engineering, Dalhousie University, Halifax, NS B3J 2X4, Canada (e-mail: xzhang2@dal.ca; ezz.el-masry@dal.ca). ...
Circuits and Systems II: Analog and …, Jan 1, 1996
A b s~a t t -A novel continuous-time current-mode differentiator with a frequency range extending... more A b s~a t t -A novel continuous-time current-mode differentiator with a frequency range extending from dc to 100 h4Hi is presented. This circuit is constructed using a capacitively coupled current mirror. General first-and second-order circuits, using the differentiator, have also been introduced. To demonstrate how the proposed differentiator can be used to construct higher order filters a sixth-order band-pass filter with a center frequency at 2.5 MHz and a 1 dB pass-band ripple has been realized and simulated. All simulations were performed using HSPICE for a 1.2 pm CMOS process. The total power dissipation for the sixth-order filter is 23 mW from a single 3 V supply.
Microwave Theory and …, Jan 1, 2006
Circuits and Systems I: Regular Papers, …, Jan 1, 2007
... intel. com). EI El-Masry is with the Electrical and Computer Engineering Department, Dalhousi... more ... intel. com). EI El-Masry is with the Electrical and Computer Engineering Department, Dalhousie University, Halifax, NS B3J 1Z1, Canada (e-mail: ezz.el-masry@dal. ca). Digital Object Identifier 10.1109/TCSI.2007.897765 using ...