Mark s390x condition code register as clobbered in inline assembly by taiki-e · Pull Request #111331 · rust-lang/rust (original) (raw)
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rustbot added S-waiting-on-review
Status: Awaiting review from the assignee but also interested parties.
Relevant to the compiler team, which will review and decide on the PR/issue.
labels
Not directly related to this PR, but for clobber_abi
support we'll probably need a way to mark the access registers as clobbered since they are volatile according to the calling convention.
📌 Commit e61bb88 has been approved by Amanieu
It is now in the queue for this repository.
bors added S-waiting-on-bors
Status: Waiting on bors to run and complete tests. Bors will change the label on completion.
and removed S-waiting-on-review
Status: Awaiting review from the assignee but also interested parties.
labels
This looks correct to me. Thanks for taking care of this!
bors added a commit to rust-lang-ci/rust that referenced this pull request
Rollup of 7 pull requests
Successful merges:
- rust-lang#105354 (Add deployment-target --print flag for Apple targets)
- rust-lang#110377 (Update max_atomic_width of armv7r and armv7_sony_vita targets to 64.)
- rust-lang#110638 (STD support for PSVita)
- rust-lang#111211 (Don't compute trait super bounds unless they're positive)
- rust-lang#111315 (Remove
identity_future
from stdlib) - rust-lang#111331 (Mark s390x condition code register as clobbered in inline assembly)
- rust-lang#111332 (Improve inline asm for LoongArch)
Failed merges:
r? @ghost
@rustbot
modify labels: rollup
GuillaumeGomez added a commit to GuillaumeGomez/rust that referenced this pull request
Support clobber_abi and vector/access registers (clobber-only) in s390x inline assembly
This supports clobber_abi
which is one of the requirements of stabilization mentioned in rust-lang#93335.
This also supports vector registers (as vreg
) and access registers (as areg
) as clobber-only, which need to support clobbering of them to implement clobber_abi.
Refs:
- "1.2.1.1. Register Preservation Rules" section in ELF Application Binary Interface s390x Supplement, Version 1.6.1 (lzsabi_s390x.pdf in https://github.com/IBM/s390x-abi/releases/tag/v1.6.1)
- Register definition in LLVM:
I have three questions:
ELF Application Binary Interface s390x Supplement says thatUPDATE: resolved rust-lang#130630 (comment)cc
(condition code, bits 18-19 of PSW) is "Volatile". However, we do not have a register class forcc
and instead markcc
as clobbered unlesspreserves_flags
is specified (rust-lang#111331). Therefore, in the current implementation, if bothpreserves_flags
andclobber_abi
are specified,cc
is not marked as clobbered. Is this okay? Or even ifpreserves_flags
is used, shouldcc
be marked as clobbered ifclobber_abi
is used?ELF Application Binary Interface s390x Supplement says thatUPDATE: resolved rust-lang#130630 (comment)pm
(program mask, bits 20-23 of PSW) is "Cleared". There does not appear to be any registers associated with this in either LLVM or GCC, so at this point I don't see any way other than to just ignore it. Is this okay as-is?- Is "areg" a good name for register class name for access registers? It may be a bit confusing between that and
reg_addr
, which uses the “a” constraint (rust-lang#119431)...
Note:
- GCC seems to recognize only
a0
anda1
, and usinga[2-15]
causes errors. Given that cg_gcc has a similar problem with other architecture (rust-lang/rustc_codegen_gcc#485), I don't feel this is a blocker for this PR, but it is worth mentioning here. vreg
should be able to accept#[repr(simd)]
types as input if thevector
target feature added in rust-lang#127506 is enabled, but core_arch has no s390x vector type and both#[repr(simd)]
andcore::simd
are unstable, so I have not implemented it in this PR. EDIT: And supporting it is probably more complex than doing the equivalent on other architectures... rust-lang#88245 (comment)
cc @uweigand
r? @Amanieu
@rustbot
label +O-SystemZ
rust-timer added a commit to rust-lang-ci/rust that referenced this pull request
Rollup merge of rust-lang#130630 - taiki-e:s390x-clobber-abi, r=Amanieu
Support clobber_abi and vector/access registers (clobber-only) in s390x inline assembly
This supports clobber_abi
which is one of the requirements of stabilization mentioned in rust-lang#93335.
This also supports vector registers (as vreg
) and access registers (as areg
) as clobber-only, which need to support clobbering of them to implement clobber_abi.
Refs:
- "1.2.1.1. Register Preservation Rules" section in ELF Application Binary Interface s390x Supplement, Version 1.6.1 (lzsabi_s390x.pdf in https://github.com/IBM/s390x-abi/releases/tag/v1.6.1)
- Register definition in LLVM:
I have three questions:
ELF Application Binary Interface s390x Supplement says thatUPDATE: resolved rust-lang#130630 (comment)cc
(condition code, bits 18-19 of PSW) is "Volatile". However, we do not have a register class forcc
and instead markcc
as clobbered unlesspreserves_flags
is specified (rust-lang#111331). Therefore, in the current implementation, if bothpreserves_flags
andclobber_abi
are specified,cc
is not marked as clobbered. Is this okay? Or even ifpreserves_flags
is used, shouldcc
be marked as clobbered ifclobber_abi
is used?ELF Application Binary Interface s390x Supplement says thatUPDATE: resolved rust-lang#130630 (comment)pm
(program mask, bits 20-23 of PSW) is "Cleared". There does not appear to be any registers associated with this in either LLVM or GCC, so at this point I don't see any way other than to just ignore it. Is this okay as-is?- Is "areg" a good name for register class name for access registers? It may be a bit confusing between that and
reg_addr
, which uses the “a” constraint (rust-lang#119431)...
Note:
- GCC seems to recognize only
a0
anda1
, and usinga[2-15]
causes errors. Given that cg_gcc has a similar problem with other architecture (rust-lang/rustc_codegen_gcc#485), I don't feel this is a blocker for this PR, but it is worth mentioning here. vreg
should be able to accept#[repr(simd)]
types as input if thevector
target feature added in rust-lang#127506 is enabled, but core_arch has no s390x vector type and both#[repr(simd)]
andcore::simd
are unstable, so I have not implemented it in this PR. EDIT: And supporting it is probably more complex than doing the equivalent on other architectures... rust-lang#88245 (comment)
cc @uweigand
r? @Amanieu
@rustbot
label +O-SystemZ
This was referenced
Oct 4, 2024
antoyo pushed a commit to rust-lang/rustc_codegen_gcc that referenced this pull request
Support clobber_abi and vector/access registers (clobber-only) in s390x inline assembly
This supports clobber_abi
which is one of the requirements of stabilization mentioned in #93335.
This also supports vector registers (as vreg
) and access registers (as areg
) as clobber-only, which need to support clobbering of them to implement clobber_abi.
Refs:
- "1.2.1.1. Register Preservation Rules" section in ELF Application Binary Interface s390x Supplement, Version 1.6.1 (lzsabi_s390x.pdf in https://github.com/IBM/s390x-abi/releases/tag/v1.6.1)
- Register definition in LLVM:
I have three questions:
ELF Application Binary Interface s390x Supplement says thatUPDATE: resolved rust-lang/rust#130630 (comment)cc
(condition code, bits 18-19 of PSW) is "Volatile". However, we do not have a register class forcc
and instead markcc
as clobbered unlesspreserves_flags
is specified (rust-lang/rust#111331). Therefore, in the current implementation, if bothpreserves_flags
andclobber_abi
are specified,cc
is not marked as clobbered. Is this okay? Or even ifpreserves_flags
is used, shouldcc
be marked as clobbered ifclobber_abi
is used?ELF Application Binary Interface s390x Supplement says thatUPDATE: resolved rust-lang/rust#130630 (comment)pm
(program mask, bits 20-23 of PSW) is "Cleared". There does not appear to be any registers associated with this in either LLVM or GCC, so at this point I don't see any way other than to just ignore it. Is this okay as-is?- Is "areg" a good name for register class name for access registers? It may be a bit confusing between that and
reg_addr
, which uses the “a” constraint (rust-lang/rust#119431)...
Note:
- GCC seems to recognize only
a0
anda1
, and usinga[2-15]
causes errors. Given that cg_gcc has a similar problem with other architecture (#485), I don't feel this is a blocker for this PR, but it is worth mentioning here. vreg
should be able to accept#[repr(simd)]
types as input if thevector
target feature added in rust-lang/rust#127506 is enabled, but core_arch has no s390x vector type and both#[repr(simd)]
andcore::simd
are unstable, so I have not implemented it in this PR. EDIT: And supporting it is probably more complex than doing the equivalent on other architectures... rust-lang/rust#88245 (comment)
cc @uweigand
r? @Amanieu
@rustbot
label +O-SystemZ
matthiaskrgr added a commit to matthiaskrgr/rust that referenced this pull request
…nieu
Stabilize s390x inline assembly
This stabilizes inline assembly for s390x (SystemZ).
Corresponding reference PR: rust-lang/reference#1643
From the requirements of stabilization mentioned in rust-lang#93335
Each architecture needs to be reviewed before stabilization:
- It must have clobber_abi.
Done in rust-lang#130630.
- It must be possible to clobber every register that is normally clobbered by a function call.
Done in the PR that added support for clobber_abi.
- Generally review that the exposed register classes make sense.
The followings can be used as input/output:
reg
(r[0-10]
,r[12-14]
): General-purpose registerreg_addr
(r[1-10]
,r[12-14]
): General-purpose register exceptr0
which is evaluated as zero in an address contextThis class is needed because
r0
, which may be allocated when using thereg
class, cannot be used as a register in certain contexts. This is identical to thea
constraint in LLVM and GCC. See rust-lang#119431 for details.freg
(f[0-15]
): Floating-point register
The followings are clobber-only:
vreg
(v[0-31]
): Vector registerTechnically
vreg
should be able to accept#[repr(simd)]
types as input/output if the unstablevector
target feature added is enabled, butcore::arch
has no s390x vector type and both#[repr(simd)]
andcore::simd
are unstable. Everything related is unstable, so the fact that this is currently a clobber-only should not be considered a stabilization blocker. (rust-lang#130869 tracks unstable stuff here)areg
(a[2-15]
): Access register
All of the above register classes except reg_addr
are needed for clobber_abi
.
The followings cannot be used as operands for inline asm (see also getReservedRegs and SystemZELFRegisters in LLVM):
r11
: frame pointerr15
: stack pointera0
,a1
: Reserved for system usec[0-15]
(control register) Reserved by the kernel
Although not listed in the above requirements, preserves_flags
is implemented in rust-lang#111331.
cc @uweigand
r? @Amanieu
@rustbot
label +O-SystemZ +A-inline-assembly
workingjubilee added a commit to workingjubilee/rustc that referenced this pull request
…nieu
Stabilize s390x inline assembly
This stabilizes inline assembly for s390x (SystemZ).
Corresponding reference PR: rust-lang/reference#1643
From the requirements of stabilization mentioned in rust-lang#93335
Each architecture needs to be reviewed before stabilization:
- It must have clobber_abi.
Done in rust-lang#130630.
- It must be possible to clobber every register that is normally clobbered by a function call.
Done in the PR that added support for clobber_abi.
- Generally review that the exposed register classes make sense.
The followings can be used as input/output:
reg
(r[0-10]
,r[12-14]
): General-purpose registerreg_addr
(r[1-10]
,r[12-14]
): General-purpose register exceptr0
which is evaluated as zero in an address contextThis class is needed because
r0
, which may be allocated when using thereg
class, cannot be used as a register in certain contexts. This is identical to thea
constraint in LLVM and GCC. See rust-lang#119431 for details.freg
(f[0-15]
): Floating-point register
The followings are clobber-only:
vreg
(v[0-31]
): Vector registerTechnically
vreg
should be able to accept#[repr(simd)]
types as input/output if the unstablevector
target feature added is enabled, butcore::arch
has no s390x vector type and both#[repr(simd)]
andcore::simd
are unstable. Everything related is unstable, so the fact that this is currently a clobber-only should not be considered a stabilization blocker. (rust-lang#130869 tracks unstable stuff here)areg
(a[2-15]
): Access register
All of the above register classes except reg_addr
are needed for clobber_abi
.
The followings cannot be used as operands for inline asm (see also getReservedRegs and SystemZELFRegisters in LLVM):
r11
: frame pointerr15
: stack pointera0
,a1
: Reserved for system usec[0-15]
(control register) Reserved by the kernel
Although not listed in the above requirements, preserves_flags
is implemented in rust-lang#111331.
cc @uweigand
r? @Amanieu
@rustbot
label +O-SystemZ +A-inline-assembly
rust-timer added a commit to rust-lang-ci/rust that referenced this pull request
Rollup merge of rust-lang#131258 - taiki-e:s390x-stabilize-asm, r=Amanieu
Stabilize s390x inline assembly
This stabilizes inline assembly for s390x (SystemZ).
Corresponding reference PR: rust-lang/reference#1643
From the requirements of stabilization mentioned in rust-lang#93335
Each architecture needs to be reviewed before stabilization:
- It must have clobber_abi.
Done in rust-lang#130630.
- It must be possible to clobber every register that is normally clobbered by a function call.
Done in the PR that added support for clobber_abi.
- Generally review that the exposed register classes make sense.
The followings can be used as input/output:
reg
(r[0-10]
,r[12-14]
): General-purpose registerreg_addr
(r[1-10]
,r[12-14]
): General-purpose register exceptr0
which is evaluated as zero in an address contextThis class is needed because
r0
, which may be allocated when using thereg
class, cannot be used as a register in certain contexts. This is identical to thea
constraint in LLVM and GCC. See rust-lang#119431 for details.freg
(f[0-15]
): Floating-point register
The followings are clobber-only:
vreg
(v[0-31]
): Vector registerTechnically
vreg
should be able to accept#[repr(simd)]
types as input/output if the unstablevector
target feature added is enabled, butcore::arch
has no s390x vector type and both#[repr(simd)]
andcore::simd
are unstable. Everything related is unstable, so the fact that this is currently a clobber-only should not be considered a stabilization blocker. (rust-lang#130869 tracks unstable stuff here)areg
(a[2-15]
): Access register
All of the above register classes except reg_addr
are needed for clobber_abi
.
The followings cannot be used as operands for inline asm (see also getReservedRegs and SystemZELFRegisters in LLVM):
r11
: frame pointerr15
: stack pointera0
,a1
: Reserved for system usec[0-15]
(control register) Reserved by the kernel
Although not listed in the above requirements, preserves_flags
is implemented in rust-lang#111331.
cc @uweigand
r? @Amanieu
@rustbot
label +O-SystemZ +A-inline-assembly
RalfJung pushed a commit to RalfJung/miri that referenced this pull request
Stabilize s390x inline assembly
This stabilizes inline assembly for s390x (SystemZ).
Corresponding reference PR: rust-lang/reference#1643
From the requirements of stabilization mentioned in rust-lang/rust#93335
Each architecture needs to be reviewed before stabilization:
- It must have clobber_abi.
Done in rust-lang/rust#130630.
- It must be possible to clobber every register that is normally clobbered by a function call.
Done in the PR that added support for clobber_abi.
- Generally review that the exposed register classes make sense.
The followings can be used as input/output:
reg
(r[0-10]
,r[12-14]
): General-purpose registerreg_addr
(r[1-10]
,r[12-14]
): General-purpose register exceptr0
which is evaluated as zero in an address contextThis class is needed because
r0
, which may be allocated when using thereg
class, cannot be used as a register in certain contexts. This is identical to thea
constraint in LLVM and GCC. See rust-lang/rust#119431 for details.freg
(f[0-15]
): Floating-point register
The followings are clobber-only:
vreg
(v[0-31]
): Vector registerTechnically
vreg
should be able to accept#[repr(simd)]
types as input/output if the unstablevector
target feature added is enabled, butcore::arch
has no s390x vector type and both#[repr(simd)]
andcore::simd
are unstable. Everything related is unstable, so the fact that this is currently a clobber-only should not be considered a stabilization blocker. (rust-lang/rust#130869 tracks unstable stuff here)areg
(a[2-15]
): Access register
All of the above register classes except reg_addr
are needed for clobber_abi
.
The followings cannot be used as operands for inline asm (see also getReservedRegs and SystemZELFRegisters in LLVM):
r11
: frame pointerr15
: stack pointera0
,a1
: Reserved for system usec[0-15]
(control register) Reserved by the kernel
Although not listed in the above requirements, preserves_flags
is implemented in rust-lang/rust#111331.
cc @uweigand
r? @Amanieu
@rustbot
label +O-SystemZ +A-inline-assembly
mati865 pushed a commit to mati865/rust that referenced this pull request
…nieu
Stabilize s390x inline assembly
This stabilizes inline assembly for s390x (SystemZ).
Corresponding reference PR: rust-lang/reference#1643
From the requirements of stabilization mentioned in rust-lang#93335
Each architecture needs to be reviewed before stabilization:
- It must have clobber_abi.
Done in rust-lang#130630.
- It must be possible to clobber every register that is normally clobbered by a function call.
Done in the PR that added support for clobber_abi.
- Generally review that the exposed register classes make sense.
The followings can be used as input/output:
reg
(r[0-10]
,r[12-14]
): General-purpose registerreg_addr
(r[1-10]
,r[12-14]
): General-purpose register exceptr0
which is evaluated as zero in an address contextThis class is needed because
r0
, which may be allocated when using thereg
class, cannot be used as a register in certain contexts. This is identical to thea
constraint in LLVM and GCC. See rust-lang#119431 for details.freg
(f[0-15]
): Floating-point register
The followings are clobber-only:
vreg
(v[0-31]
): Vector registerTechnically
vreg
should be able to accept#[repr(simd)]
types as input/output if the unstablevector
target feature added is enabled, butcore::arch
has no s390x vector type and both#[repr(simd)]
andcore::simd
are unstable. Everything related is unstable, so the fact that this is currently a clobber-only should not be considered a stabilization blocker. (rust-lang#130869 tracks unstable stuff here)areg
(a[2-15]
): Access register
All of the above register classes except reg_addr
are needed for clobber_abi
.
The followings cannot be used as operands for inline asm (see also getReservedRegs and SystemZELFRegisters in LLVM):
r11
: frame pointerr15
: stack pointera0
,a1
: Reserved for system usec[0-15]
(control register) Reserved by the kernel
Although not listed in the above requirements, preserves_flags
is implemented in rust-lang#111331.
cc @uweigand
r? @Amanieu
@rustbot
label +O-SystemZ +A-inline-assembly
Labels
Area: Inline assembly (`asm!(…)`)
Target: SystemZ processors (s390x)
Status: Waiting on bors to run and complete tests. Bors will change the label on completion.
Relevant to the compiler team, which will review and decide on the PR/issue.