Al Mokhtar ha - Academia.edu (original) (raw)

Papers by Al Mokhtar ha

The 16th Annual Meeting of the IEEE Lasers and Electro-Optics Society, 2003. LEOS 2003.

Needs and requirements for optical interconnects in next generation servers are outlined. Related... more Needs and requirements for optical interconnects in next generation servers are outlined. Related results on equalizing and characterizing high speed multimode links, building and testing parallel 12 × 10 Gbit/sec transceivers, and highly parallel silicon photodetectors are presented.

IEEE MTT-S International Microwave Symposium digest. IEEE MTT-S International Microwave Symposium

Abstruct-A 250 W dual-band power amplifier belonging to the Class E/F switching amplifier family ... more Abstruct-A 250 W dual-band power amplifier belonging to the Class E/F switching amplifier family is presented. The amplifier operates in the 7 MHz and 10 MHz HAM bands, achieving 16 dB and 1 5 d B gain with power added efficiencies (PAE) of 92 70 and 87 % in those bands, respectively. It utilizes dual-resonant passive input and output networks to achieve high-efficiency Class E/F,,,,d operation at both frequencies of operation, allowing the same passive networks to be used for both frequency bands without the use of band-select switches.

International Journal of Microwave and Wireless Technologies, 2009

An effective linearization technique capable of equalizing IM3 products resulting from an arbitra... more An effective linearization technique capable of equalizing IM3 products resulting from an arbitrary out-of-band blocking scenario in a wideband direct conversion receiver is presented. IM3 products are regenerated in the RF analog domain of a low-power mixed-signal feedforward path and are used to cancel analogous signal terms in the original receiver at digital baseband via adaptive equalization. The composite SAW-less receiver achieves an improvement in effective IIP3 from −7.1 to +5.3 dBm under worst-case UMTS Region 1 blocking when the feedforward path is active.

2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353)

A low-power fully-integrated type-2 4 th-order 1.7GHz CMOS frequency synthesizer for DCS-1800 app... more A low-power fully-integrated type-2 4 th-order 1.7GHz CMOS frequency synthesizer for DCS-1800 application is designed and simulated in a 0.25µm process technology. The frequency switching is achieved using a novel architecture exploiting a direct digital synthesis (DDS) device as the frequency reference. The new topology significantly lowers the undesired sideband power due to divider ratio switching by directly shifting the frequency of the DDS reference. The frequency synthesizer (excluding the DDS device) dissipates only 9mW of power from a 2V power supply. It employs a fast-switching novel charge pump circuit and a low-noise fully-integrated differential LC voltage controlled oscillator using on-chip spiral inductors and accumulation-mode capacitors to meet the requirements of a DCS-1800 system. A detailed analysis of the phase noise in the 4 thorder loop is presented.

2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, 2009

Proceedings of the IEEE 1998 Custom Integrated Circuits Conference (Cat. No.98CH36143)

An analysis of the phase noise in differential and singleended ring oscillators using a time-vari... more An analysis of the phase noise in differential and singleended ring oscillators using a time-variant model is presented. An expression for the RMS value of the impulse sensitivity function (ISF) is derived. A closed-form equation for phase noise of ring oscillators is calculated and a lower limit on the phase noise of ring oscillators is shown. Phase noise measurements of oscillators running up to 5.5GHz are shown to be in good agreement with the theory.

2011 IEEE Radio Frequency Integrated Circuits Symposium, 2011

On-chip spurious tone detection and correction in an 8-12 GHz CMOS synthesizer is used to automat... more On-chip spurious tone detection and correction in an 8-12 GHz CMOS synthesizer is used to automatically reduce spurious output tones at different offset frequencies by up to 20dB. Using synchronous detection, sensitivity is limited by detection time only. The presented methods are generally applicable to frequency synthesizers and phased-locked loops in various applications.

2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)

2008 European Microwave Integrated Circuit Conference, 2008

2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers, 2006

2011 IEEE MTT-S International Microwave Symposium, 2011

Distributed Active Radiator (DAR) arrays are demonstrated as novel ways of harmonic generation, r... more Distributed Active Radiator (DAR) arrays are demonstrated as novel ways of harmonic generation, radiation, and filtration to generate power at frequencies above the cutoff frequency of a technology. As proofs-of-concept, 2x1 and 2x2 arrays of DAR with beam-forming are implemented on PCB, which are designed to oscillate at the fundamental frequency of 1.25GHz, while radiating (circularly-polarized) at the doubling frequency of 2.5GHz. The measured EIRP of 2x1 and 2x2 arrays are 7.46dBm and 12.96dBm, respectively, at 2.5GHz with a DCto-radiated 2 nd harmonic conversion of 0.8%. Almost 40° of beam-steering at 2.5GHz was measured in 2D space for the 2x2 array and more than 15dB suppression of the first and third harmonic compared to the desired second harmonic was measured in the radiated far-field.

Proceedings of the 2010 American Control Conference, 2010

This paper studies the constellation diagram design for a class of communication systems known as... more This paper studies the constellation diagram design for a class of communication systems known as near-field direct antenna modulation (NFDAM) systems. The modulation is carried out in a NFDAM system by means of a control unit that switches among a number of pre-designed passive controllers such that each controller generates a desired voltage signal at the far field. To find an optimal number of signals that can be transmitted and demodulated reliably in a NFDAM system, the coverage area of the signal at the far field should be identified. It is shown that this coverage area is a planar convex region in general and simply a circle in the case when no constraints are imposed on the input impedance of the antenna and the voltage received at the far field. A convex optimization method is then proposed to find a polygon that is able to approximate the coverage area of the signal constellation diagram satisfactorily. A similar analysis is provided for the identification of the coverage area of the antenna input impedance, which is beneficial for designing an energy-efficient NFDAM system.

2010 IEEE Antennas and Propagation Society International Symposium, 2010

IEEE Transactions on Microwave Theory and Techniques, 2003

A new family of switching amplifiers, each member having some of the features of both class E and... more A new family of switching amplifiers, each member having some of the features of both class E and inverse F, is introduced. These class-E/F amplifiers have class-E features such as incorporation of the transistor parasitic capacitance into the circuit, exact truly switching time-domain solutions, and allowance for zero-voltage-switching operation. Additionally, some number of harmonics may be tuned in the fashion of inverse class F in order to achieve more desirable voltage and current waveforms for improved performance. Operational waveforms for several implementations are presented, and efficiency estimates are compared to class-E. Index Terms-Class E, class E/F, class F, harmonic tuning, high-efficiency amplifier, switching power amplifier, zero voltage switching (ZVS). I. INTRODUCTION F OR power-amplifier and power-inverter applications, harmonic-tuned switching amplifiers such as class E [1], [2] and class F [3] offer high efficiencies at high power densities. By operating the active device as a switch rather than a controlled current source, the voltage and current waveforms can, in principle, be made to have no overlap, reducing the theoretically achievable device dissipation to zero. At the same time, unlike in class-C operation, the output power of switching modes can be comparable to or greater than that of class A or class B for the same device peak voltage and current. For applications wherein AM/AM and AM/PM distortion can be tolerated [4], or compensated for [5], such amplifiers can improve efficiency and reduce heat-sink requirements. High-speed power converters, such as dc-dc converters, similarly benefit from improved RF power-amplifier efficiency [6]. Unfortunately, only two types of amplifier tunings appropriate for high-frequency operation, i.e., class E and class F, have been explored. Class-E amplifiers have found most application as a higher performance alternative to class-D amplifiers due to their compensation for transistor output capacitance and elimination of turn-on switching losses. Additionally, the class-E design may be implemented with a relatively simple circuit. These benefits have allowed class-E designs to push far beyond the frequencies achievable by class-D designs, with recent results reporting 55% at 1.8 GHz using CMOS devices [7] and

IEEE Transactions on Microwave Theory and Techniques, 2002

In this paper, we compare the performance of the newly introduced distributed active transformer ... more In this paper, we compare the performance of the newly introduced distributed active transformer (DAT) structure to that of conventional on-chip impedance-transformations methods. Their fundamental power-efficiency limitations in the design of high-power fully integrated amplifiers in standard silicon process technologies are analyzed. The DAT is demonstrated to be an efficient impedance-transformation and power-combining method, which combines several low-voltage push-pull amplifiers in series by magnetic coupling. To demonstrate the validity of the new concept, a 2.4-GHz 1.9-W 2-V fully integrated power-amplifier achieving a power-added efficiency of 41% with 50-input and output matching has been fabricated using 0.35m CMOS transistors. Index Terms-Circular geometry, CMOS analog integrated circuit, distributed active transformer, double differential, harmoniccontrol, impedance transformation, low voltage, power amplifier, power combining. I. INTRODUCTION A MONG THE several building blocks necessary to construct today's holy grail in wireless communication, the "single-chip radio," power amplifiers have been one of the most significant challenges. Several results have been published in this field, but none have reported a watt-level fully integrated power amplifier using silicon technology. Until now, the highest output powers achieved by fully integrated power amplifiers in standard silicon processes are 85 mW [1] delivered to a differential 50-load with a power-added efficiency (PAE) of 30% and 100 mW with a drain efficiency of 16% [2], both implemented in CMOS technology. Other works using CMOS [3], [4] or Si bipolar [5], [6] processes rely on the use of external passive components such as bond wire inductors,

IEEE Transactions on Microwave Theory and Techniques, 2011

In this paper, a general framework for the adaptive feedforward cancellation of higher order inte... more In this paper, a general framework for the adaptive feedforward cancellation of higher order intermodulation distortion (IMD) products is presented. By generating only second-order and principal-odd-order IMD reference products in the RF/analog domain and reproducing higher order IMD reference products at digital baseband, the proposed reference distortion scheme minimizes the analog hardware burden on the system. Inherent in this procedure is an approximation that the profile of blocking signals causing IMD is dominated by one very large blocker. The limitations imposed by this approximation are quantitatively examined and shown to permit cancellation ratios of nearly the square of the ratio between the dominant and nondominant blocking signal RMS amplitudes. An experimental receiver employing the proposed technique was constructed utilizing a wide-swing low-noise transconductance amplifier in order to accommodate a rail-to-rail (+12.4 dBm) out-of-band blocker and a 16.3-dBm nondominant blocker. The measured receiver out-of-band 1-dB desensitization point is +12.5 dBm and the peak uncorrected two-tone third-order intermodulation intercept point (IIP3) is +33.5 dBm. Utilizing the proposed IMD cancellation scheme in the presence of a modulated dominant blocker improves the total input-referred IMD error power by over 24 dB, resulting in an extrapolated IIP3 metric of +43.5 dBm.

IEEE Transactions on Circuits and Systems I: Regular Papers, 2012

In this paper, the design of a wide-swing low-noise transconductance amplifier (LNTA) is presente... more In this paper, the design of a wide-swing low-noise transconductance amplifier (LNTA) is presented in the context of passive mixer-based direct-conversion RF receivers, noting that the compression performance of such systems is limited by the initial voltage-to-current conversion. The proposed LNTA utilizes a stacked PMOS/NMOS common-gate configuration with its input common-mode voltage maintained by a class-AB operational transconductance amplifier (OTA). Linearization mechanisms and design procedures are explained both quantitatively and intuitively. Simulations of the LNTA at the typical corner, when ideally loaded, show an IIP3 of +32.8 dBm extrapolated at a +12.5 dBm/ 16.5 dBm CW blocking condition and an out-of-band 1-dB desensitization point of +22 dBm. These results are also shown to qualitatively agree with those extracted from an analytical model of the LNTA.

IEEE Transactions on Circuits and Systems I: Regular Papers, 2009

Adaptive feedforward error cancellation applied to correct distortion arising from third-order no... more Adaptive feedforward error cancellation applied to correct distortion arising from third-order nonlinearities in RF receivers requires low-noise low-power reference cubic nonidealities. Multistage cubic-term generators utilizing cascaded nonlinear operations are ideal in this regard, but the frequency response of the interstage circuitry can introduce errors into the cubing operation. In this paper, an overview of the use of cubic-term generators in receivers relative to other applications is presented. An interstage frequency response plan is presented for a receiver cubic-term generator and is shown to function for arbitrary three-signal third-order intermodulation generation. The noise of such circuits is also considered and is shown to depend on the total incoming signal power across a particular frequency band. Finally, the effects of the interstage group delay are quantified in the context of a relevant communication standard requirement.

IEEE Journal of Solid-State Circuits, 2002

A novel noise-shifting differential Colpitts VCO is presented. It uses current switching to lower... more A novel noise-shifting differential Colpitts VCO is presented. It uses current switching to lower phase noise by cyclostationary noise alignment and improve the start-up condition. A design strategy is also devised to enhance the phase noise performance of quadrature coupled oscillators. Two integrated VCOs are presented as design examples.

IEEE Journal of Solid-State Circuits, 2003

Intersymbol interference (ISI) caused by intermodal dispersion in multimode fibers is the major l... more Intersymbol interference (ISI) caused by intermodal dispersion in multimode fibers is the major limiting factor in the achievable data rate or transmission distance in high-speed multimode fiber-optic links for local area networks applications. Compared with optical-domain and other electrical-domain dispersion compensation methods, equalization with transversal filters based on distributed circuit techniques presents a cost-effective and lowpower solution. The design of integrated distributed transversal equalizers is described in detail with focus on delay lines and gain stages. This seven-tap distributed transversal equalizer prototype has been implemented in a commercial 0.18-m SiGe BiCMOS process for 10-Gb/s multimode fiber-optic links. A seven-tap distributed transversal equalizer reduces the ISI of a 10-Gb/s signal after 800 m of 50m multimode fiber from 5 to 1.38 dB, and improves the bit-error rate from about 10 5 to less than 10 12 .