Andrija Stupar - Academia.edu (original) (raw)

Papers by Andrija Stupar

2019 20th Workshop on Control and Modeling for Power Electronics (COMPEL), 2019

Magnetic components contribute significantly to the volume and losses of power electronic systems... more Magnetic components contribute significantly to the volume and losses of power electronic systems. Their optimal design is therefore crucial for the overall optimization of power density and efficiency of power converters. Recently it has been shown that converters can accurately be modeled using posynomial functions, thus allowing for the use of Geometric Programming, a type of convex optimization problem, to be used to quickly produce globally optimum designs of entire converter families. Existing studies have however treated magnetic components in a case-specific way, deriving posynomial models suited for the given converter or range of operating points. This paper demonstrates and validates methods for the derivation and generation of posynomial models of inductors for an entire catalogue of standard components, allowing a set of models to be generated once and then re-used subsequently, or "plugged into" an overall converter optimization, repeatedly, without the need for re-derivation.

IEEE Transactions on Power Electronics, 2019

Multi-objective optimization of power converters is a time-consuming task, especially when multip... more Multi-objective optimization of power converters is a time-consuming task, especially when multiple operating points and multiple converter topologies must be considered. As a result, various steps are often taken to simplify the design problem and restrict the size of the design space prior to going through an optimization procedure. While this saves time, it produces potentially sub-optimal designs, and existing approaches must trade-off between running time and design optimality. This paper presents an optimization-oriented method for modeling power converters and their components as posynomial functions, allowing multi-objective optimization of converters to be formulated as a geometric program, a type of convex optimization problem. This allows the use of fast, powerful solvers that guarantee global optimality of solutions. The method is demonstrated using the example of low-power multi-level flying capacitor step-down converters. Results show that, using geometric programming, sets of globally Pareto-optimal designs of 2-, 3-, and 4-level converters with respect to efficiency and power density, for one design space and one operating point, can be generated in as little as 25 seconds, on an mid-to upper-range laptop computer. Thus optimal designs for three different converter topologies for hundreds of different operating points and/or design spaces can be generated in several hours-less than the time required to globally optimize one converter topology at one operating point for one design space using currently prevalent methods. The paper also demonstrates how geometric programming can be used to quickly perform sensitivity and trade-off analysis of optimal converter designs.

Proc. 19th IEEE Workshop on Control and Modeling for Power Electronics (COMPEL 2018), Jun 25, 2018

Recently, it has been shown that geometric programming , a class of convex optimization problems,... more Recently, it has been shown that geometric programming , a class of convex optimization problems, can be used to optimize converters quickly and accurately. Some however, such at the seven-switch flying capacitor step-down converter (7SFC), designed to operate in three modes as three distinct topologies in order to maximize efficiency for the given operating point, cannot be modeled as geometric programs (GPs) on the converter level. This paper presents a hybrid optimization procedure, generalizable to other topologies, that uses a GP coupled to a fast circuit simulation to quickly optimize and design a 7SFC power stage IC for multiple operating points.

2016 18th European Conference on Power Electronics and Applications (EPE'16 ECCE Europe), Sep 5, 2016

Multi-level flying-capacitor converters are a promising topology for low-power applications. Conv... more Multi-level flying-capacitor converters are a promising topology for low-power applications. Conventional buck, 3-and 4-level converters have been modeled as a geometric program and optimized for loss and volume. Results show that 3-and 4-level converters are both smaller and more efficient over a wide range of design parameters.

Proc. 17th IEEE Workshop on Control and Modeling for Power Electronics (COMPEL 2016), Jun 27, 2016

When optimizing power electronic converters for multiple objectives, such as power density and ef... more When optimizing power electronic converters for multiple objectives, such as power density and efficiency, the optimization of the magnetic components is often the most challenging and time-consuming task. In order to perform optimization quickly and efficiently, it would be advantageous to formulate converter optimization as a geometric program, a proven convex optimization method. In order to optimize for losses and volume via a geometric program however, all loss and volume models of the various components must be in the form of posynomials. While some loss models, such as those of semiconductors, are naturally in posynomial form or easily transformed, this is not the case for inductors. This paper presents a derivation of posynomial loss, volume, temperature, and saturation models for families of inductive components, based both on simulation and on adapting familiar analytical models into approximate posynomial form. The terms of the derived posynomial models are the inductor design variables, such as the number of turns, the air gap, and so forth. This allows inductors to be optimized for multiple design objectives as a geometric program.

IEEE Transactions on Power Electronics (Vol. 27, Issue 4), Apr 2012

In telecom applications, the vision for a total power conversion efficiency from the mains to the... more In telecom applications, the vision for a total power conversion efficiency from the mains to the output of point-of-load (PoL) converters of 95% demands optimization of every conversion step, i.e., the power factor correction (PFC) rectifier front-end should show an outstanding efficiency in the range of 99%. For recently discussed 400-V dc distribution bus voltages, a buck-type PFC rectifier is a logical solution. In this paper, an efficiency-optimized, 98.8% efficient, 5-kW three-phase buck-type PFC rectifier with 400-V output is presented. Methods for calculating losses of all components are described and are used to optimize the converter design for efficiency at full load. Special attention is paid to semiconductor losses, which are shown to be dominant, with the parasitic device capacitance losses being a significant component. The calculation of these parasitic capacitance losses is treated in detail, and the charge-balance approach used is verified. A prototype of the proposed rectifier is constructed which verifies the accuracy of the models used for loss calculation and optimization.

IEEE Transactions on Components, Packaging and Manufacturing Technology (Vol. 2, Issue 1), Jan 2012

A power electronic device's lifetime depends on its maximum operating temperature and the tempera... more A power electronic device's lifetime depends on its maximum operating temperature and the temperature swings it is subjected to. Heat sinks employing phase change materials (PCMs) can be employed to achieve a temperature reduction, but only for a limited duration. This makes such heat sinks appropriate for use in applications with high peak loads but with low duty cycles. The heat sink is modeled using the thermal resistors and capacitors (RCs) network approach, and an optimization procedure for designing a hybrid air-cooled heat sink containing PCM is developed, yielding a maximum possible temperature reduction for a given application. It is shown that air-cooled heat sinks employing pure PCMs are best suited for applications with pulses width lengths of several minutes with a period of several tens of minutes. In order to achieve a faster response of the PCM, the concept of PCM-metal foam is explored and modeled. Experimental data is presented which confirms the validity of the thermal RC network approach.

IEEE Transactions on Components, Packaging and Manufacturing Technology (Vol. 1, Issue 4), Apr 2011

Cooling systems take a significant portion of the total mass and/or volume of power electronic sy... more Cooling systems take a significant portion of the total mass and/or volume of power electronic systems. In order to design a converter with high power density, it is necessary to minimize the converter's cooling system volume for a given maximum tolerable thermal resistance. This paper theoretically investigates whether the cooling system volume can be significantly reduced by employing new advanced composite materials like isotropic aluminum/diamond composites or anisotropic highly orientated pyrolytic graphite. Another strategy to improve the power density of the cooling system is to increase the rotating speed and/or the diameter of the fan, which is limited by increasing power consumption of the fan. Fan scaling laws are employed in order to describe volume and thermal resistance of an optimized cooling system (fan plus heat sink), resulting in a single compact equation dependent on just two design parameters. Based on this equation, a deep insight into different design strategies and their general potentials is possible. The theory of the design process is verified experimentally for cooling a 10 kW converter. Further experimental results showing the result of the operation of the optimized heat sink are also presented.

2011 Twenty-Sixth Annual IEEE Applied Power Electronics Conference and Exposition (APEC 2011), Mar 2011

In telecom applications, the vision for a total power conversion efficiency from the mains to the... more In telecom applications, the vision for a total power conversion efficiency from the mains to the output of PoL converters of 95% demands for an optimization of every conversion step, i.e. the PFC rectifier front-end should show an outstanding efficiency in the range of 99%. For recently discussed 400 V DC distribution bus voltages a buck-type PFC rectifier is a logical solution. In this paper, an efficiency-optimized, nearly 99% efficient, 5 kW three-phase buck-type PFC rectifier with 400 V output is presented. Methods for calculating losses of all components are described, and are used to optimize the converter design for efficiency at full load. Special attention is paid to semiconductor losses, which are shown to be dominant, with the parasitic device capacitance losses being a significant component. A prototype of the proposed rectifier is constructed which verifies the accuracy of the models used for loss calculation and optimization.

2011 Twenty-Sixth Annual IEEE Applied Power Electronics Conference and Exposition (APEC 2011), Mar 2011

Efficient power conversion is one of the fundamental research drivers for modern power supplies. ... more Efficient power conversion is one of the fundamental research drivers for modern power supplies. In order to achieve and design on the edge of the system performance space, automatic optimization procedures based on comprehensive analytical converter operation and loss models have to be employed. In this paper, a 5kW, 400V to 46-56V phase-shift dc-dc converter with LC output filter is optimized for the highest possible full-load efficiency. The system performance is discussed and compared for full-load, half-load and part-load optimization. Furthermore, the complexity of the first applied comprehensive analytical models is reduced step by step and the resulting values of the design parameters and the system performance are compared in detail with the reference system optimized with the comprehensive models. The sensitivity of the optimization to the level of detail of the modeling as well as the possibilities of the model-complexity reduction is explained. It is shown that certain complex components of the system model can be omitted without noticeably affecting the resulting efficiency.

2010 International Power Electronics Conference (IPEC 2010) - ECCE Asia, Jun 2010

In this paper a setup for performing power cycling tests of IGBT modules for the purpose of relia... more In this paper a setup for performing power cycling tests of IGBT modules for the purpose of reliability analysis is presented. The main purpose of the setup is to provide experimental data for the parameterization and verification of a newly developed physical model of solder deformation leading to the failure of power electronic devices. The design procedure, including considerations of reliability, measurement, and cooling, for a 5 kW flexible power cycling system is presented. Experimental results of a sub-1 kW prototype setup are shown, demonstrating the ability of the system to force the junction temperature of the device under test to follow an arbitrary temperature profile.

Keynote Paper at the Conversion and Intelligent Motion (PCIM 2010) Conference Europe, May 2010

The constant demand for higher efficiency and power density and lower costs of power electronics ... more The constant demand for higher efficiency and power density and lower costs of power electronics systems could be met by application of new topologies and/or modulation schemes and future wide-band gap semiconductor technology. However, the performance of state-of-the-art systems also could be improved significantly by multidomain/objective optimisation, i.e. by assigning overall optimal values to the design variables in the course of the design process. In order to perform such an optimisation first a comprehensive mathematical model of the main converter circuit has to be established, including thermal component models and the measures for DM and CM EMI filtering. Based on this model, an optimisation for multiple objectives, as e.g. efficiency and power density, can be performed. The optimisation makes best use of all degrees of freedom of a design and also allows to determine the sensitivity of the system performance on base technologies like Figures of Merit of the power semiconductors or properties of the magnetic core materials. Furthermore, different topologies can be easily compared and inherent performance limits can be identified.
In the paper, analytical approaches for designing the main functional elements of a power electronics converter are described and arranged to a linear design process in a first step. Moreover, the linking of the component models, i.e. of the electric, magnetic, thermal and thermo-mechanic design domains and an overall optimisation of the respective design variables based on the linked models is discussed. Finally, the coupling of the different domains and for example the utilisation of electrical equivalent circuits for implementing these couplings are investigated.

6th International Conference on Integrated Power Electronics Systems (CIPS 2010) , Mar 2010

Thesis (M.A.Sc.)--University of Toronto, 2008., Sep 2008

The purpose of this thesis is to develop implementations of digital controllers for switch mode p... more The purpose of this thesis is to develop implementations of digital controllers for switch mode power supplies providing fast transient response, superior to that of existing solutions, both analog and digital. The targeted applications are Point-of-Load converters supplying modern digital circuits. An on-chip implementation of a previously described continuous-time algorithm is presented. The operation of this continuous-time digital controller (CT-DC) is verified through simulations and also through experimental testing of the fabricated integrated circuit. The CT-DC is then extended to include a novel auto-tuning algorithm, which is capable of extracting power stage parameters simply by observing the CT-DC's transient performance. The operation of this algorithm is verified through simulations. Finally, a novel modified converter topology for improving heavy-to-light load transient performance, where the CT-DC offers only marginal improvement compared to existing solutions, is presented and verified experimentally.

IEEE Power Electronics Specialists Conference, 2008. PESC 2008., Jun 2008

In this paper a novel digital controller and modified buck converter for improving heavy-to-light... more In this paper a novel digital controller and modified buck converter for improving heavy-to-light load transient response of low-power low-voltage dc-dc converters is introduced. The system is primarily designed for point-of-load (PoL) converters providing low regulated voltages for digital loads. In conventional buck topologies, the low output voltage, often below 1 V, severely limits the inductor current slew rate during the transients. To overcome this physical limitation, a modification is introduced whereby during heavy-to-light transients, the inductor current is, by the means of two extra switches, steered into the source and at the same time, the slew-rate of the current is significantly increased. The steering action is governed by a digital controller. The effectiveness of the system is verified on an FPGA-controlled, 12 V to 0.9 V, 10 W, experimental prototype. The results show that the steered-inductor digitally controlled buck converter has much shorter settling time and provides 2.8 times smaller overshoot than the conventional buck.

IEEE Power Electronics Specialists Conference, 2008. PESC 2008., Jun 2008

This paper describes a simple adaptive digital system that can accurately estimate steady-state i... more This paper describes a simple adaptive digital system that can accurately estimate steady-state inductor current and, at the same time, provide remote temperature monitoring of power switches in low-power digitally controlled dc-dc converters. The system is well-suited for on-chip implementation. It provides a solution for combining a digital controller, current estimator and remote temperature monitor on a single integrated circuit. To estimate the current and temperature, the estimator utilizes inherently available information about the duty ratio and performs auto-calibration through the utilization of a current sink. During regular converter operation, a known load current step is introduced and the inductor current and a dc resistance Req emulating converter losses are calculated from the resulting increase in the duty ratio control variable. Then, based on the obtained resistance value, the temperature of the switching components is found. The effectiveness of the estimator is demonstrated on a digitally-controlled 1.5 V, 15 W buck converter operating at 500 kHz switching frequency.

37th IEEE Power Electronics Specialists Conference, 2006. PESC '06., Jun 2006

This paper introduces a low power digital PFM controller for multi-output dc-dc converters suitab... more This paper introduces a low power digital PFM controller for multi-output dc-dc converters suitable for integration in modern low-power management systems. It utilizes only one inductor to provide multiple output voltages and has very low power consumption. In addition, its reference voltages and switching frequency can be programmed dynamically. To achieve these characteristics two new key functional blocks are developed, namely Σ-Δ programmable delay-line based comparator utilizing natural filtering of delay cells and on-time control logic. The controller is implemented both on FPGA and a 0.18-μm CMOS application specific IC. Experimental results obtained with a 1 W, 9 V, four-output buck prototype and IC simulations successfully verify controller operation.

Books by Andrija Stupar

Thesis (Ph.D.) - University of Toronto, 2017

Engineers have to fulfill multiple requirements and strive towards often competing goals while de... more Engineers have to fulfill multiple requirements and strive towards often competing goals while designing power electronic systems. This can be an analytically complex and computationally intensive task since the relationship between the parameters of a system's design space is not always obvious. Furthermore, a number of possible solutions to a particular problem may exist. To find an optimal system, many different possible designs must be evaluated. Literature on power electronics optimization focuses on the modeling and design of particular converters, with little thought given to the mathematical formulation of the optimization problem. Therefore, converter optimization has generally been a slow process, with exhaustive search, the execution time of which is exponential in the number of design variables, the prevalent approach. In this thesis, geometric programming (GP), a type of convex optimization, the execution time of which is polynomial in the number of design variables, is proposed and demonstrated as an efficient and comprehensive framework for the multi-objective optimization of non-isolated unidirectional DC/DC converters. A GP model of multilevel flying capacitor step-down converters is developed and experimentally verified on a 15-to-3.3~V, 9.9~W discrete prototype, with sets of loss-volume Pareto optimal designs generated in under one minute. It is also demonstrated how the GP model can be used to determine the sensitivity of the optimized designs to the design parameters. Furthermore, a general procedure for deriving GP models is presented and demonstrated on the example of inductors for higher power applications. Finally, using the example of the seven-switch flying capacitor converter, it is shown how in cases where a converter-level GP model is not possible, component-level GP models can be coupled with a circuit simulator to perform efficiency optimization quickly. This hybrid approach is used to design a wide input and output voltage range, 2~A output current converter IC. The results show that GP is of great value to both researchers and practicing engineers. The methods demonstrated for deriving GP models of power converters are extendable to other converter topologies, allowing for the creation of a rigorous mathematical framework for the optimization of power electronics that guarantees globally optimum designs generated quickly.