Anuj Shaw - Academia.edu (original) (raw)
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Before the CMOS process is scaled into deep sub-micron process, dynamic energy loss has always do... more Before the CMOS process is scaled into deep sub-micron process, dynamic energy loss has always dominated power dissipation, while leakage power is little. The aggressive scaling of device dimensions and threshold voltage has significantly increased leakage current exponentially, thus the MOS devices will no longer be totally turned-off anymore. The power dissipation caused by leakage current can’t be neglected anymore, which attracts extensive attentions. Based on the fact that PMOS transistors have an order of magnitude smaller gate leakage than NMOS ones, it is used for designing circuit for reducing gate leakage power. Series of iterative steps are carried out to find the design perspective effect in different technologies.
Abstract- Infrared Controlled thermometer is a non-contact temperature measurement device. The ma... more Abstract- Infrared Controlled thermometer is a non-contact temperature measurement device. The main focus of the project is to develop hardware specified design to support the infrared environment; where at the receiver end we shall be able to find the ambient temperature of that particular place. In this project the infrared ray projected from the transmitter activates the phototransistor. The signal derived from the phototransistor is amplified and decoded. This processed signal puts the relay ON. The output from the relay makes the temperature sensor operational which gives an output in form of DC voltage which is equivalent to the ambient temperature in degree Celsius. The transmitter can operate within a range of 2-6 meters.
Before the CMOS process is scaled into deep sub-micron process, dynamic energy loss has always do... more Before the CMOS process is scaled into deep sub-micron process, dynamic energy loss has always dominated power dissipation, while leakage power is little. The aggressive scaling of device dimensions and threshold voltage has significantly increased leakage current exponentially, thus the MOS devices will no longer be totally turned-off anymore. The power dissipation caused by leakage current can’t be neglected anymore, which attracts extensive attentions. Based on the fact that PMOS transistors have an order of magnitude smaller gate leakage than NMOS ones, it is used for designing circuit for reducing gate leakage power. Series of iterative steps are carried out to find the design perspective effect in different technologies.
This paper proposes strategy based VLSI architecture designed for estimating power consumption fo... more This paper proposes strategy based VLSI architecture designed for estimating power consumption for the pseudo inverse of augmented channel matrix used in MIMO system. MIMO technology involves highly complex signal processing at the receiver end which is directly related with increased in power consumption. The VLSI architecture presented in the paper is based on Square Root Decoder algorithm. A simulationbased analysis has been carried out to evaluate the QR decomposition of 2x2 MIMO systems. The PINV module of Square Root decoder algorithm has been designed and simulated in Xilinx System Generator tool. The total power consumed by Pseudo Inverse module is obtained as 239mW. Keyword: MIMO, SIMULINK, SQUARE ROOT DECODER, VBLAST, VLSI.
Before the CMOS process is scaled into deep sub-micron process, dynamic energy loss has always do... more Before the CMOS process is scaled into deep sub-micron process, dynamic energy loss has always dominated power dissipation, while leakage power is little. The aggressive scaling of device dimensions and threshold voltage has significantly increased leakage current exponentially, thus the MOS devices will no longer be totally turned-off anymore. The power dissipation caused by leakage current can’t be neglected anymore, which attracts extensive attentions. Based on the fact that PMOS transistors have an order of magnitude smaller gate leakage than NMOS ones, it is used for designing circuit for reducing gate leakage power. Series of iterative steps are carried out to find the design perspective effect in different technologies.
Abstract- Infrared Controlled thermometer is a non-contact temperature measurement device. The ma... more Abstract- Infrared Controlled thermometer is a non-contact temperature measurement device. The main focus of the project is to develop hardware specified design to support the infrared environment; where at the receiver end we shall be able to find the ambient temperature of that particular place. In this project the infrared ray projected from the transmitter activates the phototransistor. The signal derived from the phototransistor is amplified and decoded. This processed signal puts the relay ON. The output from the relay makes the temperature sensor operational which gives an output in form of DC voltage which is equivalent to the ambient temperature in degree Celsius. The transmitter can operate within a range of 2-6 meters.
Before the CMOS process is scaled into deep sub-micron process, dynamic energy loss has always do... more Before the CMOS process is scaled into deep sub-micron process, dynamic energy loss has always dominated power dissipation, while leakage power is little. The aggressive scaling of device dimensions and threshold voltage has significantly increased leakage current exponentially, thus the MOS devices will no longer be totally turned-off anymore. The power dissipation caused by leakage current can’t be neglected anymore, which attracts extensive attentions. Based on the fact that PMOS transistors have an order of magnitude smaller gate leakage than NMOS ones, it is used for designing circuit for reducing gate leakage power. Series of iterative steps are carried out to find the design perspective effect in different technologies.
This paper proposes strategy based VLSI architecture designed for estimating power consumption fo... more This paper proposes strategy based VLSI architecture designed for estimating power consumption for the pseudo inverse of augmented channel matrix used in MIMO system. MIMO technology involves highly complex signal processing at the receiver end which is directly related with increased in power consumption. The VLSI architecture presented in the paper is based on Square Root Decoder algorithm. A simulationbased analysis has been carried out to evaluate the QR decomposition of 2x2 MIMO systems. The PINV module of Square Root decoder algorithm has been designed and simulated in Xilinx System Generator tool. The total power consumed by Pseudo Inverse module is obtained as 239mW. Keyword: MIMO, SIMULINK, SQUARE ROOT DECODER, VBLAST, VLSI.