Yifan Guo - Academia.edu (original) (raw)

Papers by Yifan Guo

IEEE Transactions on Advanced Packaging, 2000

A variety of parameters impact package reliability. One set of parameters that does not get much ... more A variety of parameters impact package reliability. One set of parameters that does not get much attention is the variations in package design that are assembly and vendor related. This study shows that solder pad size is important in solder joint reliability. Differences in solder pad size due to different vendors and processes can affect the reliability considerably. The impact of substrate thickness on package reliability has been shown in finite element stress analysis, moiré interferometry experiments, and reliability tests. However, in certain cases, the pad size effect can be so significant that it overrides the impact of substrate thickness. This work indicates that in order to obtain good correlation between predictive engineering results and reliability tests data, this factor should not be ignored. In this study, finite element simulation has been used to quantify the pad size effect on the BGA reliability in the PBGA package. Air-to-air thermal cycling test results were compared with FEM predictions. Optimized pad sizes are discussed and the impact on the solder joint reliability is predicted. Solder pad size effect was found to be a dominant feature in correlating test data with predictions.

Chip interconnect (solder to silicon) reliability is one of the critical elements in the qualific... more Chip interconnect (solder to silicon) reliability is one of the critical elements in the qualification of flip-chip bumping technology. Since the interconnect materials, structures and processes vary in different bumping technologies, the strength and reliability must be evaluated for each design. As lead-free solders are used in the system, the intermetallics associated with the lead-free solders and the UBM (under bump metallurgy) has also influence on the interconnect reliability. In addition, the stress that an interconnect experiences during thermal cycling depends on the properties of the solder alloy used in the interconnect. Different solder alloys require different interconnect strengths to achieve good reliability in thermal cycling. This paper reports on a study of interconnect reliability by comparing the interconnect strength and the working stress in the interconnect during qualification and application. A simple stress model was developed to determine the interconnect stress during thermal cycling. A testing methodology was established for determining the interconnect strength. In this report, the reliability of several interconnect structures in several lead-free solder systems, including Sn/Ag, Sn/Ag/Cu and Sn/Cu solders and the Ni-Au and TiW-Cu UBMs were studied.

IEEE Transactions on Components and Packaging Technologies, 2001

A methodology for evaluating the reliability and the impact of intrinsic stresses on the electrol... more A methodology for evaluating the reliability and the impact of intrinsic stresses on the electroless Ni under bump metallurgy (UBM) structure is presented. The first part of this work will address the testing methodology, which uses a pressure sensing device to determine the intrinsic stress in Ni due to the plating process. An optical method is used to capture deformation in the sensing device due to the Ni plating process. A finite element model is then used to calculate the intrinsic stress in the Ni film using the deformation output from the optical measurements. The second part of this work will address a predictive model used to determine the reliability of applying intrinsic stress values to a low cost electroless Ni UBM structure during the bump formation and solder reflow process. The combined work of the testing and predictive methodology provides a more effective and accurate method of predicting the Ni UBM reliability

IEEE Transactions on Electronics Packaging Manufacturing, 2002

A variety of Pb-free solders and under bump metallurgies (UBMs) was investigated for flip chip pa... more A variety of Pb-free solders and under bump metallurgies (UBMs) was investigated for flip chip packaging applications. The result shows that the Sn-0.7Cu eutectic alloy has the best fatigue life and it possess the most desirable failure mechanism in both thermal and isothermal mechanical tests regardless of UBM type. Although the electroless Ni-P UBM has a much slower reaction rate with solders than the Cu UBM, room temperature mechanical fatigue is worse than on the Cu UBM when coupled with either Sn-3.8Ag-0.7Cu or Sn-3.5Ag solder. The Sn-37Pb solder consumes less Cu UBM than all other Pb-free solders during reflow. However, Sn-37Pb consumes more Cu after solid state annealing. Studies on aging, tensile, and shear mechanical properties show that the Sn-0.7Cu alloy is the most favorable Pb-free solder for flip chip applications.

Numerical methods are being used extensively for predicting mechanical and thermal response of el... more Numerical methods are being used extensively for predicting mechanical and thermal response of electronic interconnect systems and packages. New challenges are being faced as the regime of predictable response is being expanded. These new challenges can range from incorporating complex time dependent material response prediction, interconnect reliability prediction to micromachined sensor response to extreme environmental inputs. Very often we are

IEEE Transactions on Components and Packaging Technologies, 2000

As the drive towards smaller portable communication products continues, conventional, peripheral ... more As the drive towards smaller portable communication products continues, conventional, peripheral leaded surface mount packaging technologies are beginning to reach their practical limits. Ongoing technology development and deployment activities in the area of direct chip attach and fine pitch ball grid array packaging have been underway within Motorola for the last decade. More recently, these two core competencies have been effectively leveraged leading to the development of a robust flip chip based Chip Scale Packaging technology dubbed JACS-PakTM CSP. The mix of technological capabilities that enabled this rapid development and qualification are discussed in this paper. To achieve the rapid deployment goal this program has used simulations extensively from the very onset of the program. A detailed cost modeling simulation identified the three major cost contributors to the overall package costs as wafer bumping costs, interposer substrate cost and manufacturing throughput. This focused the development effort on a low cost solution. Nonlinear finite element modeling and simulation was used at every stage of package development for design evaluation, design directions and design space determination. Finite element predictions at component level and board level were validated using micro moire laser interferometry for in-plane deformation measurement and Twyman-Green interferometry for out of plane deformation measurements. A detailed reliability testing program enabled confidence in the package performance and provided validation of the finite element based life time prediction capability

A variety of package parameters impact package reliability. One of the parameters that does not g... more A variety of package parameters impact package reliability. One of the parameters that does not get much attention is the variations in package design that are assembly and vendor related. It was shown in this study that the solder pad size plays a big role in solder joint reliability. The difference in solder pad size due to different vendors and processes can affect the reliability considerably. In certain cases, the pad size effect can be so significant that it will override the effect of substrate thickness. Our work indicates that in order to obtain good correlations between predictive engineering results and reliability tests data, this factor should not be ignored. In this paper, finite element analysis was used to study the impact of substrate thickness on solder reliability for flip-chip PBGA (plastic ball grid array) packages. The simulation results were experimentally validated with moire interferometry. Both numerical and experimental results indicated that better solder reliability could be achieved by using thicker substrate. However, the size of BGA solder pad was found to be crucial to BGA life. In order to achieve higher C5 (controlled collapse chip carrier connection) reliability, a larger solder pad is preferred

IEEE Transactions on Reliability, 1998

Reliability and quality assurance are a major concern in the semiconductor industry. However, whe... more Reliability and quality assurance are a major concern in the semiconductor industry. However, when developing a new mass-production technology, like micro-machined silicon-based devices, these aspects become particularly critical. Indeed, silicon-based thin-film tin-dioxide gas-sensor reliability has not been deeply studied; most of the completed studies address thick-film devices made on alumina substrates. New test-methods and equipment must be engineered to meet the ever-increasing expectations of the marketplace. This paper justifies the need for new accelerated tests for chemical sensors. A new method which allows `stressing the entire device structure' has been implemented. Test results obtained using this new approach allow us to evaluate the sensor reliability in the range of the requirements of applications using gas sensors