Mingdeng Chen - Academia.edu (original) (raw)

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Papers by Mingdeng Chen

Research paper thumbnail of Low power low voltage differential signaling driver

Research paper thumbnail of High performance differential amplifiers with thick oxide devices for high impedance nodes

Research paper thumbnail of Multi-bit per stage pipelined analog to digital converters

Research paper thumbnail of Systems and methods for determining an out of band signal

Research paper thumbnail of DC Offset Calibration for Complex Filters

Research paper thumbnail of Systems and methods for pipelined analog to digital conversion

Research paper thumbnail of Frequency Divider Circuit

The invention provides a frequency divider circuit. The frequency divider circuit comprises N tri... more The invention provides a frequency divider circuit. The frequency divider circuit comprises N triggers, N groups of switches and a controller. The output end of the ith trigger is connected with the input end of the i+1th trigger, wherein 1</=i</=N and N is a positive integer greater than or equal to 1. Each group of switch comprises a first switch and a second switch. The output end of the controller is connected with the input end of the first trigger. The input end of the controller is respectively connected with the other end of each second switch in N groups of switches, the other end of each first switch in even switch groups and the other end of each first switch in odd switch groups. The controller is used for carrying out control turn-on and turn-off selection on each second switch according to input frequency dividing parameters in a first mode, and carrying out control turn-on and turn-off selection on each first switch according to input frequency dividing parameters in a second mode. The frequency divider circuit can realize the function of frequency dividing of any positive integer, and has the advantages of simple structure and small scale.

Research paper thumbnail of Frequency divider circuit

Research paper thumbnail of A 1.8V CMOS, 80-200MHz continuous-time 4th order 0.05° equiripple linear phase filter with automatic tuning system

2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)

A 1.8V CMOS 80-200MHz continuoustime 4~-order 0.05' equiripple linear phase filter with an automa... more A 1.8V CMOS 80-200MHz continuoustime 4~-order 0.05' equiripple linear phase filter with an automatic tuning system is presented. An Operational Transconductance Amplifier (OTA) based on transistors operating in triode region is used to achieve a wide linear input range (1 .8Vppd peak-to-peak differential input with a single 1.8V power supply) and a wide transconductance tuning range. A novel and high performance system which integrates common-mode feedback (CMFB), common-mode feedforward (CMFF), and adaptative-bias into one circuit is introduced. The filter is based on Gm-C biquads and the post-layout simulation results in a 0.18um process have shown a THD of less than-40dB with a 1. 8 V p~ input and a 80-200MHz cutoff frequency tunable range. The group delay ripple is less than 3% for frequencies up to 1.4 times of the cutoff frequency and over the whole frequency tuning range. A simple automatic tuning system which adjusts the transconductance of the OTA is used to compensate the process parameter variations. I.

Research paper thumbnail of Linearized OTAs for high-frequency continuous-time filters: a comparative study

The 2002 45th Midwest Symposium on Circuits and Systems, 2002. MWSCAS-2002.

Abstract This paper presents a comparative study of three single-stage high frequency linearized ... more Abstract This paper presents a comparative study of three single-stage high frequency linearized OTAs for the design of high-performance continuous-time filters. The advantages and disadvantages of each structure are discussed. The two pseudo-differential OTAs are ...

Research paper thumbnail of Low-voltage, low-power circuits for data communication systems

Research paper thumbnail of A 2-v/sub pp/ 80-200-mhz fourth-order continuous-time linear phase filter with automatic frequency tuning

IEEE Journal of Solid-State Circuits, 2003

A CMOS 80-200-MHz fourth-order continuous-time 0.05 equiripple linear phase filter with an automa... more A CMOS 80-200-MHz fourth-order continuous-time 0.05 equiripple linear phase filter with an automatic frequency tuning system is presented. An operational transconductance amplifier based on transistors operating in triode region is used and a circuit that combines common-mode feedback, common-mode feedforward, and adaptive bias is introduced. The chip was fabricated in a 0.35-m process; filter experimental results have shown a total harmonic distortion less than 44 dB for a 2-V pp differential input with a single 2.3-V power supply. The group delay ripple is less than 4% for frequencies up to 1.5. The frequency tuning error is below 5%.

Research paper thumbnail of Analog to digital converter elements and methods for using such

Research paper thumbnail of Low-voltage low-power LVDS drivers

IEEE Journal of Solid-State Circuits, 2005

Two low-voltage low-power LVDS drivers used for high-speed point-to-point links are discussed. Wh... more Two low-voltage low-power LVDS drivers used for high-speed point-to-point links are discussed. While the previously reported LVDS drivers cannot operate with low-voltage supplies, the proposed double current sources (DCS) LVDS driver and the switchable current sources (SCS) LVDS driver are suitable for low-voltage applications. Although static current consumption is greater than the minimum amount required by the signal swing, the DCS LVDS driver is simple and fast. The SCS LVDS driver, by dynamically switching the current sources, draws minimum static current and reduces the power consumption by 60% compared to previously reported realizations. Both drivers were fabricated in a standard 0.35-m CMOS process; they are compliant with LVDS standards and can operate at data rates up to gigabits-per-second. Index Terms-Back-plane drivers, fast data communication circuits, input/output (I/O) drivers, low-voltage differential signaling (LVDS), low-voltage low-power integrated circuits.

Research paper thumbnail of Low power low voltage differential signaling driver

Research paper thumbnail of High performance differential amplifiers with thick oxide devices for high impedance nodes

Research paper thumbnail of Multi-bit per stage pipelined analog to digital converters

Research paper thumbnail of Systems and methods for determining an out of band signal

Research paper thumbnail of DC Offset Calibration for Complex Filters

Research paper thumbnail of Systems and methods for pipelined analog to digital conversion

Research paper thumbnail of Frequency Divider Circuit

The invention provides a frequency divider circuit. The frequency divider circuit comprises N tri... more The invention provides a frequency divider circuit. The frequency divider circuit comprises N triggers, N groups of switches and a controller. The output end of the ith trigger is connected with the input end of the i+1th trigger, wherein 1</=i</=N and N is a positive integer greater than or equal to 1. Each group of switch comprises a first switch and a second switch. The output end of the controller is connected with the input end of the first trigger. The input end of the controller is respectively connected with the other end of each second switch in N groups of switches, the other end of each first switch in even switch groups and the other end of each first switch in odd switch groups. The controller is used for carrying out control turn-on and turn-off selection on each second switch according to input frequency dividing parameters in a first mode, and carrying out control turn-on and turn-off selection on each first switch according to input frequency dividing parameters in a second mode. The frequency divider circuit can realize the function of frequency dividing of any positive integer, and has the advantages of simple structure and small scale.

Research paper thumbnail of Frequency divider circuit

Research paper thumbnail of A 1.8V CMOS, 80-200MHz continuous-time 4th order 0.05° equiripple linear phase filter with automatic tuning system

2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)

A 1.8V CMOS 80-200MHz continuoustime 4~-order 0.05' equiripple linear phase filter with an automa... more A 1.8V CMOS 80-200MHz continuoustime 4~-order 0.05' equiripple linear phase filter with an automatic tuning system is presented. An Operational Transconductance Amplifier (OTA) based on transistors operating in triode region is used to achieve a wide linear input range (1 .8Vppd peak-to-peak differential input with a single 1.8V power supply) and a wide transconductance tuning range. A novel and high performance system which integrates common-mode feedback (CMFB), common-mode feedforward (CMFF), and adaptative-bias into one circuit is introduced. The filter is based on Gm-C biquads and the post-layout simulation results in a 0.18um process have shown a THD of less than-40dB with a 1. 8 V p~ input and a 80-200MHz cutoff frequency tunable range. The group delay ripple is less than 3% for frequencies up to 1.4 times of the cutoff frequency and over the whole frequency tuning range. A simple automatic tuning system which adjusts the transconductance of the OTA is used to compensate the process parameter variations. I.

Research paper thumbnail of Linearized OTAs for high-frequency continuous-time filters: a comparative study

The 2002 45th Midwest Symposium on Circuits and Systems, 2002. MWSCAS-2002.

Abstract This paper presents a comparative study of three single-stage high frequency linearized ... more Abstract This paper presents a comparative study of three single-stage high frequency linearized OTAs for the design of high-performance continuous-time filters. The advantages and disadvantages of each structure are discussed. The two pseudo-differential OTAs are ...

Research paper thumbnail of Low-voltage, low-power circuits for data communication systems

Research paper thumbnail of A 2-v/sub pp/ 80-200-mhz fourth-order continuous-time linear phase filter with automatic frequency tuning

IEEE Journal of Solid-State Circuits, 2003

A CMOS 80-200-MHz fourth-order continuous-time 0.05 equiripple linear phase filter with an automa... more A CMOS 80-200-MHz fourth-order continuous-time 0.05 equiripple linear phase filter with an automatic frequency tuning system is presented. An operational transconductance amplifier based on transistors operating in triode region is used and a circuit that combines common-mode feedback, common-mode feedforward, and adaptive bias is introduced. The chip was fabricated in a 0.35-m process; filter experimental results have shown a total harmonic distortion less than 44 dB for a 2-V pp differential input with a single 2.3-V power supply. The group delay ripple is less than 4% for frequencies up to 1.5. The frequency tuning error is below 5%.

Research paper thumbnail of Analog to digital converter elements and methods for using such

Research paper thumbnail of Low-voltage low-power LVDS drivers

IEEE Journal of Solid-State Circuits, 2005

Two low-voltage low-power LVDS drivers used for high-speed point-to-point links are discussed. Wh... more Two low-voltage low-power LVDS drivers used for high-speed point-to-point links are discussed. While the previously reported LVDS drivers cannot operate with low-voltage supplies, the proposed double current sources (DCS) LVDS driver and the switchable current sources (SCS) LVDS driver are suitable for low-voltage applications. Although static current consumption is greater than the minimum amount required by the signal swing, the DCS LVDS driver is simple and fast. The SCS LVDS driver, by dynamically switching the current sources, draws minimum static current and reduces the power consumption by 60% compared to previously reported realizations. Both drivers were fabricated in a standard 0.35-m CMOS process; they are compliant with LVDS standards and can operate at data rates up to gigabits-per-second. Index Terms-Back-plane drivers, fast data communication circuits, input/output (I/O) drivers, low-voltage differential signaling (LVDS), low-voltage low-power integrated circuits.

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