Mircea Bodea - Academia.edu (original) (raw)

Papers by Mircea Bodea

Research paper thumbnail of An evaluation of symbolic computation algorithms for the extraction of small signal parameters of a linear circuit

2010 XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD), 2010

Using symbolic algorithms for small signal circuit parameter extraction could make possible imple... more Using symbolic algorithms for small signal circuit parameter extraction could make possible implementing extraction programs which, unlike those based on pure numerical methods, no longer require initial (“start”) values for the parameters being extracted, thus ensuring that the final result corresponds to the true global minimum of the error function. Solving the extraction problem, in the particular case of a

Research paper thumbnail of Small signal linear circuit parameter extraction method using symbolic computation

2008 11th International Conference on Optimization of Electrical and Electronic Equipment, 2008

A direct extraction method for small signal parameter extraction of a linear circuit is presented... more A direct extraction method for small signal parameter extraction of a linear circuit is presented. Unlike the numerical method approach, this algorithm doesn't make use of "start values" and performs complex symbolic computation in conjunction with numeric subroutines. Extraction of small signal parameters of a particular circuit illustrates the viability of the method and evidences the elements of the associated

Research paper thumbnail of The injector current distribution in an I<sup>2</sup>L D/A converter

Research paper thumbnail of The injector current distribution in an I2L D/A converter

Research paper thumbnail of Performance limitations and reliability of power devices: A thermal insight

1976 International Electron Devices Meeting, 1976

ABSTRACT

Research paper thumbnail of Predicting the surge capability of power thyristors

Electronics Letters, 1980

ABSTRACT

Research paper thumbnail of Transient thermal response of amplifying gate thyristors

Electronics Letters, 1976

ABSTRACT

Research paper thumbnail of Full thermal investigation of the Integrated Circuit 726 microampere

A full thermal investigation of the 726-microampere Temperature Stabilized Substrate Integrated C... more A full thermal investigation of the 726-microampere Temperature Stabilized Substrate Integrated Circuit (TSS IC) has been performed using a new and accurate quasi-three-dimensional numerical method. This new method allows a reduction of the three-dimensional thermal problem to a bidimensional one. This reduction does not affect the accuracy of the computed temperature distribution of the semiconductor chip. The validity of our

Research paper thumbnail of Symbolic Computation Tuning Method for The Evaluation of Algorithms in Small Signal Parameters Extraction

UPB Scientific Bulletin, Series C: Electrical Engineering

Research paper thumbnail of PHASE NOISE AND AREA − POWER CONSUMPTION TRADE-OFF IN THE FREQUENCY SYNTHESIZERS FOR SOFTWARE DEFINED RADIO TRANSCEIVERS

Research paper thumbnail of A CMOS LOW VOLTAGE CLASS-E POWER AMPLIFIER FOR UMTS

Research paper thumbnail of A FULLY DIFFERENTIAL SWITCHED CAPACITOR AMPLIFIER MODELLING AND PARAMETER EVALUATION

Research paper thumbnail of RAIL-TO-RAIL AMPLIFIER STRUCTURES

Research paper thumbnail of AN ANALYSIS OF CMOS RE-CONFIGURABLE MULTI- STANDARD RADIO RECEIVERS BUILDING BLOCKS CORE

Revue Roumaine des Sciences Techniques - Serie Électrotechnique et Énergétique

This paper presents the analysis of CMOS re-configurable multi-standard radio receivers building ... more This paper presents the analysis of CMOS re-configurable multi-standard radio receivers building blocks core. The paper's main goal is to determine the building blocks key parameters, like gain, noise figure (NF) and third order intercept point (IP3) and to link them to the receiver overall performance. An overview of existing circuit topologies is presented. The analysis emphasizes the solutions that fit best a true re-configurable multi-standard implementation.

Research paper thumbnail of Smart Noise–Linearity Breakdown in Homodyne Multi-Standard Radio Receivers

This paper analyzes the noise–linearity breakdown in direct conversion multi-standard radio recei... more This paper analyzes the noise–linearity breakdown in direct conversion multi-standard radio receivers embedding analog signal conditioning. The paper’s main goal is to develop a systematic noise–linearity partitioning methodology to be used in splitting the multi-standard receiver noise and linearity budget between its high frequency (HF) part and its low frequency (LF) baseband part. To this aim, a new and efficient design methodology tailored towards multi-standard receivers, and based on manual analysis, is developed. By using the developed methodology, power saving is enabled in the HF part through changing the multi-standard receiver HF part noise and linearity performance with its RF front-end gain. While for the LF part, the analysis revealed the performance can be kept the same to allow power optimization through dedicated circuit design.

Research paper thumbnail of Estimating the Impact of Complete Analog Channel Selection on Zero-IF Multi-Standard Radio Receivers Power Consumption

This paper analyses the key trade-off that shapes the design of direct conversion radio receivers... more This paper analyses the key trade-off that shapes the design of direct conversion radio receivers embedding analog signal conditioning: the trade-off between the receiver area, determined by its anti-alias Low Pass Filter (LPF) order, and its power consumption, constrained by the ADC specifications of resolution and speed. The paper's main goal is to determine the receiver's LPF order that enables the complete analog channel selection in the context of a multi-standard receiver implementation. Based on the multi-standard receiver generic blocker diagram analysis, a first order, system level analysis is used to determine the LPF order. The analysis is constructed from the circuit / transistor level designer perspective and is also used for estimating the impact of the complete analog channel selection on the receiver RF front-end power consumption and area. Thus, by using this analysis methodology the designer is enabled to handle efficiently the large amount of information r...

Research paper thumbnail of CMOS re-configurable multi-standard radio receivers biasing analysis

Revue Roumaine des Sciences Techniques - Serie Électrotechnique et Énergétique

This paper presents the analysis of CMOS re-configurable multi-standard radio receiv¬ers building... more This paper presents the analysis of CMOS re-configurable multi-standard radio receiv¬ers building blocks core. The paper’s main goal is to determine the building blocks key parameters, like gain, noise figure (NF) and third order intercept point (IP3) and to link them to the receiver overall performance. An overview of existing circuit topologies is presented. The analysis emphasizes the solutions that fit best a true re-configurable multi-standard implementation.

Research paper thumbnail of Smart Gain Partitioning for Noise – Linearity Trade-Off Optimization in Multi-Standard Radio Receivers

This paper analyzes the gain – noise – linearity partitioning in multi-standard radio receivers e... more This paper analyzes the gain – noise – linearity partitioning in multi-standard radio receivers embedding baseband analog signal conditioning. The presented novel gain partitioning strategy tailored towards multi-standard radio receivers optimally mitigates the extreme reception conditions specific to the wireless environment. Based on a first order system level analysis, the paper develops a standard independent methodology that drives the gain partitioning strategy and enables the designer to handle efficiently the large amount of information from the envisaged wireless standards. The receiver gain is split between an RF front-end embedding programmable gain and a high-dynamic range Variable Gain Amplifier (VGA). As the receiver NF and IIP3 change with the RF front-end gain, we proposed a generic algorithm to find the optimal gain partitioning between the receiver's two variable gain blocks.

Research paper thumbnail of 2.4 GHz BiCMOS front-end receiver design driven by gain, linearity and noise trade-offs

2003 International Semiconductor Conference. CAS 2003 Proceedings (IEEE Cat. No.03TH8676), 2003

This paper evaluates the design trade-offs for a high frequency RF front-end. The main three fact... more This paper evaluates the design trade-offs for a high frequency RF front-end. The main three factors - gain, linearity, noise - influence is analyzed, in order to get an optimum performance for the receiver. The analysis is focused on the weight of the main blocks (the low noise amplifier - LNA and the mixer) parameters oil the RF frontend operation.

Research paper thumbnail of A simple and efficient "tool" for BiCMOS high performance RF process transistors evaluation

2003 International Semiconductor Conference. CAS 2003 Proceedings (IEEE Cat. No.03TH8676), 2003

Research paper thumbnail of An evaluation of symbolic computation algorithms for the extraction of small signal parameters of a linear circuit

2010 XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD), 2010

Using symbolic algorithms for small signal circuit parameter extraction could make possible imple... more Using symbolic algorithms for small signal circuit parameter extraction could make possible implementing extraction programs which, unlike those based on pure numerical methods, no longer require initial (“start”) values for the parameters being extracted, thus ensuring that the final result corresponds to the true global minimum of the error function. Solving the extraction problem, in the particular case of a

Research paper thumbnail of Small signal linear circuit parameter extraction method using symbolic computation

2008 11th International Conference on Optimization of Electrical and Electronic Equipment, 2008

A direct extraction method for small signal parameter extraction of a linear circuit is presented... more A direct extraction method for small signal parameter extraction of a linear circuit is presented. Unlike the numerical method approach, this algorithm doesn&#39;t make use of &quot;start values&quot; and performs complex symbolic computation in conjunction with numeric subroutines. Extraction of small signal parameters of a particular circuit illustrates the viability of the method and evidences the elements of the associated

Research paper thumbnail of The injector current distribution in an I<sup>2</sup>L D/A converter

Research paper thumbnail of The injector current distribution in an I2L D/A converter

Research paper thumbnail of Performance limitations and reliability of power devices: A thermal insight

1976 International Electron Devices Meeting, 1976

ABSTRACT

Research paper thumbnail of Predicting the surge capability of power thyristors

Electronics Letters, 1980

ABSTRACT

Research paper thumbnail of Transient thermal response of amplifying gate thyristors

Electronics Letters, 1976

ABSTRACT

Research paper thumbnail of Full thermal investigation of the Integrated Circuit 726 microampere

A full thermal investigation of the 726-microampere Temperature Stabilized Substrate Integrated C... more A full thermal investigation of the 726-microampere Temperature Stabilized Substrate Integrated Circuit (TSS IC) has been performed using a new and accurate quasi-three-dimensional numerical method. This new method allows a reduction of the three-dimensional thermal problem to a bidimensional one. This reduction does not affect the accuracy of the computed temperature distribution of the semiconductor chip. The validity of our

Research paper thumbnail of Symbolic Computation Tuning Method for The Evaluation of Algorithms in Small Signal Parameters Extraction

UPB Scientific Bulletin, Series C: Electrical Engineering

Research paper thumbnail of PHASE NOISE AND AREA − POWER CONSUMPTION TRADE-OFF IN THE FREQUENCY SYNTHESIZERS FOR SOFTWARE DEFINED RADIO TRANSCEIVERS

Research paper thumbnail of A CMOS LOW VOLTAGE CLASS-E POWER AMPLIFIER FOR UMTS

Research paper thumbnail of A FULLY DIFFERENTIAL SWITCHED CAPACITOR AMPLIFIER MODELLING AND PARAMETER EVALUATION

Research paper thumbnail of RAIL-TO-RAIL AMPLIFIER STRUCTURES

Research paper thumbnail of AN ANALYSIS OF CMOS RE-CONFIGURABLE MULTI- STANDARD RADIO RECEIVERS BUILDING BLOCKS CORE

Revue Roumaine des Sciences Techniques - Serie Électrotechnique et Énergétique

This paper presents the analysis of CMOS re-configurable multi-standard radio receivers building ... more This paper presents the analysis of CMOS re-configurable multi-standard radio receivers building blocks core. The paper's main goal is to determine the building blocks key parameters, like gain, noise figure (NF) and third order intercept point (IP3) and to link them to the receiver overall performance. An overview of existing circuit topologies is presented. The analysis emphasizes the solutions that fit best a true re-configurable multi-standard implementation.

Research paper thumbnail of Smart Noise–Linearity Breakdown in Homodyne Multi-Standard Radio Receivers

This paper analyzes the noise–linearity breakdown in direct conversion multi-standard radio recei... more This paper analyzes the noise–linearity breakdown in direct conversion multi-standard radio receivers embedding analog signal conditioning. The paper’s main goal is to develop a systematic noise–linearity partitioning methodology to be used in splitting the multi-standard receiver noise and linearity budget between its high frequency (HF) part and its low frequency (LF) baseband part. To this aim, a new and efficient design methodology tailored towards multi-standard receivers, and based on manual analysis, is developed. By using the developed methodology, power saving is enabled in the HF part through changing the multi-standard receiver HF part noise and linearity performance with its RF front-end gain. While for the LF part, the analysis revealed the performance can be kept the same to allow power optimization through dedicated circuit design.

Research paper thumbnail of Estimating the Impact of Complete Analog Channel Selection on Zero-IF Multi-Standard Radio Receivers Power Consumption

This paper analyses the key trade-off that shapes the design of direct conversion radio receivers... more This paper analyses the key trade-off that shapes the design of direct conversion radio receivers embedding analog signal conditioning: the trade-off between the receiver area, determined by its anti-alias Low Pass Filter (LPF) order, and its power consumption, constrained by the ADC specifications of resolution and speed. The paper's main goal is to determine the receiver's LPF order that enables the complete analog channel selection in the context of a multi-standard receiver implementation. Based on the multi-standard receiver generic blocker diagram analysis, a first order, system level analysis is used to determine the LPF order. The analysis is constructed from the circuit / transistor level designer perspective and is also used for estimating the impact of the complete analog channel selection on the receiver RF front-end power consumption and area. Thus, by using this analysis methodology the designer is enabled to handle efficiently the large amount of information r...

Research paper thumbnail of CMOS re-configurable multi-standard radio receivers biasing analysis

Revue Roumaine des Sciences Techniques - Serie Électrotechnique et Énergétique

This paper presents the analysis of CMOS re-configurable multi-standard radio receiv¬ers building... more This paper presents the analysis of CMOS re-configurable multi-standard radio receiv¬ers building blocks core. The paper’s main goal is to determine the building blocks key parameters, like gain, noise figure (NF) and third order intercept point (IP3) and to link them to the receiver overall performance. An overview of existing circuit topologies is presented. The analysis emphasizes the solutions that fit best a true re-configurable multi-standard implementation.

Research paper thumbnail of Smart Gain Partitioning for Noise – Linearity Trade-Off Optimization in Multi-Standard Radio Receivers

This paper analyzes the gain – noise – linearity partitioning in multi-standard radio receivers e... more This paper analyzes the gain – noise – linearity partitioning in multi-standard radio receivers embedding baseband analog signal conditioning. The presented novel gain partitioning strategy tailored towards multi-standard radio receivers optimally mitigates the extreme reception conditions specific to the wireless environment. Based on a first order system level analysis, the paper develops a standard independent methodology that drives the gain partitioning strategy and enables the designer to handle efficiently the large amount of information from the envisaged wireless standards. The receiver gain is split between an RF front-end embedding programmable gain and a high-dynamic range Variable Gain Amplifier (VGA). As the receiver NF and IIP3 change with the RF front-end gain, we proposed a generic algorithm to find the optimal gain partitioning between the receiver's two variable gain blocks.

Research paper thumbnail of 2.4 GHz BiCMOS front-end receiver design driven by gain, linearity and noise trade-offs

2003 International Semiconductor Conference. CAS 2003 Proceedings (IEEE Cat. No.03TH8676), 2003

This paper evaluates the design trade-offs for a high frequency RF front-end. The main three fact... more This paper evaluates the design trade-offs for a high frequency RF front-end. The main three factors - gain, linearity, noise - influence is analyzed, in order to get an optimum performance for the receiver. The analysis is focused on the weight of the main blocks (the low noise amplifier - LNA and the mixer) parameters oil the RF frontend operation.

Research paper thumbnail of A simple and efficient "tool" for BiCMOS high performance RF process transistors evaluation

2003 International Semiconductor Conference. CAS 2003 Proceedings (IEEE Cat. No.03TH8676), 2003