Sangya Dutta - Academia.edu (original) (raw)
Papers by Sangya Dutta
2018 76th Device Research Conference (DRC), 2018
Human brain is a seemingly random network of sim1011\\sim 10^{11}sim1011 neurons connected by sim1014\\sim 10^{14}sim1014... more Human brain is a seemingly random network of sim1011\\sim 10^{11}sim1011 neurons connected by sim1014\\sim 10^{14}sim1014 synapses, beating today's best supercomputers by sim106times\\sim 10^{6}\\timessim106times in energy efficiency (fig. 1). Hardware realization of such a biological network requires compact, energy efficient electronic analogs on a sufficiently matured technology. Several CMOS based analog/digital implementations suffer from large area and power consumption [1] [2]. Non-CMOS implementation of neurons may provide area/energy efficiency, but they pose fabrication challenges [3]–[5]. Earlier, our group demonstrated an energy efficient neuron on a highly manufacturable 32 nm SOI CMOS technology [6]. Impact ionization (II) based hole storage was utilized to obtain the neuronal behavior in this compact PD-SOI neuron. However, the range of operation lies in the saturation region of the transistor. This causes large current flowing through it, which adds to the power consumption. Here, we propose tunneling based ho...
IEEE Transactions on Electron Devices, 2020
The human brain comprises about a hundred billion neurons connected through quadrillion synapses.... more The human brain comprises about a hundred billion neurons connected through quadrillion synapses. Spiking Neural Networks (SNNs) take inspiration from the brain to model complex cognitive and learning tasks. Neuromorphic engineering implements SNNs in hardware, aspiring to mimic the brain at scale (i.e., 100 billion neurons) with biological area and energy efficiency. The design of ultra-energy efficient and compact neurons is essential for the large-scale implementation of SNNs in hardware. In this work, we have experimentally demonstrated a Partially Depleted (PD) Silicon-On-Insulator (SOI) MOSFET based Leaky-Integrate & Fire (LIF) neuron where energy-and area-efficiency is enabled by two elements of design-first tunneling based operation and second compact sub-threshold SOI control circuit design. Band-to-Band Tunneling (BTBT) induced hole storage in the body is used for the "Integrate" function of the neuron. A compact control circuit "Fires" a spike when the body potential exceeds the firing threshold. The neuron then "Resets" by removing the stored holes from the body contact of the device. Additionally, the control circuit provides "Leakiness" in the neuron which is an essential property of biological neurons. The proposed neuron provides 10× higher area efficiency compared to CMOS design with equivalent energy/spike. Alternatively, it has 10 4 × higher energy efficiency at area-equivalent neuron technologies. Biologically comparable energy-and areaefficiency along with CMOS compatibility make the proposed device attractive for large-scale hardware implementation of SNNs.
Solid-State Electronics, 2019
The hardware realization of spiking neural network (SNN) requires a compact and energy efficient ... more The hardware realization of spiking neural network (SNN) requires a compact and energy efficient electronic analog to the biological neuron. A knob to tune the response of the as-fabricated neuron allows the network to perform various functioning without altering the hardware. Earlier, our group has experimentally demonstrated an LIF (leaky integrate & fire) neuron on a highly matured 32 nm SOI CMOS technology. In this work, we have experimentally demonstrated electrical tunability of the same through its intrinsic charge dynamics based on impact ionization (II) enabled floating body effect. First, a tunable input threshold (V th) is achieved by changing the drain bias. Second, above threshold, a firing frequency (f) to input (V) sensitivity (df/dV) tuning is successfully demonstrated by controlling the SOI-MOSFET's current threshold. We show that both the independent control of sensitivity and threshold is fundamentally enabled by the non-linearity of the impact ionization based carrier dynamics. The SOI neuron provides equivalent electrical tunability to Resistor-Capacitor (RC) based LIF neurons without degrading its original area and power advantages for clock-less, asynchronous SNNs. Further, we show that the neuronal behavior (threshold and sensitivity) is a key determinant of network performance, specifically the learning accuracy. Such flexibility based on post-fabrication electrical tuning will be an attractive enabler for the SNN hardware.
MRS Advances, 2018
:Spiking Neural Networks propose to mimic nature’s way of recognizing patterns and making decisio... more :Spiking Neural Networks propose to mimic nature’s way of recognizing patterns and making decisions in a fuzzy manner. To develop such networks in hardware, a highly manufacturable technology is required. We have proposed a silicon-based leaky integrate and fire (LIF) neuron, on a sufficiently matured 32 nm CMOS silicon-on-insulator (SOI) technology. The floating body effect of the partially depleted (PD) SOI transistor is used to store “holes” generated by impact ionization in the floating body, which performs the “integrate” function. Recombination or equivalent hole loss mimics the “leak” functions. The “hole” storage reduces the source barrier to increase the transistor current. Upon reaching a threshold current level, an external circuit records a “firing” event and resets the SOI MOSFET by draining all the stored holes. In terms of application, the neuron is able to show classification problems with reasonable accuracy. We looked at the effect of scaling experimentally. Channel length scaling reduces voltage for impact ionization and enables sharper impact ionization producing significant designability of the neuron. A circuit equivalence is also demonstrated to understand the dynamics qualitatively. Three distinct regimes are observed during integration based on different hole leakage mechanism.
IEEE Transactions on Electron Devices, 2018
Variability is an integral part of biology. A biological neural network performs efficiently desp... more Variability is an integral part of biology. A biological neural network performs efficiently despite variability and sometimes its performance is facilitated by the variability. Hence, the study of variability on its electronic analog is essential for constructing biomimetic neural networks. We have recently demonstrated a compact leaky integrate and fire (LIF) neuron on PD-silicon on insulator (SOI) MOSFET. In this paper, we have studied impact ionization (II)-induced variability both device-to-device (D2D) and cycle-to-cycle (C2C) in the SOI neuron. The C2C variability is attributed to the fluctuation in the II-generated charge storage and it is enhanced by at least 2.5× as compared to the no-II case. The D2D variability, on the other hand, is related to the II-induced sharp subthreshold slope (∼40 mV/decade), which enhanced the variability by ∼20× compared to the no-II case. The impact of the enhanced variability in SOI neurons on an unsupervised classification task was evaluated by simulating a spiking neural network (SNN) with both analog and binary synapses. For analog synapse-based SNN, the C2C variability improved the performance by ∼5% relative to ideal LIF neurons. However, the D2D variability, as well as combined D2D and C2C variability, degrades learning by −∼10%. For binary synapses, we observe that performance drastically degrades for ideal LIF neurons as the synaptic weight initialization becomes nonrandom. However, neurons with the experimentally demonstrated variability (C2C and D2D) mitigate this challenge. Therefore, this enables binary synapses to perform at par with analog synapses, which allows for deterministic weight initialization. This makes RNG circuits for random weight initialization redundant. Index Terms-Impact ionization (II), leaky integrate and fire (LIF), neuron, silicon on insulator (SOI), synapse, unsupervised learning, variability. I. INTRODUCTION V ARIABILITY is an intrinsic characteristic of biological neurons [1], [2]. In the nervous system, information is encoded in bursts of spikes in potential. These spikes typically Manuscript
2015 IEEE International Memory Workshop (IMW), 2015
A planar bulk ZRAM is attractive from a simplicity, cost and scalability perspective - compared t... more A planar bulk ZRAM is attractive from a simplicity, cost and scalability perspective - compared to SOI or FinFET based designs. Alternatively, the highly doped p-channel bulk planar ZRAM with electrostatic potential well-based hole-storage is susceptible to random- dopant-fluctuation (RDF) induced VT variability. Here, we propose and evaluate a planar bulk ZRAM device with an intrinsic channel of Si/SiGe/Si hetero-structure epitaxially grown on an n+Si well. TCAD simulations show excellent performance of 660mV VT shift at +/-1.5V operation and IREAD difference of 45μA/μm. In terms of RDF based VT variability, a σVT of 12.8 mV is observed which is estimated to be a small fraction (~51×) of the estimate VT shift (660mV) and 6.47× lower compared to p-doped channel based ZRAM. Initial experiments on MOSCAP devices validate the hole-storage in the SiGe well with a 0.5V VT shift and an excellent read disturb (>1000s).
Artificial Neural Networks and Machine Learning – ICANN 2018, 2018
Bio-inspired energy efficient control is a frontier for autonomous navigation and robotics. Binar... more Bio-inspired energy efficient control is a frontier for autonomous navigation and robotics. Binary input-output neuronal logic gates are demonstrated in literature – while analog input-output logic gates are needed for continuous analog real-world control. In this paper, we design logic gates such as AND, OR and XOR using networks of Leaky Integrate-and-Fire neurons with analog rate (frequency) coded inputs and output, where refractory period is shown to be a critical knob for neuronal design. To demonstrate our design method, we present contour tracking inspired by the chemotaxis network of the worm C. elegans and demonstrate for the first time an end-to-end Spiking Neural Network (SNN) solution. First, we demonstrate contour tracking with an average deviation equal to literature with non-neuronal logic gates. Second, 2x improvement in tracking accuracy is enabled by implementing latency reduction leading to state of the art performance with an average deviation of 0.55% from the set-point. Third, a new feature of local extrema escape is demonstrated with an analog XOR gate, which uses only 5 neurons – better than binary logic neuronal circuits. The XOR gate demonstrates the universality of our logic scheme. Finally, we demonstrate the hardware feasibility of our network based on experimental results on 32 nm Silicon-on-Insulator (SOI) based artificial neurons with tunable refractory periods. Thus, we present a general framework of analog neuronal control logic along with the feasibility of their implementation in mature SOI technology platform for autonomous SNN navigation controller hardware.
Scientific Reports, 2017
Neuro-biology inspired Spiking Neural Network (SNN) enables efficient learning and recognition ta... more Neuro-biology inspired Spiking Neural Network (SNN) enables efficient learning and recognition tasks. To achieve a large scale network akin to biology, a power and area efficient electronic neuron is essential. Earlier, we had demonstrated an LIF neuron by a novel 4-terminal impact ionization based n+/p/n+ with an extended gate (gated-INPN) device by physics simulation. Excellent improvement in area and power compared to conventional analog circuit implementations was observed. In this paper, we propose and experimentally demonstrate a compact conventional 3-terminal partially depleted (PD) SOI- MOSFET (100 nm gate length) to replace the 4-terminal gated-INPN device. Impact ionization (II) induced floating body effect in SOI-MOSFET is used to capture LIF neuron behavior to demonstrate spiking frequency dependence on input. MHz operation enables attractive hardware acceleration compared to biology. Overall, conventional PD-SOI-CMOS technology enables very-large-scale-integration (VLS...
2018 76th Device Research Conference (DRC), 2018
Human brain is a seemingly random network of sim1011\\sim 10^{11}sim1011 neurons connected by sim1014\\sim 10^{14}sim1014... more Human brain is a seemingly random network of sim1011\\sim 10^{11}sim1011 neurons connected by sim1014\\sim 10^{14}sim1014 synapses, beating today's best supercomputers by sim106times\\sim 10^{6}\\timessim106times in energy efficiency (fig. 1). Hardware realization of such a biological network requires compact, energy efficient electronic analogs on a sufficiently matured technology. Several CMOS based analog/digital implementations suffer from large area and power consumption [1] [2]. Non-CMOS implementation of neurons may provide area/energy efficiency, but they pose fabrication challenges [3]–[5]. Earlier, our group demonstrated an energy efficient neuron on a highly manufacturable 32 nm SOI CMOS technology [6]. Impact ionization (II) based hole storage was utilized to obtain the neuronal behavior in this compact PD-SOI neuron. However, the range of operation lies in the saturation region of the transistor. This causes large current flowing through it, which adds to the power consumption. Here, we propose tunneling based ho...
IEEE Transactions on Electron Devices, 2020
The human brain comprises about a hundred billion neurons connected through quadrillion synapses.... more The human brain comprises about a hundred billion neurons connected through quadrillion synapses. Spiking Neural Networks (SNNs) take inspiration from the brain to model complex cognitive and learning tasks. Neuromorphic engineering implements SNNs in hardware, aspiring to mimic the brain at scale (i.e., 100 billion neurons) with biological area and energy efficiency. The design of ultra-energy efficient and compact neurons is essential for the large-scale implementation of SNNs in hardware. In this work, we have experimentally demonstrated a Partially Depleted (PD) Silicon-On-Insulator (SOI) MOSFET based Leaky-Integrate & Fire (LIF) neuron where energy-and area-efficiency is enabled by two elements of design-first tunneling based operation and second compact sub-threshold SOI control circuit design. Band-to-Band Tunneling (BTBT) induced hole storage in the body is used for the "Integrate" function of the neuron. A compact control circuit "Fires" a spike when the body potential exceeds the firing threshold. The neuron then "Resets" by removing the stored holes from the body contact of the device. Additionally, the control circuit provides "Leakiness" in the neuron which is an essential property of biological neurons. The proposed neuron provides 10× higher area efficiency compared to CMOS design with equivalent energy/spike. Alternatively, it has 10 4 × higher energy efficiency at area-equivalent neuron technologies. Biologically comparable energy-and areaefficiency along with CMOS compatibility make the proposed device attractive for large-scale hardware implementation of SNNs.
Solid-State Electronics, 2019
The hardware realization of spiking neural network (SNN) requires a compact and energy efficient ... more The hardware realization of spiking neural network (SNN) requires a compact and energy efficient electronic analog to the biological neuron. A knob to tune the response of the as-fabricated neuron allows the network to perform various functioning without altering the hardware. Earlier, our group has experimentally demonstrated an LIF (leaky integrate & fire) neuron on a highly matured 32 nm SOI CMOS technology. In this work, we have experimentally demonstrated electrical tunability of the same through its intrinsic charge dynamics based on impact ionization (II) enabled floating body effect. First, a tunable input threshold (V th) is achieved by changing the drain bias. Second, above threshold, a firing frequency (f) to input (V) sensitivity (df/dV) tuning is successfully demonstrated by controlling the SOI-MOSFET's current threshold. We show that both the independent control of sensitivity and threshold is fundamentally enabled by the non-linearity of the impact ionization based carrier dynamics. The SOI neuron provides equivalent electrical tunability to Resistor-Capacitor (RC) based LIF neurons without degrading its original area and power advantages for clock-less, asynchronous SNNs. Further, we show that the neuronal behavior (threshold and sensitivity) is a key determinant of network performance, specifically the learning accuracy. Such flexibility based on post-fabrication electrical tuning will be an attractive enabler for the SNN hardware.
MRS Advances, 2018
:Spiking Neural Networks propose to mimic nature’s way of recognizing patterns and making decisio... more :Spiking Neural Networks propose to mimic nature’s way of recognizing patterns and making decisions in a fuzzy manner. To develop such networks in hardware, a highly manufacturable technology is required. We have proposed a silicon-based leaky integrate and fire (LIF) neuron, on a sufficiently matured 32 nm CMOS silicon-on-insulator (SOI) technology. The floating body effect of the partially depleted (PD) SOI transistor is used to store “holes” generated by impact ionization in the floating body, which performs the “integrate” function. Recombination or equivalent hole loss mimics the “leak” functions. The “hole” storage reduces the source barrier to increase the transistor current. Upon reaching a threshold current level, an external circuit records a “firing” event and resets the SOI MOSFET by draining all the stored holes. In terms of application, the neuron is able to show classification problems with reasonable accuracy. We looked at the effect of scaling experimentally. Channel length scaling reduces voltage for impact ionization and enables sharper impact ionization producing significant designability of the neuron. A circuit equivalence is also demonstrated to understand the dynamics qualitatively. Three distinct regimes are observed during integration based on different hole leakage mechanism.
IEEE Transactions on Electron Devices, 2018
Variability is an integral part of biology. A biological neural network performs efficiently desp... more Variability is an integral part of biology. A biological neural network performs efficiently despite variability and sometimes its performance is facilitated by the variability. Hence, the study of variability on its electronic analog is essential for constructing biomimetic neural networks. We have recently demonstrated a compact leaky integrate and fire (LIF) neuron on PD-silicon on insulator (SOI) MOSFET. In this paper, we have studied impact ionization (II)-induced variability both device-to-device (D2D) and cycle-to-cycle (C2C) in the SOI neuron. The C2C variability is attributed to the fluctuation in the II-generated charge storage and it is enhanced by at least 2.5× as compared to the no-II case. The D2D variability, on the other hand, is related to the II-induced sharp subthreshold slope (∼40 mV/decade), which enhanced the variability by ∼20× compared to the no-II case. The impact of the enhanced variability in SOI neurons on an unsupervised classification task was evaluated by simulating a spiking neural network (SNN) with both analog and binary synapses. For analog synapse-based SNN, the C2C variability improved the performance by ∼5% relative to ideal LIF neurons. However, the D2D variability, as well as combined D2D and C2C variability, degrades learning by −∼10%. For binary synapses, we observe that performance drastically degrades for ideal LIF neurons as the synaptic weight initialization becomes nonrandom. However, neurons with the experimentally demonstrated variability (C2C and D2D) mitigate this challenge. Therefore, this enables binary synapses to perform at par with analog synapses, which allows for deterministic weight initialization. This makes RNG circuits for random weight initialization redundant. Index Terms-Impact ionization (II), leaky integrate and fire (LIF), neuron, silicon on insulator (SOI), synapse, unsupervised learning, variability. I. INTRODUCTION V ARIABILITY is an intrinsic characteristic of biological neurons [1], [2]. In the nervous system, information is encoded in bursts of spikes in potential. These spikes typically Manuscript
2015 IEEE International Memory Workshop (IMW), 2015
A planar bulk ZRAM is attractive from a simplicity, cost and scalability perspective - compared t... more A planar bulk ZRAM is attractive from a simplicity, cost and scalability perspective - compared to SOI or FinFET based designs. Alternatively, the highly doped p-channel bulk planar ZRAM with electrostatic potential well-based hole-storage is susceptible to random- dopant-fluctuation (RDF) induced VT variability. Here, we propose and evaluate a planar bulk ZRAM device with an intrinsic channel of Si/SiGe/Si hetero-structure epitaxially grown on an n+Si well. TCAD simulations show excellent performance of 660mV VT shift at +/-1.5V operation and IREAD difference of 45μA/μm. In terms of RDF based VT variability, a σVT of 12.8 mV is observed which is estimated to be a small fraction (~51×) of the estimate VT shift (660mV) and 6.47× lower compared to p-doped channel based ZRAM. Initial experiments on MOSCAP devices validate the hole-storage in the SiGe well with a 0.5V VT shift and an excellent read disturb (>1000s).
Artificial Neural Networks and Machine Learning – ICANN 2018, 2018
Bio-inspired energy efficient control is a frontier for autonomous navigation and robotics. Binar... more Bio-inspired energy efficient control is a frontier for autonomous navigation and robotics. Binary input-output neuronal logic gates are demonstrated in literature – while analog input-output logic gates are needed for continuous analog real-world control. In this paper, we design logic gates such as AND, OR and XOR using networks of Leaky Integrate-and-Fire neurons with analog rate (frequency) coded inputs and output, where refractory period is shown to be a critical knob for neuronal design. To demonstrate our design method, we present contour tracking inspired by the chemotaxis network of the worm C. elegans and demonstrate for the first time an end-to-end Spiking Neural Network (SNN) solution. First, we demonstrate contour tracking with an average deviation equal to literature with non-neuronal logic gates. Second, 2x improvement in tracking accuracy is enabled by implementing latency reduction leading to state of the art performance with an average deviation of 0.55% from the set-point. Third, a new feature of local extrema escape is demonstrated with an analog XOR gate, which uses only 5 neurons – better than binary logic neuronal circuits. The XOR gate demonstrates the universality of our logic scheme. Finally, we demonstrate the hardware feasibility of our network based on experimental results on 32 nm Silicon-on-Insulator (SOI) based artificial neurons with tunable refractory periods. Thus, we present a general framework of analog neuronal control logic along with the feasibility of their implementation in mature SOI technology platform for autonomous SNN navigation controller hardware.
Scientific Reports, 2017
Neuro-biology inspired Spiking Neural Network (SNN) enables efficient learning and recognition ta... more Neuro-biology inspired Spiking Neural Network (SNN) enables efficient learning and recognition tasks. To achieve a large scale network akin to biology, a power and area efficient electronic neuron is essential. Earlier, we had demonstrated an LIF neuron by a novel 4-terminal impact ionization based n+/p/n+ with an extended gate (gated-INPN) device by physics simulation. Excellent improvement in area and power compared to conventional analog circuit implementations was observed. In this paper, we propose and experimentally demonstrate a compact conventional 3-terminal partially depleted (PD) SOI- MOSFET (100 nm gate length) to replace the 4-terminal gated-INPN device. Impact ionization (II) induced floating body effect in SOI-MOSFET is used to capture LIF neuron behavior to demonstrate spiking frequency dependence on input. MHz operation enables attractive hardware acceleration compared to biology. Overall, conventional PD-SOI-CMOS technology enables very-large-scale-integration (VLS...