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Papers by Saurabh Suryavanshi

2017 IEEE International Conference on IC Design and Technology (ICICDT), 2017

This invited talk will present recent highlights from our research on two-dimensional (2D) materi... more This invited talk will present recent highlights from our research on two-dimensional (2D) materials including graphene, boron nitride (h-BN), and transition metal dichalcogenides (TMDs). The results span from fundamental measurements and simulations, to device- and several unusual system-oriented applications which take advantage of unique 2D material properties. Basic electrical, thermal, and thermoelectric properties of 2D materials will also be discussed.

Understanding the thermal properties of two-dimensional (2D) materials and devices is essential f... more Understanding the thermal properties of two-dimensional (2D) materials and devices is essential for thermal management of 2D applications. Here we perform molecular dynamics simulations to evaluate both the specific heat of MoS_2 as well as the thermal boundary conductance (TBC) between one to five layers of MoS_2 with amorphous SiO_2 and between single-layer MoS_2 and crystalline AlN. The results of all calculations are compared to existing experimental data. In general, the TBC of such 2D interfaces is low, below 20 MWm^-2K^-1, due to the weak van der Waals (vdW) coupling and mismatch of phonon density of states (PDOS) between materials. However, the TBC increases with vdW coupling strength, with temperature, and with the number of MoS_2 layers (which introduce additional phonon modes). These findings suggest that the TBC of 2D materials is tunable by modulating their interface interaction, the number of layers, and finding a PDOS-matched substrate, with important implications for...

We demonstrate monolayer MoS2 grown by chemical vapor deposition (CVD) with transport properties ... more We demonstrate monolayer MoS2 grown by chemical vapor deposition (CVD) with transport properties comparable to those of the best exfoliated devices over a wide range of carrier densities (up to ~10^13 1/cm^2) and temperatures (80-500 K). Transfer length measurements reveal monolayer mobility of ~20 cm2/V/s on SiO2 substrates at 300 K and practical carrier densities (>2x10^12 1/cm^2). We also demonstrate the highest current density reported to date (~270 uA/um or 44 MA/cm^2) at 300 K for an 80 nm device from CVD-grown monolayer MoS2. Using simulations, we discuss what improvements of monolayer MoS2 are still required to meet technology roadmap requirements for low power (LP) and high performance (HP) applications. Such results are an important step towards large-area electronics based on monolayer semiconductors.

2017 IEEE 17th International Conference on Nanotechnology (IEEE-NANO), 2017

We investigate heat conduction across the interface of a monolayer semiconductor and its supporti... more We investigate heat conduction across the interface of a monolayer semiconductor and its supporting substrate using molecular dynamics (MD) simulations. For the first time, we show that for the interface between MoS2 and SiO2, thermal boundary conductance (TBC) is 15.5 ± 1.5 MWK−1m−2. The TBC is found to increase proportionally with the strength of the van der Waals interactions and is largely independent of temperature between 200 and 400 K. We also find that bi- and tri-layer MoS<inf>2</inf> on SiO<inf>2</inf> have somewhat higher TBC compared to single-layer MoS<inf>2</inf> on SiO<inf>2</inf>. We compare the TBC simulation results with experimental data from Raman thermometry, finding close agreement between simulation and experiments.

The S2DSb compact model is based on MVS model and captures the quasi-ballistic transport in two-d... more The S2DSb compact model is based on MVS model and captures the quasi-ballistic transport in two-dimensional field effect transistors (2D FETs). It also includes a detailed device self-heating model and temperature effects for sub-10 nm 2D FETs.

The physics-based Stanford 2D semiconductor model (S2DS) [1], [2] assume driftdiffusion transport... more The physics-based Stanford 2D semiconductor model (S2DS) [1], [2] assume driftdiffusion transport and is suitable for large channel (L > 100 nm) 2D devices. Recent experimental development [3] in fabricating short channel MoS2 devices (L ~ 10 nm) has directed us to develop a new model suitable for the quasi-ballistic region of operation. Unlike, S2DS model for 2D FET [1], [2], S2DSb model (‘b’ to indicate the alternate version of the S2DS model and support for ballistic transport) will be suitable for quasi-ballistic single-layer 2D (MoS2) transistor.

The Stanford 2D Semiconductor (S2DS) model is a physics-based, compact model for field-effect tra... more The Stanford 2D Semiconductor (S2DS) model is a physics-based, compact model for field-effect transistors (FETs) based on two-dimensional (2D) semiconductors such as MoS2.

Electrical contact resistance to two-dimensional (2D) semiconductors such as monolayer MoS2 is a ... more Electrical contact resistance to two-dimensional (2D) semiconductors such as monolayer MoS2 is a key bottleneck in scaling the 2D field effect transistors (FETs). The 2D semiconductor in contact with three-dimensional metal creates unique current crowding that leads to increased contact resistance. We developed a model to separate the contribution of the current crowding from the intrinsic contact resistivity. We show that current crowding can be alleviated by doping and contact patterning. Using Landauer-Büttiker formalism, we show that van der Waals (vdW) gap at the interface will ultimately limit the electrical contact resistance. We compare our models with experimental data for doped and undoped MoS2 FETs. Even with heavy charge-transfer doping of > 2 ×10 cm, we show that the state-ofthe-art contact resistance is 100 times larger than the ballistic limit. Our study highlights the need to develop efficient interface to achieve contact resistance of < 10 Ω·μm, which will be ...

We present a scaling theory of two-dimensional (2D) field effect transistors (FETs). For devices ... more We present a scaling theory of two-dimensional (2D) field effect transistors (FETs). For devices with channel thickness less than 4 nm, the device electrostatics is dominated by the physical gate oxide thickness and not the effective oxide thickness. Specifically, for symmetric double gate (DG) FETs the scale length ({\Lambda}) varies linearly with the gate oxide thickness(t_{ox}) as {\Lambda} ~ 3/4t_{ox}. The gate oxide dielectric permittivity and the semiconductor channel thickness do not affect the device electrostatics for such device geometries. For an asymmetric device such as single gate (SG) FETs, the fringing fields have a second order effect on the scale length. However, like symmetric DG FETs, the scale length in asymmetric FETs is also ultimately limited by the physical gate oxide thickness. We compare our theoretical predictions for scaled monolayer MoS2 DG FETs.

The driving behavior, road, and traffic conditions greatly affect the gasoline consumption of an ... more The driving behavior, road, and traffic conditions greatly affect the gasoline consumption of an automobile. We believe that accurate prediction of gasoline usage as a function of the above can be used to obtain optimal driving behavior, for given road and traffic conditions, to reduce gasoline consumption. This results in great dollar savings and also reduces the harmful effects of gasoline usage on environment. In this project, we propose machine learning framework to predict gasoline usage as a function of driving behavior with high accuracy. Analysis of the results shows that we are able to predict the rate of gasoline consumption (Miles/hour) much better than fuel economy (Miles/gallon), as a function of driving behavior. We then propose an application by constructing a machine learning framework to minimize the total gasoline consumption over a period of time.

2017 75th Annual Device Research Conference (DRC), 2017

Doping of two-dimensional (2D) semiconductors often utilizes charge transfer techniques that are ... more Doping of two-dimensional (2D) semiconductors often utilizes charge transfer techniques that are not compatible with standard CMOS fabrication and are unstable over time. Sub-stoichiometric oxides have demonstrated stable 2D material doping [1], but often degrade the subthreshold swing (S) and current on/off ratio (I<inf>max</inf>/I<inf>min</inf>) of a device. Here, we demonstrate that AlOx can n-dope monolayer (1L) MoS2 while preserving Imax/Imin and S. The AlO<inf>x</inf> doping significantly reduces the contact resistance (to 480 Ω·μm) while preserving the mobility (∼34 cm2V−1s−1) and S, ultimately achieving record on-current of 700 μA/μm for a monolayer semiconductor. We also present a model for the effect of interface traps on the transfer characteristics, which explains the experimentally obtained results.

2D Materials, 2020

Electrical and thermal properties of atomically thin two-dimensional (2D) materials are affected ... more Electrical and thermal properties of atomically thin two-dimensional (2D) materials are affected by their environment, e.g. through remote phonon scattering or dielectric screening. However, while it is known that mobility and thermal conductivity (TC) of graphene are reduced on a substrate, these effects are much less explored in 2D semiconductors such as MoS2. Here, we use molecular dynamics to understand TC changes in monolayer (1L) and bilayer (2L) MoS2 by comparing suspended, supported, and encased structures. The TC of monolayer MoS2 is reduced from ∼117 W m−1 K−1 when suspended, to ∼31 W m−1 K−1 when supported by SiO2, at 300 K. Encasing 1L MoS2 in SiO2 further reduces its TC down to ∼22 W m−1 K−1. In contrast, the TC of 2L MoS2 is not as drastically reduced, being >50% higher than 1L both when supported and encased. These effects are due to phonon scattering with remote vibrational modes of the substrate, which are partly screened in 2L MoS2. We also examine the TC of 1L ...

Extended Abstracts of the 2018 International Conference on Solid State Devices and Materials, 2018

Journal of Applied Physics, 2019

Journal of Applied Physics, 2016

Nano Letters, 2017

The advancement of nanoscale electronics has been limited by energy dissipation challenges for ov... more The advancement of nanoscale electronics has been limited by energy dissipation challenges for over a decade. Such limitations could be particularly severe for twodimensional (2D) semiconductors integrated with flexible substrates or multilayered processors, both being critical thermal bottlenecks. To shed light into fundamental aspects of this problem, here we report the first direct measurement of spatially resolved temperature in functioning 2D monolayer MoS 2 transistors. Using Raman thermometry, we simultaneously obtain temperature maps of the device channel and its substrate. This differential measurement reveals the thermal boundary conductance of the MoS 2 interface with SiO 2 (14 ± 4 MW m −2 K −1) is an order magnitude larger than previously thought, yet near the low end of known solid−solid interfaces. Our study also reveals unexpected insight into nonuniformities of the MoS 2 transistors (small bilayer regions) which do not cause significant self-heating, suggesting that such semiconductors are less sensitive to inhomogeneity than expected. These results provide key insights into energy dissipation of 2D semiconductors and pave the way for the future design of energy-efficient 2D electronics.