T. Glinsner - Academia.edu (original) (raw)

Papers by T. Glinsner

NILCom is a consortium and technology platform for Nanoimprint Lithography (NIL) processes (Fig 1... more NILCom is a consortium and technology platform for Nanoimprint Lithography (NIL) processes (Fig 1.)[1]. NILCom focuses on commercially available infrastructure for nanoimprint applications in nano electronics, life sciences, data storage, and opto electronics, whereas previous work in NIL examines specific phenomena of imprint technologies and feasibility studies in feature size resolution and its specific process challenges[2,3]. Today NIL is considered a member of next generation lithography (NGL) and with that, it enjoys its consideration and application in product development and manufacturing if compared to other patterning technologies. Figure 1 NILCom Consortium Members

Novel Patterning Technologies 2018, 2018

Nanoimprint lithography (NIL) is one of the most promising technology platforms for replication o... more Nanoimprint lithography (NIL) is one of the most promising technology platforms for replication of nanometer and micrometer scale 3D topographies with extremely high resolution and throughput, as needed for e.g. photonic or optical applications. One of the remaining challenges of 3D NIL, however, is the fabrication of high quality 3D master originals – the initial patterns that are replicated multiple times in the NIL process. Here, we demonstrate a joint solution for 3D NIL where NanoFrazor thermal scanning probe lithography (t-SPL) is used to pattern the master templates with singlenanometer accurate 3D topographies. 3D topographies from polymer resist master templates are replicated using a HERCULES NIL system with SmartNIL technology. Furthermore, 3D patterns are transferred from the resist into a silicon substrate via reactive ion etching (RIE) and the resulting silicon master template is used for producing polymeric working stamps into OrmoStamp and, finally, replicas into optical grade OrmoClearFX material. Both replication strategies result in very high-quality replicas of the original patterns.

AIP Conference Proceedings, 2007

Nanoimprint lithography (NIL) is a cost efficient technique for the mass production of nanostruct... more Nanoimprint lithography (NIL) is a cost efficient technique for the mass production of nanostructures. We demonstrate alignment accuracies in the range of 100 nm and below in UV nanoimprint lithography (UV-NIL) using a simple optical technique. The advantages of this technique are the relative simplicity of the marker-design and the whole setup combined with the possibility of an upgrade of

Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures, 2004

The resolution, dimension stability, and reproducibility of the Soft UV-Nanoimprint is investigat... more The resolution, dimension stability, and reproducibility of the Soft UV-Nanoimprint is investigated. The potential for imprinting nanostructures with flexible molds in UV-curable resists in the 100 nm regime are explored and the limitations analyzed. The dimensional stability of imprinted patterns is determined by the deformation of the mold that in term depends on the geometry of the structures and the imprint pressure applied.

MicroNano Integration, 2004

The International Thchnology Roadmap for Semiconductors (ITRS) lays out a quite challenging path ... more The International Thchnology Roadmap for Semiconductors (ITRS) lays out a quite challenging path for the further development of the patterning techniques needed to create the ever-smaller feature sizes. In recent years the standard lithography repeatedly reached its limits due to the diffraction effects encountered with continuously shrinking mask patterns. These restrictions on wavelength, in combination with high process and equipment costs, make low cost, simple imprinting techniques competitive with next generation lithography methods. There are no physical limitations encountered with imprinting techniques for much smaller, fully replicated structures, down to the sub-10 nm range.

2014 International Conference on Optical MEMS and Nanophotonics, 2014

In recent years direct writing methods as e-beam lithography have been extensively used for resea... more In recent years direct writing methods as e-beam lithography have been extensively used for research and development of photonic structures but these techniques cannot be easily scaled up for cost efficient production. The restrictions in pattern size and fabrication of 3D structures, in combination with long process time and high costs make high quality, nanoimprinting techniques an attractive solution for next generation lithography methods. There are several Nanoimprint Lithography (NIL) techniques which can be categorized depending on the process parameters and the imprinting method - either step & repeat or full wafer imprinting. A variety of potential applications has been demonstrated using NIL (e.g. SAW devices, vias and contact layers with dual damascene imprinting process, Bragg structures, patterned media) [1,2]. In this work UV-NIL has been selected for the fabrication process of 3D-photonic crystals. Results with up to five layers will be demonstrated.

Proceedings of IEEE Sensors

This paper reports an optically aligned hot-embossing and imprinting method for biomedical, micro... more This paper reports an optically aligned hot-embossing and imprinting method for biomedical, microfluidic, and microoptical sensors. Hot-embossing technology is a low cost, flexible fabrication method, which has demonstrated high aspect ratio polymer microstructures as well as nanoimprinting patterns. It uses polymer substrates to imprint a pattern created on a master stamp. This allows the stamp to produce many fully patterned substrates for a wide range of materials and short production cycle times, and is therefore suited for applications from rapid prototyping to high volume production. The typical misalignment for mechanical alignment in hot-embossing is in the range of ±50 μm. By contrast, optical alignment accuracy can be achieved within 1 μm. This paper shows the principal equipment designs for optical alignment and hot-embossing process on silicon and quartz substrates. Alignment was performed on modified EVG620.

SPIE Proceedings, 2005

ABSTRACT The idea of subdividing the conventional hot embossing process into subsequent process s... more ABSTRACT The idea of subdividing the conventional hot embossing process into subsequent process steps is introduced as a modular hot embossing concept. Based on the EVG 520HE the process is separated into modules so that typical temperature cycle times can be circumvented because the imprint is carried out as an isothermal embossing process where the applied pressure is released at a temperature above Tg. Before detachment of stamp and imprinted substrate cooling is applied in a separate module. The full benefit of such a modular concept is achieved when every module is equipped with its own embossing tool and therefore with its own template. We have investigated a new way of preparing working-stamps, which are cost-efficient namely the polymeric replications of Si templates. We have chosen mr-L 6000, an UV curable imprint resist as a working-stamp material. It was possible to obtain a complete cross-link without PEB, which is beneficial with respect to pattern fidelity conservation. Furthermore XPS measurements have shown that a silanization of the cured resist is possible to serve as an anti-adhesion layer. IR alignment as a part of the modular concept and its issues have been discussed on the basis of the EVG450 bond aligner by using Si templates and Si substrates. It is shown that an embossing tool enabling alignment may affect pattern transfer.

Lunch on your own 12:10 pm-1:15 pm B. Nanoimprint Tools & Alignments 1:15 pm-4:00 pm (Session Cha... more Lunch on your own 12:10 pm-1:15 pm B. Nanoimprint Tools & Alignments 1:15 pm-4:00 pm (Session Chairs: Cindy Hanson, C. Sotomayer Torres) 1:15 pm-1:45 pm B1 (Invited) Interferometric-spatial phase imaging for nanometer-level alignment and gap control, Hank Smith, MIT 1:45 pm-2:05 pm B2 Photo-nanoimprinter employing active orientation head, H.

Wafer bonding techniques are key technologies for MEMS devices fabrication. Anodic bonding is a v... more Wafer bonding techniques are key technologies for MEMS devices fabrication. Anodic bonding is a very mature technique used for wafers stacking or wafer level packaging. This paper reports results on a process allowing Glass - Si - Glass and Si - Glass - Si triple-stacks bonding in a single process step. The process is performed at a temperature of 420°C by applying a voltage of maximum 600 V. The benefits of such a process will be detailed.

Alternative Lithographic Technologies, 2009

There are several applications either currently in production or in late stage R&D, for UV-based ... more There are several applications either currently in production or in late stage R&D, for UV-based Nanoimprint Lithography (UV-NIL) and Hot Embossing (HE) that require a full-field imprint technology in order to make these processes either feasible or costeffective. These applications cover a wide range of features sizes from the millimeter range down to sub-100 nm. Because of the total thickness variation (TTV) associated with the imprinted substrates, full-field imprinting requires fabrication of a "soft" or "working" stamp from a "hard" stamp usually made from materials such as nickel, quartz or silicon. Several materials and processes have previously been identified that allow for full-field imprinting, however, these materials all have drawbacks associated with them that hinder their movement into High Volume Manufacturing (HVM) environments. EV Group Inc (EVG) has, in cooperation with our NILCOM™ partners, identified a novel set of polymeric materials and stamp fabrication processes that allow for full-field imprinting solutions suitable for these HVM environments. These materials have proven effective for imprinting at both millimeter feature sizes all the way down to 50 nm-full field. These materials, and the processes associated with their fabrication into working/soft stamps, should allow for a superior cost-of-ownership benefit and facilitate the movement of imprint lithography into industrial applications.

10th IEEE International Conference on Nanotechnology, 2010

ABSTRACT This work demonstrates unmatched needs for wafer-level camera applications like lateral ... more ABSTRACT This work demonstrates unmatched needs for wafer-level camera applications like lateral lens to lens position accuracies of

MOEMS and Miniaturized Systems XIV, 2015

Nanoimprinting techniques are an attractive solution for next generation lithography methods for ... more Nanoimprinting techniques are an attractive solution for next generation lithography methods for several areas including photonic devices. A variety of potential applications have been demonstrated using nanoimprint lithography (NIL) (e.g. SAW devices, vias and contact layers with dual damascene imprinting process, Bragg structures, patterned media) [1,2]. Nanoimprint lithography is considered for bridging the gap from R and D to high volume manufacturing. In addition, it is capable to adapt to the needs of the fragmented and less standardized photonic market easily. In this work UV-NIL has been selected for the fabrication process of 3D-photonic crystals. It has been shown that UVNIL using a multiple layer approach is well suited to fabricate a 3D woodpile photonic crystal. The necessary alignment accuracies below 100nm were achieved using a simple optical method. In order to obtain sufficient alignment of the stacks to each other, a two stage alignment process is performed: at first proximity alignment is done followed by the Moire´ alignment in soft contact with the substrate. Multiple steps of imprinting, etching, Si deposition and chemical mechanical polishing were implemented to create high quality 3D photonic crystals with up to 5 layers. This work has proven the applicability of nanoimprint lithography in a CMOS compatible process on 3D photonic crystals with alignment accuracy down to 100nm. Optimizing the processes will allow scaling up these structures on full wafers while still meeting the requirements of the designated devices.

Alternative Lithographic Technologies VII, 2015

Due to its high resolution and applicability for large area patterning, Nanoimprint Lithography (... more Due to its high resolution and applicability for large area patterning, Nanoimprint Lithography (NIL) is a promising technology for photovoltaic (PV) applications. However, a successful industrial application of NIL processes is only possible if large-area processing on thin, brittle and potentially rough substrates can be achieved in a high-throughput process. In this work, the development of NIL processes using the novel SmartNILTM technology from EV Group with a focus on PV applications is described. We applied this tooling to realize a honeycomb texture (8 μm period) on the front side of multicrystalline silicon solar cells leading to an improvement in optical efficiency of 7% relative and a total efficiency gain of 0.5% absolute compared to the industrial standard texture (isotexture). On the rear side of monocrystalline silicon solar cells, we realized diffraction gratings to make use of light trapping effects. An absorption enhancement of up to 35% absolute at a wavelength of 1100 nm is demonstrated. Furthermore, we combined photolithography and NIL processes to introduce features for metal contacts into honeycomb master structures, which initially were realized using interference lithography. As final application, we investigated the realization of very fine contact fingers with prismatic shape in order to minimize reflection losses.

SPIE Proceedings, 2004

Nanoimprinting is a low cost method to fabricate features from mum down to the nm-range. Differen... more Nanoimprinting is a low cost method to fabricate features from mum down to the nm-range. Different nanofabrication techniques, namely hot embossing, UV-nanoimprinting as well as micro-contact printing will be discussed. Recently achieved results with nanoimprinting methods will be demonstrated.

SPIE Proceedings, 2003

... and Applications”, ECS Proceedings vol. 95-7 (1995) 201. 8. S. Weichel, R. de Reus and M.Lind... more ... and Applications”, ECS Proceedings vol. 95-7 (1995) 201. 8. S. Weichel, R. de Reus and M.Lindahl, Sensors&Actuators A 70 (1998) 179. ... 11. Dow Chemicals, Processing Procedures for Photosensitive CYCLOTENE Advanced Electronics Resins (Photo BCB), 1997. 12. ...

2009 11th Electronics Packaging Technology Conference, 2009

The shrinkage and the integration of various functionalities into electrical devices, like comput... more The shrinkage and the integration of various functionalities into electrical devices, like computers or mobile phones, lead to an ongoing need for shrinkage of the integrated semiconductor units. One possibility for manufacturing of highly integrated electrical devices is the System in Package (SiP) approach where various semiconductor chips with different functionalities are stacked and electrically connected to each other. The shrinkage affects all levels of the SiP, e.g. the transistor size, the die thickness, the height of the die stack and also the dimension and shape of interconnects between the dies. The shrinkage of the die thickness and the interconnects can cause difficulties of the existing widely used joint technologies, e.g. solder bumping, because of low amount of involved solder, so that the assembly yields drops and the reliability of the interconnects lowers. The Advanced Chip to Wafer (AC2W) bonding is a two step process for stacking and bonding dies on wafers. First all dies are aligned and tacked on the wafer and in the second step all dies are bonded simultaneously permanently to the wafer. This process allows having force while bonding the dies on the wafer. In that way low solder volume interconnects can be formed on a wafer level with high assembly yield and throughput. The Cost of Ownership (CoO) connected with the throughput of the AC2W process can be an order of magnitude smaller then for comparable chip to wafer bonding processes and therefore the AC2W offers a low cost chip to wafer bonding process for high volume production. This paper will show the AC2W bonding process in detail, some issues at die joint shrinkage, a comprehensive throughput and CoO comparison between the AC2W and comparable process flows and the usage of the AC2W for multiple die layer stacking.

Alternative Lithographic Technologies III, 2011

Nanoimprint technology already demonstrated high resolution capability using hard master stamps i... more Nanoimprint technology already demonstrated high resolution capability using hard master stamps in the mid 90's. Considering this as a well known technology, there are still restrictions making nanoimprint lithography (NIL) a competitive "next generation lithography" technique. This paper will address limitations in regard to large area master stamp manufacturing, resolution and lifetime using soft UV-NIL imprint lithography on stamps fabricated

NILCom is a consortium and technology platform for Nanoimprint Lithography (NIL) processes (Fig 1... more NILCom is a consortium and technology platform for Nanoimprint Lithography (NIL) processes (Fig 1.)[1]. NILCom focuses on commercially available infrastructure for nanoimprint applications in nano electronics, life sciences, data storage, and opto electronics, whereas previous work in NIL examines specific phenomena of imprint technologies and feasibility studies in feature size resolution and its specific process challenges[2,3]. Today NIL is considered a member of next generation lithography (NGL) and with that, it enjoys its consideration and application in product development and manufacturing if compared to other patterning technologies. Figure 1 NILCom Consortium Members

Novel Patterning Technologies 2018, 2018

Nanoimprint lithography (NIL) is one of the most promising technology platforms for replication o... more Nanoimprint lithography (NIL) is one of the most promising technology platforms for replication of nanometer and micrometer scale 3D topographies with extremely high resolution and throughput, as needed for e.g. photonic or optical applications. One of the remaining challenges of 3D NIL, however, is the fabrication of high quality 3D master originals – the initial patterns that are replicated multiple times in the NIL process. Here, we demonstrate a joint solution for 3D NIL where NanoFrazor thermal scanning probe lithography (t-SPL) is used to pattern the master templates with singlenanometer accurate 3D topographies. 3D topographies from polymer resist master templates are replicated using a HERCULES NIL system with SmartNIL technology. Furthermore, 3D patterns are transferred from the resist into a silicon substrate via reactive ion etching (RIE) and the resulting silicon master template is used for producing polymeric working stamps into OrmoStamp and, finally, replicas into optical grade OrmoClearFX material. Both replication strategies result in very high-quality replicas of the original patterns.

AIP Conference Proceedings, 2007

Nanoimprint lithography (NIL) is a cost efficient technique for the mass production of nanostruct... more Nanoimprint lithography (NIL) is a cost efficient technique for the mass production of nanostructures. We demonstrate alignment accuracies in the range of 100 nm and below in UV nanoimprint lithography (UV-NIL) using a simple optical technique. The advantages of this technique are the relative simplicity of the marker-design and the whole setup combined with the possibility of an upgrade of

Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures, 2004

The resolution, dimension stability, and reproducibility of the Soft UV-Nanoimprint is investigat... more The resolution, dimension stability, and reproducibility of the Soft UV-Nanoimprint is investigated. The potential for imprinting nanostructures with flexible molds in UV-curable resists in the 100 nm regime are explored and the limitations analyzed. The dimensional stability of imprinted patterns is determined by the deformation of the mold that in term depends on the geometry of the structures and the imprint pressure applied.

MicroNano Integration, 2004

The International Thchnology Roadmap for Semiconductors (ITRS) lays out a quite challenging path ... more The International Thchnology Roadmap for Semiconductors (ITRS) lays out a quite challenging path for the further development of the patterning techniques needed to create the ever-smaller feature sizes. In recent years the standard lithography repeatedly reached its limits due to the diffraction effects encountered with continuously shrinking mask patterns. These restrictions on wavelength, in combination with high process and equipment costs, make low cost, simple imprinting techniques competitive with next generation lithography methods. There are no physical limitations encountered with imprinting techniques for much smaller, fully replicated structures, down to the sub-10 nm range.

2014 International Conference on Optical MEMS and Nanophotonics, 2014

In recent years direct writing methods as e-beam lithography have been extensively used for resea... more In recent years direct writing methods as e-beam lithography have been extensively used for research and development of photonic structures but these techniques cannot be easily scaled up for cost efficient production. The restrictions in pattern size and fabrication of 3D structures, in combination with long process time and high costs make high quality, nanoimprinting techniques an attractive solution for next generation lithography methods. There are several Nanoimprint Lithography (NIL) techniques which can be categorized depending on the process parameters and the imprinting method - either step & repeat or full wafer imprinting. A variety of potential applications has been demonstrated using NIL (e.g. SAW devices, vias and contact layers with dual damascene imprinting process, Bragg structures, patterned media) [1,2]. In this work UV-NIL has been selected for the fabrication process of 3D-photonic crystals. Results with up to five layers will be demonstrated.

Proceedings of IEEE Sensors

This paper reports an optically aligned hot-embossing and imprinting method for biomedical, micro... more This paper reports an optically aligned hot-embossing and imprinting method for biomedical, microfluidic, and microoptical sensors. Hot-embossing technology is a low cost, flexible fabrication method, which has demonstrated high aspect ratio polymer microstructures as well as nanoimprinting patterns. It uses polymer substrates to imprint a pattern created on a master stamp. This allows the stamp to produce many fully patterned substrates for a wide range of materials and short production cycle times, and is therefore suited for applications from rapid prototyping to high volume production. The typical misalignment for mechanical alignment in hot-embossing is in the range of ±50 μm. By contrast, optical alignment accuracy can be achieved within 1 μm. This paper shows the principal equipment designs for optical alignment and hot-embossing process on silicon and quartz substrates. Alignment was performed on modified EVG620.

SPIE Proceedings, 2005

ABSTRACT The idea of subdividing the conventional hot embossing process into subsequent process s... more ABSTRACT The idea of subdividing the conventional hot embossing process into subsequent process steps is introduced as a modular hot embossing concept. Based on the EVG 520HE the process is separated into modules so that typical temperature cycle times can be circumvented because the imprint is carried out as an isothermal embossing process where the applied pressure is released at a temperature above Tg. Before detachment of stamp and imprinted substrate cooling is applied in a separate module. The full benefit of such a modular concept is achieved when every module is equipped with its own embossing tool and therefore with its own template. We have investigated a new way of preparing working-stamps, which are cost-efficient namely the polymeric replications of Si templates. We have chosen mr-L 6000, an UV curable imprint resist as a working-stamp material. It was possible to obtain a complete cross-link without PEB, which is beneficial with respect to pattern fidelity conservation. Furthermore XPS measurements have shown that a silanization of the cured resist is possible to serve as an anti-adhesion layer. IR alignment as a part of the modular concept and its issues have been discussed on the basis of the EVG450 bond aligner by using Si templates and Si substrates. It is shown that an embossing tool enabling alignment may affect pattern transfer.

Lunch on your own 12:10 pm-1:15 pm B. Nanoimprint Tools & Alignments 1:15 pm-4:00 pm (Session Cha... more Lunch on your own 12:10 pm-1:15 pm B. Nanoimprint Tools & Alignments 1:15 pm-4:00 pm (Session Chairs: Cindy Hanson, C. Sotomayer Torres) 1:15 pm-1:45 pm B1 (Invited) Interferometric-spatial phase imaging for nanometer-level alignment and gap control, Hank Smith, MIT 1:45 pm-2:05 pm B2 Photo-nanoimprinter employing active orientation head, H.

Wafer bonding techniques are key technologies for MEMS devices fabrication. Anodic bonding is a v... more Wafer bonding techniques are key technologies for MEMS devices fabrication. Anodic bonding is a very mature technique used for wafers stacking or wafer level packaging. This paper reports results on a process allowing Glass - Si - Glass and Si - Glass - Si triple-stacks bonding in a single process step. The process is performed at a temperature of 420°C by applying a voltage of maximum 600 V. The benefits of such a process will be detailed.

Alternative Lithographic Technologies, 2009

There are several applications either currently in production or in late stage R&D, for UV-based ... more There are several applications either currently in production or in late stage R&D, for UV-based Nanoimprint Lithography (UV-NIL) and Hot Embossing (HE) that require a full-field imprint technology in order to make these processes either feasible or costeffective. These applications cover a wide range of features sizes from the millimeter range down to sub-100 nm. Because of the total thickness variation (TTV) associated with the imprinted substrates, full-field imprinting requires fabrication of a "soft" or "working" stamp from a "hard" stamp usually made from materials such as nickel, quartz or silicon. Several materials and processes have previously been identified that allow for full-field imprinting, however, these materials all have drawbacks associated with them that hinder their movement into High Volume Manufacturing (HVM) environments. EV Group Inc (EVG) has, in cooperation with our NILCOM™ partners, identified a novel set of polymeric materials and stamp fabrication processes that allow for full-field imprinting solutions suitable for these HVM environments. These materials have proven effective for imprinting at both millimeter feature sizes all the way down to 50 nm-full field. These materials, and the processes associated with their fabrication into working/soft stamps, should allow for a superior cost-of-ownership benefit and facilitate the movement of imprint lithography into industrial applications.

10th IEEE International Conference on Nanotechnology, 2010

ABSTRACT This work demonstrates unmatched needs for wafer-level camera applications like lateral ... more ABSTRACT This work demonstrates unmatched needs for wafer-level camera applications like lateral lens to lens position accuracies of

MOEMS and Miniaturized Systems XIV, 2015

Nanoimprinting techniques are an attractive solution for next generation lithography methods for ... more Nanoimprinting techniques are an attractive solution for next generation lithography methods for several areas including photonic devices. A variety of potential applications have been demonstrated using nanoimprint lithography (NIL) (e.g. SAW devices, vias and contact layers with dual damascene imprinting process, Bragg structures, patterned media) [1,2]. Nanoimprint lithography is considered for bridging the gap from R and D to high volume manufacturing. In addition, it is capable to adapt to the needs of the fragmented and less standardized photonic market easily. In this work UV-NIL has been selected for the fabrication process of 3D-photonic crystals. It has been shown that UVNIL using a multiple layer approach is well suited to fabricate a 3D woodpile photonic crystal. The necessary alignment accuracies below 100nm were achieved using a simple optical method. In order to obtain sufficient alignment of the stacks to each other, a two stage alignment process is performed: at first proximity alignment is done followed by the Moire´ alignment in soft contact with the substrate. Multiple steps of imprinting, etching, Si deposition and chemical mechanical polishing were implemented to create high quality 3D photonic crystals with up to 5 layers. This work has proven the applicability of nanoimprint lithography in a CMOS compatible process on 3D photonic crystals with alignment accuracy down to 100nm. Optimizing the processes will allow scaling up these structures on full wafers while still meeting the requirements of the designated devices.

Alternative Lithographic Technologies VII, 2015

Due to its high resolution and applicability for large area patterning, Nanoimprint Lithography (... more Due to its high resolution and applicability for large area patterning, Nanoimprint Lithography (NIL) is a promising technology for photovoltaic (PV) applications. However, a successful industrial application of NIL processes is only possible if large-area processing on thin, brittle and potentially rough substrates can be achieved in a high-throughput process. In this work, the development of NIL processes using the novel SmartNILTM technology from EV Group with a focus on PV applications is described. We applied this tooling to realize a honeycomb texture (8 μm period) on the front side of multicrystalline silicon solar cells leading to an improvement in optical efficiency of 7% relative and a total efficiency gain of 0.5% absolute compared to the industrial standard texture (isotexture). On the rear side of monocrystalline silicon solar cells, we realized diffraction gratings to make use of light trapping effects. An absorption enhancement of up to 35% absolute at a wavelength of 1100 nm is demonstrated. Furthermore, we combined photolithography and NIL processes to introduce features for metal contacts into honeycomb master structures, which initially were realized using interference lithography. As final application, we investigated the realization of very fine contact fingers with prismatic shape in order to minimize reflection losses.

SPIE Proceedings, 2004

Nanoimprinting is a low cost method to fabricate features from mum down to the nm-range. Differen... more Nanoimprinting is a low cost method to fabricate features from mum down to the nm-range. Different nanofabrication techniques, namely hot embossing, UV-nanoimprinting as well as micro-contact printing will be discussed. Recently achieved results with nanoimprinting methods will be demonstrated.

SPIE Proceedings, 2003

... and Applications”, ECS Proceedings vol. 95-7 (1995) 201. 8. S. Weichel, R. de Reus and M.Lind... more ... and Applications”, ECS Proceedings vol. 95-7 (1995) 201. 8. S. Weichel, R. de Reus and M.Lindahl, Sensors&Actuators A 70 (1998) 179. ... 11. Dow Chemicals, Processing Procedures for Photosensitive CYCLOTENE Advanced Electronics Resins (Photo BCB), 1997. 12. ...

2009 11th Electronics Packaging Technology Conference, 2009

The shrinkage and the integration of various functionalities into electrical devices, like comput... more The shrinkage and the integration of various functionalities into electrical devices, like computers or mobile phones, lead to an ongoing need for shrinkage of the integrated semiconductor units. One possibility for manufacturing of highly integrated electrical devices is the System in Package (SiP) approach where various semiconductor chips with different functionalities are stacked and electrically connected to each other. The shrinkage affects all levels of the SiP, e.g. the transistor size, the die thickness, the height of the die stack and also the dimension and shape of interconnects between the dies. The shrinkage of the die thickness and the interconnects can cause difficulties of the existing widely used joint technologies, e.g. solder bumping, because of low amount of involved solder, so that the assembly yields drops and the reliability of the interconnects lowers. The Advanced Chip to Wafer (AC2W) bonding is a two step process for stacking and bonding dies on wafers. First all dies are aligned and tacked on the wafer and in the second step all dies are bonded simultaneously permanently to the wafer. This process allows having force while bonding the dies on the wafer. In that way low solder volume interconnects can be formed on a wafer level with high assembly yield and throughput. The Cost of Ownership (CoO) connected with the throughput of the AC2W process can be an order of magnitude smaller then for comparable chip to wafer bonding processes and therefore the AC2W offers a low cost chip to wafer bonding process for high volume production. This paper will show the AC2W bonding process in detail, some issues at die joint shrinkage, a comprehensive throughput and CoO comparison between the AC2W and comparable process flows and the usage of the AC2W for multiple die layer stacking.

Alternative Lithographic Technologies III, 2011

Nanoimprint technology already demonstrated high resolution capability using hard master stamps i... more Nanoimprint technology already demonstrated high resolution capability using hard master stamps in the mid 90's. Considering this as a well known technology, there are still restrictions making nanoimprint lithography (NIL) a competitive "next generation lithography" technique. This paper will address limitations in regard to large area master stamp manufacturing, resolution and lifetime using soft UV-NIL imprint lithography on stamps fabricated