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As both the ITRS and the Medea+ DA Roadmaps have highlighted, early performance estimation is an ... more As both the ITRS and the Medea+ DA Roadmaps have highlighted, early performance estimation is an essential step in any SoC design methodology . This paper presents a C++ library for timing estimation at system level. The library is based on a general and systematic methodology that takes as input the original SystemC source code without any modification and provides the estimation parameters by simply including the library within a usual simulation. As a consequence, the same models of computation used during system design are preserved and all simulation conditions are maintained. The method exploits the advantages of dynamic analysis, that is, easy management of unpredictable datadependent conditions and computational efficiency compared with other alternatives (ISS or RT simulation, without the need for SW generation and compilation and HW synthesis). Results obtained on several examples show the accuracy of the method. In addition to the fundamental parameters needed for system-level design exploration, the proposed methodology allows the designer to include capture points at any place in the code. The user can process the corresponding captured events for unrestricted timing constraint verification.

Today's heterogeneous embedded systems combine components from different domains, such as softwar... more Today's heterogeneous embedded systems combine components from different domains, such as software, analogue hardware and digital hardware. The design and implementation of these systems is still a complex and error-prone task due to the different Models of Computations (MoCs), design languages and tools associated with each of the domains. Though making such systems adaptive is technologically feasible, most of the current design methodologies do not explicitely support adaptive architectures. This paper present the ANDRES project. The main objective of ANDRES is the development of a seamless design flow for adaptive heterogeneous embedded systems (AHES) based on the modelling language SystemC. Using domain-specific modelling extensions and libraries, ANDRES will provide means to efficiently use and exploit adaptivity in embedded system design. The design flow is completed by a methodology and tools for automatic hardware and software synthesis for adaptive architectures.

The embedded software design cost represents an important percentage of the embedded-system devel... more The embedded software design cost represents an important percentage of the embedded-system development costs . This paper presents a method for systematic embedded software generation that reduces the software generation cost in a platform-based HW/SW codesign methodology for embedded systems based on SystemC. The goal is that the same SystemC code allows system-level specification and verification, and, after SW/HW partition, SW/HW co-simulation and embedded software generation. The C++ code for the SW partition (processes and process communication including HW/SW interfaces) is systematically generated including the userselected embedded OS (e.g.: the eCos open source OS).

This paper presents a heterogeneous specification methodology built on top of the standard System... more This paper presents a heterogeneous specification methodology built on top of the standard SystemC kernel. The methodology enables abstract specification supporting heterogeneity, which in this context entails the ability to describe and connect parts of the system specification under different models of computation (MoCs). A main and distinguishing contribution of the methodology is that the support is provided while maintaining the standard kernel of SystemC unchanged, by means of a set of specification rules and a heterogeneous support library built on top of the SystemC standard library. This is possible thanks to an abstraction technique that can integrate any new MoC that can be abstracted over the underlying discrete-event simulation kernel. Primitives, guidelines and rules of the specification methodology, including those related to heterogeneous support, and the basis of the abstraction technique are described. Experimental results demonstrate the benefits of the methodology.

ACM Transactions on Design Automation of Electronic Systems, 2007

This work proposes a methodology which enables heterogeneous specification of complex, electronic... more This work proposes a methodology which enables heterogeneous specification of complex, electronic systems in SystemC supporting the integration of components under different models of computation (MoCs). This feature is necessary in order to deal with the growing complexity, concurrency, and heterogeneity of electronic embedded systems. The specification methodology is based on the SystemC standard language. Nevertheless, the use of SystemC

In this chapter we show the ability to specify with SystemC under the restrictions imposed by sev... more In this chapter we show the ability to specify with SystemC under the restrictions imposed by several model of computations, namely CSP, KPN and SR. Specifying under these MoCs provides some important properties, specially determinism and more protection against blocking, which are also important when implementation process is faced. In most cases, standard primitive SystemC channels or a combined use of them is suitable for specifying under these MoC restrictions. Nevertheless we provide some new specific and compatible channels providing important features, as dynamic checking of restrictions or atomic use. These channels represent an extension of the standard SystemC library.

A specification methodology for embedded system design should provide a capacity for heterogeneou... more A specification methodology for embedded system design should provide a capacity for heterogeneous specification. This would give the designer an effective tool to build a specification with different expressiveness needs, required by the multidisciplinary character of embedded systems, which, in turn, is due to their wide range of applications and an increasing integration capability. This specification methodology should be suitable for design tasks in order to improve design productivity. In this context, this paper deals with the general solution of the system-level heterogeneous specification in the framework of a specification methodology based on SystemC. This specification methodology is suitable for system-level modeling, but also for design procedures such as system-level profiling and single-source generation. Specifically, we study and propose a solution for a system-level SystemC specification which combines several untimed models of computations, (MoCs), namely CSP, PN and KPN. In order to situate clearly the heterogeneous specification methodology we will use a general study framework called Rugby metamodel.

The current trend in embedded system design is towards an increasing percentage of the embedded S... more The current trend in embedded system design is towards an increasing percentage of the embedded SW development cost of the total embedded system design costs. There is a clear need of reducing SW generation cost while maintaining reliability and design quality. SystemC represents a step forward in ensuring these goals. In this chapter, the application of SystemC to embedded SW generation is discussed. The state of art of the existing techniques for SW generation is analyzed and their advantages and drawbacks presented. In addition, methods for systematic embedded software generation which reduce the software generation cost in a platform based HW/SW co-design methodology for embedded systems based on SystemC is presented. SystemC supports a single-source approach, that is, the use of the same code for system level specification and verification, and, after HW/SW partitioning, for HW/SW co-simulation and embedded SW generation.

... F. Herrera*, E. Villar*, C. Grimm†, M. Damm† and J. Haase † *University of Cantabria, Spain †... more ... F. Herrera*, E. Villar*, C. Grimm†, M. Damm† and J. Haase † *University of Cantabria, Spain †Technical University of Vienna, Austria ... Then, some kind of adaptation has to be introduced to convert com-sumption in sampling (and vice versa) and production in writing (and vice ...

In order to get an efficient specification and simulation of a heterogeneous system, the choice o... more In order to get an efficient specification and simulation of a heterogeneous system, the choice of an appropriate model of computation (MoC) for each system part is essential. The choice depends on the design domain (e.g., analogue or digital), and the suitable abstraction level used to specify and analyse the aspects considered to be important in each system part. In practice, MoC choice is implicitly made by selecting a suitable language and a simulation tool for each system part. This approach requires the connection of different languages and simulation tools when the specification and simulation of the system are considered as a whole. SystemC is able to support a more unified specification methodology and simulation environment for heterogeneous system, since it is extensible by libraries that support additional MoCs. A major requisite of these libraries is to provide means to connect system parts which are specified using different MoCs. However, these connection means usually do not provide enough flexibility to select and tune the right conversion semantic in a mixed-level specification, simulation, and refinement process. In this article, converter channels, a flexible approach for MoC connection within a SystemC environment consisting of three extensions, namely, SystemC-AMS, HetSC, and OSSS+R, are presented.

This chapter provides a first general approach to the cooperation of SystemC-AMS and HetSC (Heter... more This chapter provides a first general approach to the cooperation of SystemC-AMS and HetSC (Heterogeneous SystemC) heterogeneous specification methodologies. Their joint usage enables the development of SystemC specifications supporting a wide range of Models of Computation (MoCs). This is becoming more and more necessary for building complete specifications of embedded systems, which are increasingly heterogeneous (they include the software control part, digital hardware accelerators, the analog front-end, etc.). This chapter identifies the syntactical and semantical issues involved in the specifications which include facilities from both, SystemC-AMS and HetSC methodologies. This work, which is an extension of the paper presented in FDL’07 [7], considers the availability and suitability of the MoC interface facilities provided by both methodologies, especially those of SystemC-AMS, which will be proposed for future standardization. Some practical aspects, such as the current set of MoCs covered by the methodologies and the compatibility on the installation of their associated libraries are also covered by this chapter. A complete illustrative example is used to show HetSC and SystemC-AMS cooperation.

As both the ITRS and the Medea+ DA Roadmaps have highlighted, early performance estimation is an ... more As both the ITRS and the Medea+ DA Roadmaps have highlighted, early performance estimation is an essential step in any SoC design methodology . This paper presents a C++ library for timing estimation at system level. The library is based on a general and systematic methodology that takes as input the original SystemC source code without any modification and provides the estimation parameters by simply including the library within a usual simulation. As a consequence, the same models of computation used during system design are preserved and all simulation conditions are maintained. The method exploits the advantages of dynamic analysis, that is, easy management of unpredictable datadependent conditions and computational efficiency compared with other alternatives (ISS or RT simulation, without the need for SW generation and compilation and HW synthesis). Results obtained on several examples show the accuracy of the method. In addition to the fundamental parameters needed for system-level design exploration, the proposed methodology allows the designer to include capture points at any place in the code. The user can process the corresponding captured events for unrestricted timing constraint verification.

Today's heterogeneous embedded systems combine components from different domains, such as softwar... more Today's heterogeneous embedded systems combine components from different domains, such as software, analogue hardware and digital hardware. The design and implementation of these systems is still a complex and error-prone task due to the different Models of Computations (MoCs), design languages and tools associated with each of the domains. Though making such systems adaptive is technologically feasible, most of the current design methodologies do not explicitely support adaptive architectures. This paper present the ANDRES project. The main objective of ANDRES is the development of a seamless design flow for adaptive heterogeneous embedded systems (AHES) based on the modelling language SystemC. Using domain-specific modelling extensions and libraries, ANDRES will provide means to efficiently use and exploit adaptivity in embedded system design. The design flow is completed by a methodology and tools for automatic hardware and software synthesis for adaptive architectures.

The embedded software design cost represents an important percentage of the embedded-system devel... more The embedded software design cost represents an important percentage of the embedded-system development costs . This paper presents a method for systematic embedded software generation that reduces the software generation cost in a platform-based HW/SW codesign methodology for embedded systems based on SystemC. The goal is that the same SystemC code allows system-level specification and verification, and, after SW/HW partition, SW/HW co-simulation and embedded software generation. The C++ code for the SW partition (processes and process communication including HW/SW interfaces) is systematically generated including the userselected embedded OS (e.g.: the eCos open source OS).

This paper presents a heterogeneous specification methodology built on top of the standard System... more This paper presents a heterogeneous specification methodology built on top of the standard SystemC kernel. The methodology enables abstract specification supporting heterogeneity, which in this context entails the ability to describe and connect parts of the system specification under different models of computation (MoCs). A main and distinguishing contribution of the methodology is that the support is provided while maintaining the standard kernel of SystemC unchanged, by means of a set of specification rules and a heterogeneous support library built on top of the SystemC standard library. This is possible thanks to an abstraction technique that can integrate any new MoC that can be abstracted over the underlying discrete-event simulation kernel. Primitives, guidelines and rules of the specification methodology, including those related to heterogeneous support, and the basis of the abstraction technique are described. Experimental results demonstrate the benefits of the methodology.

ACM Transactions on Design Automation of Electronic Systems, 2007

This work proposes a methodology which enables heterogeneous specification of complex, electronic... more This work proposes a methodology which enables heterogeneous specification of complex, electronic systems in SystemC supporting the integration of components under different models of computation (MoCs). This feature is necessary in order to deal with the growing complexity, concurrency, and heterogeneity of electronic embedded systems. The specification methodology is based on the SystemC standard language. Nevertheless, the use of SystemC

In this chapter we show the ability to specify with SystemC under the restrictions imposed by sev... more In this chapter we show the ability to specify with SystemC under the restrictions imposed by several model of computations, namely CSP, KPN and SR. Specifying under these MoCs provides some important properties, specially determinism and more protection against blocking, which are also important when implementation process is faced. In most cases, standard primitive SystemC channels or a combined use of them is suitable for specifying under these MoC restrictions. Nevertheless we provide some new specific and compatible channels providing important features, as dynamic checking of restrictions or atomic use. These channels represent an extension of the standard SystemC library.

A specification methodology for embedded system design should provide a capacity for heterogeneou... more A specification methodology for embedded system design should provide a capacity for heterogeneous specification. This would give the designer an effective tool to build a specification with different expressiveness needs, required by the multidisciplinary character of embedded systems, which, in turn, is due to their wide range of applications and an increasing integration capability. This specification methodology should be suitable for design tasks in order to improve design productivity. In this context, this paper deals with the general solution of the system-level heterogeneous specification in the framework of a specification methodology based on SystemC. This specification methodology is suitable for system-level modeling, but also for design procedures such as system-level profiling and single-source generation. Specifically, we study and propose a solution for a system-level SystemC specification which combines several untimed models of computations, (MoCs), namely CSP, PN and KPN. In order to situate clearly the heterogeneous specification methodology we will use a general study framework called Rugby metamodel.

The current trend in embedded system design is towards an increasing percentage of the embedded S... more The current trend in embedded system design is towards an increasing percentage of the embedded SW development cost of the total embedded system design costs. There is a clear need of reducing SW generation cost while maintaining reliability and design quality. SystemC represents a step forward in ensuring these goals. In this chapter, the application of SystemC to embedded SW generation is discussed. The state of art of the existing techniques for SW generation is analyzed and their advantages and drawbacks presented. In addition, methods for systematic embedded software generation which reduce the software generation cost in a platform based HW/SW co-design methodology for embedded systems based on SystemC is presented. SystemC supports a single-source approach, that is, the use of the same code for system level specification and verification, and, after HW/SW partitioning, for HW/SW co-simulation and embedded SW generation.

... F. Herrera*, E. Villar*, C. Grimm†, M. Damm† and J. Haase † *University of Cantabria, Spain †... more ... F. Herrera*, E. Villar*, C. Grimm†, M. Damm† and J. Haase † *University of Cantabria, Spain †Technical University of Vienna, Austria ... Then, some kind of adaptation has to be introduced to convert com-sumption in sampling (and vice versa) and production in writing (and vice ...

In order to get an efficient specification and simulation of a heterogeneous system, the choice o... more In order to get an efficient specification and simulation of a heterogeneous system, the choice of an appropriate model of computation (MoC) for each system part is essential. The choice depends on the design domain (e.g., analogue or digital), and the suitable abstraction level used to specify and analyse the aspects considered to be important in each system part. In practice, MoC choice is implicitly made by selecting a suitable language and a simulation tool for each system part. This approach requires the connection of different languages and simulation tools when the specification and simulation of the system are considered as a whole. SystemC is able to support a more unified specification methodology and simulation environment for heterogeneous system, since it is extensible by libraries that support additional MoCs. A major requisite of these libraries is to provide means to connect system parts which are specified using different MoCs. However, these connection means usually do not provide enough flexibility to select and tune the right conversion semantic in a mixed-level specification, simulation, and refinement process. In this article, converter channels, a flexible approach for MoC connection within a SystemC environment consisting of three extensions, namely, SystemC-AMS, HetSC, and OSSS+R, are presented.

This chapter provides a first general approach to the cooperation of SystemC-AMS and HetSC (Heter... more This chapter provides a first general approach to the cooperation of SystemC-AMS and HetSC (Heterogeneous SystemC) heterogeneous specification methodologies. Their joint usage enables the development of SystemC specifications supporting a wide range of Models of Computation (MoCs). This is becoming more and more necessary for building complete specifications of embedded systems, which are increasingly heterogeneous (they include the software control part, digital hardware accelerators, the analog front-end, etc.). This chapter identifies the syntactical and semantical issues involved in the specifications which include facilities from both, SystemC-AMS and HetSC methodologies. This work, which is an extension of the paper presented in FDL’07 [7], considers the availability and suitability of the MoC interface facilities provided by both methodologies, especially those of SystemC-AMS, which will be proposed for future standardization. Some practical aspects, such as the current set of MoCs covered by the methodologies and the compatibility on the installation of their associated libraries are also covered by this chapter. A complete illustrative example is used to show HetSC and SystemC-AMS cooperation.