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Papers by Mohamed G A Mohamed

Research paper thumbnail of Concurrent Driving Method with Fast Scan Rate for Large Mutual Capacitance Touch Screens

A novel touch screen control technique is introduced, which scans each frame in two steps of conc... more A novel touch screen control technique is introduced, which scans each frame in two steps of concurrent multichannel driving and differential sensing. The proposed technique substantially increases the scan rate and reduces the ambient noise effectively. It is also extended to a multichip architecture to support excessively large touch screens with great scan rate improvement. The proposed method has been implemented using 0.18 í µí¼‡m CMOS TowerJazz process and tested with FPGA and AFE board connecting a 23-inch touch screen. Experimental results show a scan rate improvement of up to 23.8 times and an SNR improvement of 24.6 dB over the conventional method.

Research paper thumbnail of A Fast Sensing Method using Concurrent Driving and Sequential Sensing for Large Capacitance Touch Screens

Recently the demand for projected capacitance touch screens is sharply growing especially for lar... more Recently the demand for projected capacitance touch screens is sharply growing especially for large screens for medical devices, PC monitors and TVs. Large touch screens in general need a controller of higher complexity. They usually have a larger number of driving and sensing lines, and hence it takes longer to scan one frame for touch detection leading to a low frame scan rate. In this paper, a novel touch screen control technique is presented, which scans each frame in two steps of simultaneous multi-channel driving. The first step is to drive all driving lines simultaneously and determine which sensing lines have any touch. The second step is to sequentially rescan only the touched sensing lines, and determine exact positions of the touches. This technique can substantially increase the frame scan rate. This technique has been implemented using an FPGA and an AFE board, and tested using a commercial 23-inch touch screen panel. Experimental results show that the proposed technique improves the frame scan rate by 8.4 times for the 23-inch touch screen panel over conventional methods.

Research paper thumbnail of Voltage Shifting Double Integration Circuit for High Sensing Resolution of Large Capacitive Touch Screen Panels

We propose a new touch screen sensing circuit based on voltage shifting double integration scheme... more We propose a new touch screen sensing circuit based on voltage shifting double integration scheme for large touch screen panels. The proposed circuit increases the sensing resolution by shifting integrated signal, while reducing the detection time by integrating both edges of sense signals. We implemented the proposed technique in FPGA and analog circuit with touch detection software. Experiments show that the proposed circuit improves both the touch performance and frame rate - key requirements for large touch screen controllers.

Research paper thumbnail of Efficient algorithm for accurate touch detection of large touch screen panels

Large mutual capacitance touch screen panels (TSP) are susceptible to display and ambient noise. ... more Large mutual capacitance touch screen panels (TSP) are susceptible to display and ambient noise. This paper presents a multi-touch detection algorithm using an efficient noise compensation technique for large mutual capacitance TSPs. The algorithm starts with a calibration technique to overcome TSP mutual capacitance variation. It also overcomes the shadow effect of a hand close to TSP and mutual capacitance variation by applying dynamic threshold calculations. Time and space filters are also used to filter out noise. Experimental results are used to determine system parameters for best performance.

Research paper thumbnail of Full Adder for High Speed/Low power Arithmetic Circuits: A Comparison

In this paper, interesting full adder circuits are reviewed and compared concerning speed, power ... more In this paper, interesting full adder circuits are reviewed and compared concerning speed, power consumption, and silicon area. A modified full adder is also investigated by combining hybrid logics, namely, pass transistor logic and branch based logic. This architecture uses two independent parts to generate SUM and carry signals. The results show that ultra low power evolution, very small propagation delay and small silicon area have been accomplished by this design comparing with conventional static CMOS full adder circuit. Moreover, implementation of this design into multi-bit adder provides the advantage of eliminating the need for extra inverters, saves much more silicon area, and has ultra small total power dissipation. The investigations have been made using 0.13um CMOS process.

Research paper thumbnail of Two Memristors Memory Cell Using Crossbar Array Structure With CMOS Control Circuitry

Nonvolatile resistive memories are the most suitable choice for low power/high speed portable app... more Nonvolatile resistive memories are the most suitable choice for low power/high speed portable applications. Crossbar array structure is considered to be the best architecture for high integration electronic structures. It supports very large memory size. Therefore this paper proposed a new nonvolatile memory architecture using crossbar array structure based on memristor devices with CMOS control circuitry. This structure support high speed read/write operations within high packing density and low power dissipation. The proposed approach uses only two memristors as a memory cell. Unified CMOS controlling circuitry are used to give the ability to program a complete row in the same time whenever the other rows are completely deactivated. As a consequence, this approach provides static power dissipation prevention with high retention value.

Research paper thumbnail of Exact analytical model of single electron transistor for practical IC design

This paper presents a new exact analytical model for single electron transistor (SET) applicable ... more This paper presents a new exact analytical model for single electron transistor (SET) applicable for circuit simulation. It has been developed based on orthodox theory of single electronics using master equation where a scheme has been suggested to determine the most probable occupied electron states. The proposed model is more flexible and is valid for single or multi-gate, symmetric or asymmetric devices and can also consider the background charge effect. It can be used for large drain–source voltage range whatever the device is biased under symmetric or asymmetric bias conditions. SET characteristics produced by the proposed model have been verified against widely accepted single electron circuits Monte Carlo simulator SIMON and show a good agreement. Moreover, the model has been implemented in a widely used commercial circuit simulator SPICE to enable simulation with conventional electronic elements and a single electron inverter has been simulated and verified with SIMON results.

Research paper thumbnail of New Analytical Model for Single Electron Transistor

This paper presents a new exact analytical model for Single electron transistor (SET) applicable ... more This paper presents a new exact analytical model for Single electron transistor (SET) applicable for circuit simulation. It was developed based on orthodox theory of single electronics using master equation. A scheme was suggested to determine the most probable occupied electron states. The proposed model is more flexible that is valid for single or multi gate, symmetric or asymmetric devices and can also consider the background charge effect. It can be used for large drain-source voltage range whatever the device biased under symmetric or asymmetric bias conditions. SET characteristics produced by the proposed model were verified against widely accepted single electron circuits simulator SIMON and show a good agreement. Also, the proposed model was implemented in a widely used commercial circuit simulator SPICE to enable simulation with conventional electronic elements.

Research paper thumbnail of Efficient Multi-Touch Detection Algorithm for Large Touch Screen Panels

Large mutual capacitance touch screen panels (TSP) are susceptible to display and ambient noise. ... more Large mutual capacitance touch screen panels (TSP) are susceptible to display and ambient noise. This paper presents a multi-touch detection algorithm using an efficient noise compensation technique for large mutual capacitance TSPs. The sources of noise are presented and analyzed. The algorithm includes the steps to overcome each source of noise. The algorithm begins with a calibration technique to overcome the TSP mutual capacitance variation. The algorithm also overcomes the shadow effect of a hand close to TSP and mutual capacitance variation by dynamic threshold calculations. Time and space filters are also used to filter out ambient noise. The experimental results were used to determine the system parameters to achieve the best performance.

Research paper thumbnail of Distributed Architecture of Touch Screen Controller SoC for Large Touch Screen Panels

Currently large touch screen panels (TSP) tend to use projected capacitance technology, which all... more Currently large touch screen panels (TSP) tend to use projected capacitance technology, which allow multi-touch and high sensitivity. For large TSPs with a large number of TX (driving) and RX (sensing) lines, however, it is increasingly challenging to achieve high sensitivity, high detection rate, and multi-touch. In this Paper, we propose a distributed architecture of touch screen controller where multiple controller SoCs collaborate in driving and sensing each section of a large TSP. We show that the proposed architecture and SoC design can increase the detection rate without loss of sensitivity performance. It also allows a smaller SoC implementation, while its chip expandability provides the flexibility of supporting a large range of TSP sizes. We implemented the proposed distributed SoC using TSMC CMOS 0.18um with a low power ARM core, AHB-lite bus, memories, and embedded touch algorithm software.

Research paper thumbnail of Modeling of Memristive and Memcapacitive Behaviors in Metal-Oxide Junctions

Memristive behavior has been clearly addressed through growth and shrinkage of thin filaments in ... more Memristive behavior has been clearly addressed through growth and shrinkage of thin filaments in metal-oxide junctions. Capacitance change has also been observed, raising the possibility of using them as memcapacitors. Therefore, this paper proves that metal-oxide junctions can behave as a memcapacitor element by analyzing its characteristics and modeling its memristive and memcapacitive behaviors. We develop two behavioral modeling techniques: charge-dependent memcapacitor model and voltage-dependent memcapacitor model. A new physical model for metal-oxide junctions is presented based on conducting filaments variations, and its effect on device capacitance and resistance. In this model, we apply the exponential nature of growth and shrinkage of thin filaments and use Simmons’ tunneling equation to calculate the tunneling current. Simulation results show how the variations of practical device parameters can change the device behavior. They clarify the basic conditions for building a memcapacitor device with negligible change in resistance.

Research paper thumbnail of Concurrent Driving Method with Fast Scan Rate for Large Mutual Capacitance Touch Screens

A novel touch screen control technique is introduced, which scans each frame in two steps of conc... more A novel touch screen control technique is introduced, which scans each frame in two steps of concurrent multichannel driving and differential sensing. The proposed technique substantially increases the scan rate and reduces the ambient noise effectively. It is also extended to a multichip architecture to support excessively large touch screens with great scan rate improvement. The proposed method has been implemented using 0.18 í µí¼‡m CMOS TowerJazz process and tested with FPGA and AFE board connecting a 23-inch touch screen. Experimental results show a scan rate improvement of up to 23.8 times and an SNR improvement of 24.6 dB over the conventional method.

Research paper thumbnail of A Fast Sensing Method using Concurrent Driving and Sequential Sensing for Large Capacitance Touch Screens

Recently the demand for projected capacitance touch screens is sharply growing especially for lar... more Recently the demand for projected capacitance touch screens is sharply growing especially for large screens for medical devices, PC monitors and TVs. Large touch screens in general need a controller of higher complexity. They usually have a larger number of driving and sensing lines, and hence it takes longer to scan one frame for touch detection leading to a low frame scan rate. In this paper, a novel touch screen control technique is presented, which scans each frame in two steps of simultaneous multi-channel driving. The first step is to drive all driving lines simultaneously and determine which sensing lines have any touch. The second step is to sequentially rescan only the touched sensing lines, and determine exact positions of the touches. This technique can substantially increase the frame scan rate. This technique has been implemented using an FPGA and an AFE board, and tested using a commercial 23-inch touch screen panel. Experimental results show that the proposed technique improves the frame scan rate by 8.4 times for the 23-inch touch screen panel over conventional methods.

Research paper thumbnail of Voltage Shifting Double Integration Circuit for High Sensing Resolution of Large Capacitive Touch Screen Panels

We propose a new touch screen sensing circuit based on voltage shifting double integration scheme... more We propose a new touch screen sensing circuit based on voltage shifting double integration scheme for large touch screen panels. The proposed circuit increases the sensing resolution by shifting integrated signal, while reducing the detection time by integrating both edges of sense signals. We implemented the proposed technique in FPGA and analog circuit with touch detection software. Experiments show that the proposed circuit improves both the touch performance and frame rate - key requirements for large touch screen controllers.

Research paper thumbnail of Efficient algorithm for accurate touch detection of large touch screen panels

Large mutual capacitance touch screen panels (TSP) are susceptible to display and ambient noise. ... more Large mutual capacitance touch screen panels (TSP) are susceptible to display and ambient noise. This paper presents a multi-touch detection algorithm using an efficient noise compensation technique for large mutual capacitance TSPs. The algorithm starts with a calibration technique to overcome TSP mutual capacitance variation. It also overcomes the shadow effect of a hand close to TSP and mutual capacitance variation by applying dynamic threshold calculations. Time and space filters are also used to filter out noise. Experimental results are used to determine system parameters for best performance.

Research paper thumbnail of Full Adder for High Speed/Low power Arithmetic Circuits: A Comparison

In this paper, interesting full adder circuits are reviewed and compared concerning speed, power ... more In this paper, interesting full adder circuits are reviewed and compared concerning speed, power consumption, and silicon area. A modified full adder is also investigated by combining hybrid logics, namely, pass transistor logic and branch based logic. This architecture uses two independent parts to generate SUM and carry signals. The results show that ultra low power evolution, very small propagation delay and small silicon area have been accomplished by this design comparing with conventional static CMOS full adder circuit. Moreover, implementation of this design into multi-bit adder provides the advantage of eliminating the need for extra inverters, saves much more silicon area, and has ultra small total power dissipation. The investigations have been made using 0.13um CMOS process.

Research paper thumbnail of Two Memristors Memory Cell Using Crossbar Array Structure With CMOS Control Circuitry

Nonvolatile resistive memories are the most suitable choice for low power/high speed portable app... more Nonvolatile resistive memories are the most suitable choice for low power/high speed portable applications. Crossbar array structure is considered to be the best architecture for high integration electronic structures. It supports very large memory size. Therefore this paper proposed a new nonvolatile memory architecture using crossbar array structure based on memristor devices with CMOS control circuitry. This structure support high speed read/write operations within high packing density and low power dissipation. The proposed approach uses only two memristors as a memory cell. Unified CMOS controlling circuitry are used to give the ability to program a complete row in the same time whenever the other rows are completely deactivated. As a consequence, this approach provides static power dissipation prevention with high retention value.

Research paper thumbnail of Exact analytical model of single electron transistor for practical IC design

This paper presents a new exact analytical model for single electron transistor (SET) applicable ... more This paper presents a new exact analytical model for single electron transistor (SET) applicable for circuit simulation. It has been developed based on orthodox theory of single electronics using master equation where a scheme has been suggested to determine the most probable occupied electron states. The proposed model is more flexible and is valid for single or multi-gate, symmetric or asymmetric devices and can also consider the background charge effect. It can be used for large drain–source voltage range whatever the device is biased under symmetric or asymmetric bias conditions. SET characteristics produced by the proposed model have been verified against widely accepted single electron circuits Monte Carlo simulator SIMON and show a good agreement. Moreover, the model has been implemented in a widely used commercial circuit simulator SPICE to enable simulation with conventional electronic elements and a single electron inverter has been simulated and verified with SIMON results.

Research paper thumbnail of New Analytical Model for Single Electron Transistor

This paper presents a new exact analytical model for Single electron transistor (SET) applicable ... more This paper presents a new exact analytical model for Single electron transistor (SET) applicable for circuit simulation. It was developed based on orthodox theory of single electronics using master equation. A scheme was suggested to determine the most probable occupied electron states. The proposed model is more flexible that is valid for single or multi gate, symmetric or asymmetric devices and can also consider the background charge effect. It can be used for large drain-source voltage range whatever the device biased under symmetric or asymmetric bias conditions. SET characteristics produced by the proposed model were verified against widely accepted single electron circuits simulator SIMON and show a good agreement. Also, the proposed model was implemented in a widely used commercial circuit simulator SPICE to enable simulation with conventional electronic elements.

Research paper thumbnail of Efficient Multi-Touch Detection Algorithm for Large Touch Screen Panels

Large mutual capacitance touch screen panels (TSP) are susceptible to display and ambient noise. ... more Large mutual capacitance touch screen panels (TSP) are susceptible to display and ambient noise. This paper presents a multi-touch detection algorithm using an efficient noise compensation technique for large mutual capacitance TSPs. The sources of noise are presented and analyzed. The algorithm includes the steps to overcome each source of noise. The algorithm begins with a calibration technique to overcome the TSP mutual capacitance variation. The algorithm also overcomes the shadow effect of a hand close to TSP and mutual capacitance variation by dynamic threshold calculations. Time and space filters are also used to filter out ambient noise. The experimental results were used to determine the system parameters to achieve the best performance.

Research paper thumbnail of Distributed Architecture of Touch Screen Controller SoC for Large Touch Screen Panels

Currently large touch screen panels (TSP) tend to use projected capacitance technology, which all... more Currently large touch screen panels (TSP) tend to use projected capacitance technology, which allow multi-touch and high sensitivity. For large TSPs with a large number of TX (driving) and RX (sensing) lines, however, it is increasingly challenging to achieve high sensitivity, high detection rate, and multi-touch. In this Paper, we propose a distributed architecture of touch screen controller where multiple controller SoCs collaborate in driving and sensing each section of a large TSP. We show that the proposed architecture and SoC design can increase the detection rate without loss of sensitivity performance. It also allows a smaller SoC implementation, while its chip expandability provides the flexibility of supporting a large range of TSP sizes. We implemented the proposed distributed SoC using TSMC CMOS 0.18um with a low power ARM core, AHB-lite bus, memories, and embedded touch algorithm software.

Research paper thumbnail of Modeling of Memristive and Memcapacitive Behaviors in Metal-Oxide Junctions

Memristive behavior has been clearly addressed through growth and shrinkage of thin filaments in ... more Memristive behavior has been clearly addressed through growth and shrinkage of thin filaments in metal-oxide junctions. Capacitance change has also been observed, raising the possibility of using them as memcapacitors. Therefore, this paper proves that metal-oxide junctions can behave as a memcapacitor element by analyzing its characteristics and modeling its memristive and memcapacitive behaviors. We develop two behavioral modeling techniques: charge-dependent memcapacitor model and voltage-dependent memcapacitor model. A new physical model for metal-oxide junctions is presented based on conducting filaments variations, and its effect on device capacitance and resistance. In this model, we apply the exponential nature of growth and shrinkage of thin filaments and use Simmons’ tunneling equation to calculate the tunneling current. Simulation results show how the variations of practical device parameters can change the device behavior. They clarify the basic conditions for building a memcapacitor device with negligible change in resistance.