mostafa katebi - Academia.edu (original) (raw)
Papers by mostafa katebi
2023 Seventh International Conference on Advances in Biomedical Engineering (ICABME)
This paper presents a low-power Voltage Controlled Oscillator based on an NMOS Cross-Coupled pair... more This paper presents a low-power Voltage Controlled Oscillator based on an NMOS Cross-Coupled pair and PMOS Colpitts structure for K-band applications. The advantages of this work consist of low phase noise and robust start-up condition, leading to minimized dc power. The proposed circuit is simulated in pmb0.18mutextm\pmb{0.18 \mu \text{m}}pmb0.18mutextm CMOS process. The designed VCO covers the frequency range of 23.9 GHz to 24.6 GHz with a tuning range of 2.9%. Simulation results show that the phase noise of designed VCO is −104.9 dBc/Hz at IMHz offset frequency for 24.1GHz carrier frequency, and its power consumption is 2.4 mW under 1 V supply voltage, and the figure-of-merit is −188.73 dBc/Hz.
2019 5th Conference on Knowledge Based Engineering and Innovation (KBEI), Feb 1, 2019
This paper presents a voltage controlled oscillator (VCO) with triple-coupling LC tank. The propo... more This paper presents a voltage controlled oscillator (VCO) with triple-coupling LC tank. The proposed circuit has been designed in TSMC 0.18µm CMOS technology with a power supply of 1.6 V. The VCO achieves an oscillation frequency range from 13.95 to 15.03 GHz while the power consumption is 7.26 mW. The simulated VCO demonstrates a phase noise of −114.5 dBc/Hz at 1 MHz offset from 14.49 GHz carrier and figure of merit of −189.65 dBc/Hz.
International Journal of Circuit Theory and Applications, Oct 31, 2022
This paper presents a programmable neurostimulator 4 Â V DD with 7.2 V operating voltage in a 0.1... more This paper presents a programmable neurostimulator 4 Â V DD with 7.2 V operating voltage in a 0.18-μm/1.8 V CMOS process. The output voltage compliance exceeds 6.2 V. A current gain control is designed to adjust bias current. A 5-bit current mode digital-to-analog converter (DAC) is used to set delivered current in current driver. A high output impedance current mirror is designed to guarantee charge balancing. The charge mismatch after biphasic stimulation is about 0.14%. Moreover, current mirrors are turned off after stimulation to decrease power consumption. The headroom voltage is about 1 V for all the voltage drivers and the current mirrors. The proposed neurostimulator occupies 0.95 Â 0.95 mm 2 with a maximum current range of 0-2000 μA and a power consumption less than 60 μW.
2022 Iranian International Conference on Microelectronics (IICM)
International Journal of Circuit Theory and Applications
This paper presents a programmable neurostimulator 4 Â V DD with 7.2 V operating voltage in a 0.1... more This paper presents a programmable neurostimulator 4 Â V DD with 7.2 V operating voltage in a 0.18-μm/1.8 V CMOS process. The output voltage compliance exceeds 6.2 V. A current gain control is designed to adjust bias current. A 5-bit current mode digital-to-analog converter (DAC) is used to set delivered current in current driver. A high output impedance current mirror is designed to guarantee charge balancing. The charge mismatch after biphasic stimulation is about 0.14%. Moreover, current mirrors are turned off after stimulation to decrease power consumption. The headroom voltage is about 1 V for all the voltage drivers and the current mirrors. The proposed neurostimulator occupies 0.95 Â 0.95 mm 2 with a maximum current range of 0-2000 μA and a power consumption less than 60 μW.
Majlesi Journal of Electrical Engineering, 2018
This paper presents a wide tuning range, and low noise voltage controlled oscillator (VCO) based ... more This paper presents a wide tuning range, and low noise voltage controlled oscillator (VCO) based on cross-coupled and colpitts structures. The advantages of this work provide a low-phase noise and robust start-up condition, leading to minimized the dc power. In addition, a new structure of capacitor bank is used in this structure to achieve a wide range of frequency. The proposed circuit is simulated in 0.18 µm CMOS process. The designed VCO covers the frequency range of 21.95 GHz to 24 GHz with a tuning range of 8.9%. Simulation results show that the phase noise is -120.5 dBc/Hz at 1MHz offset frequency for 23GHz carrier frequency. Also, power consume of the VCO is 6.34 mW under 1.8 supply voltage, and the figure-of-merit is -191.68 dBc/Hz.
Electrical Engineering (ICEE), Iranian Conference on, 2018
This paper presents a low-power Voltage Controlled Oscillator based on an NMOS Cross-Coupled pair... more This paper presents a low-power Voltage Controlled Oscillator based on an NMOS Cross-Coupled pair and PMOS Colpitts structure for K-band applications. The advantages of this work consist of low phase noise and robust start-up condition, leading to minimized dc power. The proposed circuit is simulated in pmb0.18mutextm\pmb{0.18 \mu \text{m}}pmb0.18mutextm CMOS process. The designed VCO covers the frequency range of 23.9 GHz to 24.6 GHz with a tuning range of 2.9%. Simulation results show that the phase noise of designed VCO is −104.9 dBc/Hz at IMHz offset frequency for 24.1GHz carrier frequency, and its power consumption is 2.4 mW under 1 V supply voltage, and the figure-of-merit is −188.73 dBc/Hz.
International Journal of Engineering, 2019
This paper presents a temperature compensation voltage controlled oscillator (VCO) based on Cross... more This paper presents a temperature compensation voltage controlled oscillator (VCO) based on Cross-Coupled pair and Colpitts structures which is suitable for military fields. Also, two inductors have been used for increasing the negative conductance. By using this method, start-up condition has been improved. Two varactors and a simple capacitor bank are applied for covering a wide tunning range. The VCO has been designed and simulated in TSMC 0.18 µm CMOS technology.To compensate the frequency drift over a temperature range, MOS varactors are used and biased with a complementary to absolute temperature (CTAT) voltage reference. This CTAT voltage reference has been applied to two varactors and decreased the frequncy drift over temperature range. By using this technique, the proposed VCO can achieve a very stable frequency of 11.5 PPM/°C at 24.35 GHz over a temperature range of -40~120 °C. Simulation results also show the VCO covers the frequency range of 23.75~24.8 GHz. The simulated...
2019 5th Conference on Knowledge Based Engineering and Innovation (KBEI)
2023 Seventh International Conference on Advances in Biomedical Engineering (ICABME)
This paper presents a low-power Voltage Controlled Oscillator based on an NMOS Cross-Coupled pair... more This paper presents a low-power Voltage Controlled Oscillator based on an NMOS Cross-Coupled pair and PMOS Colpitts structure for K-band applications. The advantages of this work consist of low phase noise and robust start-up condition, leading to minimized dc power. The proposed circuit is simulated in pmb0.18mutextm\pmb{0.18 \mu \text{m}}pmb0.18mutextm CMOS process. The designed VCO covers the frequency range of 23.9 GHz to 24.6 GHz with a tuning range of 2.9%. Simulation results show that the phase noise of designed VCO is −104.9 dBc/Hz at IMHz offset frequency for 24.1GHz carrier frequency, and its power consumption is 2.4 mW under 1 V supply voltage, and the figure-of-merit is −188.73 dBc/Hz.
2019 5th Conference on Knowledge Based Engineering and Innovation (KBEI), Feb 1, 2019
This paper presents a voltage controlled oscillator (VCO) with triple-coupling LC tank. The propo... more This paper presents a voltage controlled oscillator (VCO) with triple-coupling LC tank. The proposed circuit has been designed in TSMC 0.18µm CMOS technology with a power supply of 1.6 V. The VCO achieves an oscillation frequency range from 13.95 to 15.03 GHz while the power consumption is 7.26 mW. The simulated VCO demonstrates a phase noise of −114.5 dBc/Hz at 1 MHz offset from 14.49 GHz carrier and figure of merit of −189.65 dBc/Hz.
International Journal of Circuit Theory and Applications, Oct 31, 2022
This paper presents a programmable neurostimulator 4 Â V DD with 7.2 V operating voltage in a 0.1... more This paper presents a programmable neurostimulator 4 Â V DD with 7.2 V operating voltage in a 0.18-μm/1.8 V CMOS process. The output voltage compliance exceeds 6.2 V. A current gain control is designed to adjust bias current. A 5-bit current mode digital-to-analog converter (DAC) is used to set delivered current in current driver. A high output impedance current mirror is designed to guarantee charge balancing. The charge mismatch after biphasic stimulation is about 0.14%. Moreover, current mirrors are turned off after stimulation to decrease power consumption. The headroom voltage is about 1 V for all the voltage drivers and the current mirrors. The proposed neurostimulator occupies 0.95 Â 0.95 mm 2 with a maximum current range of 0-2000 μA and a power consumption less than 60 μW.
2022 Iranian International Conference on Microelectronics (IICM)
International Journal of Circuit Theory and Applications
This paper presents a programmable neurostimulator 4 Â V DD with 7.2 V operating voltage in a 0.1... more This paper presents a programmable neurostimulator 4 Â V DD with 7.2 V operating voltage in a 0.18-μm/1.8 V CMOS process. The output voltage compliance exceeds 6.2 V. A current gain control is designed to adjust bias current. A 5-bit current mode digital-to-analog converter (DAC) is used to set delivered current in current driver. A high output impedance current mirror is designed to guarantee charge balancing. The charge mismatch after biphasic stimulation is about 0.14%. Moreover, current mirrors are turned off after stimulation to decrease power consumption. The headroom voltage is about 1 V for all the voltage drivers and the current mirrors. The proposed neurostimulator occupies 0.95 Â 0.95 mm 2 with a maximum current range of 0-2000 μA and a power consumption less than 60 μW.
Majlesi Journal of Electrical Engineering, 2018
This paper presents a wide tuning range, and low noise voltage controlled oscillator (VCO) based ... more This paper presents a wide tuning range, and low noise voltage controlled oscillator (VCO) based on cross-coupled and colpitts structures. The advantages of this work provide a low-phase noise and robust start-up condition, leading to minimized the dc power. In addition, a new structure of capacitor bank is used in this structure to achieve a wide range of frequency. The proposed circuit is simulated in 0.18 µm CMOS process. The designed VCO covers the frequency range of 21.95 GHz to 24 GHz with a tuning range of 8.9%. Simulation results show that the phase noise is -120.5 dBc/Hz at 1MHz offset frequency for 23GHz carrier frequency. Also, power consume of the VCO is 6.34 mW under 1.8 supply voltage, and the figure-of-merit is -191.68 dBc/Hz.
Electrical Engineering (ICEE), Iranian Conference on, 2018
This paper presents a low-power Voltage Controlled Oscillator based on an NMOS Cross-Coupled pair... more This paper presents a low-power Voltage Controlled Oscillator based on an NMOS Cross-Coupled pair and PMOS Colpitts structure for K-band applications. The advantages of this work consist of low phase noise and robust start-up condition, leading to minimized dc power. The proposed circuit is simulated in pmb0.18mutextm\pmb{0.18 \mu \text{m}}pmb0.18mutextm CMOS process. The designed VCO covers the frequency range of 23.9 GHz to 24.6 GHz with a tuning range of 2.9%. Simulation results show that the phase noise of designed VCO is −104.9 dBc/Hz at IMHz offset frequency for 24.1GHz carrier frequency, and its power consumption is 2.4 mW under 1 V supply voltage, and the figure-of-merit is −188.73 dBc/Hz.
International Journal of Engineering, 2019
This paper presents a temperature compensation voltage controlled oscillator (VCO) based on Cross... more This paper presents a temperature compensation voltage controlled oscillator (VCO) based on Cross-Coupled pair and Colpitts structures which is suitable for military fields. Also, two inductors have been used for increasing the negative conductance. By using this method, start-up condition has been improved. Two varactors and a simple capacitor bank are applied for covering a wide tunning range. The VCO has been designed and simulated in TSMC 0.18 µm CMOS technology.To compensate the frequency drift over a temperature range, MOS varactors are used and biased with a complementary to absolute temperature (CTAT) voltage reference. This CTAT voltage reference has been applied to two varactors and decreased the frequncy drift over temperature range. By using this technique, the proposed VCO can achieve a very stable frequency of 11.5 PPM/°C at 24.35 GHz over a temperature range of -40~120 °C. Simulation results also show the VCO covers the frequency range of 23.75~24.8 GHz. The simulated...
2019 5th Conference on Knowledge Based Engineering and Innovation (KBEI)