samir dahmani - Academia.edu (original) (raw)

Papers by samir dahmani

International Journal of Microwave and Wireless Technologies, Feb 1, 2010

This work presents a measurement-based physics-oriented large-signal modeling technique for GaN H... more This work presents a measurement-based physics-oriented large-signal modeling technique for GaN HEMTs. All the model elements are derived directly from pulsed-DC measurements and bias dependent small-signal model elements. The proposed small-signal model features a 12-element extrinsic network, which allows proper modeling of the complex parasitic effects present in large gate-width devices. A reliable generally applicable extrinsic extraction algorithm is presented. It is based on pinch-off S-parameter measurements and on a scanning procedure to find the optimal capacitance distribution. Results of applying the algorithm with measured data of a GaN HEMT with gate width of 3.2-mm prove the consistency of the formulation. Successful model verification is shown under pulsed-DC, single- and two-tone operations, showing accurate predictions versus measurements of IDS, Pout, gain, harmonics and IMD products.

I wish to express my sincere and deep gratitude to my supervisor Prof. Dr.-Ing. G. Kompa, for sup... more I wish to express my sincere and deep gratitude to my supervisor Prof. Dr.-Ing. G. Kompa, for supporting me and giving me the opportunity to carry out this research work at the Department of Microwaves Electronics (MiCEL) (formerly, High Frequency Engineering-HFT), University of Kassel. His moral, intellectual guidance and advices during the course of this work has been inspiring. I am indebted to Prof. Dr.-Ing. A. Bangert, for his continuous support and help during the thesis achievements, and for accepting to be my second examiner. Also, I am grateful to Prof. Dr. J. Börcsök and Prof. Dr. B. Witzigmann for their acceptance to evaluate this work and being members in the disputation committee. Special thank goes to Dr. M. Djebari for his support and help during the achievement of this work. My sincere thanks are directed to my colleagues, Mr.

IEEE Access

In this paper, we introduce an accurate, efficient, and optimized design and implementation of a ... more In this paper, we introduce an accurate, efficient, and optimized design and implementation of a Gaussian pseudo random number generator (PRNG) on a field-programmable gate array (FPGA) platform. A second-order segmented Box-Muller (S 2 BM) transformation is proposed as an alternative approach to our previously presented segmented Box-Muller (S-BM) transformation. S 2 BM transformation targets two goals simultaneously: enhancing accuracy and improving efficiency by introducing two new upgrades to the S-BM transformation. The first upgrade was performed by splitting each segment into two parts, the body and tail, using two different Box-Muller (BM) transformation steps. The second upgrade was made by producing two uncorrelated samples per clock cycle with small additional FPGA logic. The achieved FPGA implementation scores prove that the designed 19-bit S 2 BM Gaussian PRNG generator offers an improvement of 21% and 29% in efficiency over the S-BM within the ranges of ±7.81σ and ±9.561σ respectively, when implemented on the cost-optimized Xilinx Spartan-6 devices (XC6SLX75T). An improvement of 86% and 149% in efficiency are obtained respectively, over the Central Limit Theorem (CTL) Hadamard transformation and the Multihat transformation. Furthermore, the obtained results and performance confirmed the superiority of the S 2 BM transformation in terms of accuracy and efficiency compared with the existing GRN generator architectures. INDEX TERMS Box-Muller transformation, field-programmable gate array (FPGA), Gaussian distribution, random number generation. I. INTRODUCTION Gaussian Random Number Generator (GRNG) algorithms and architectures are widely used in a large array of advanced computing techniques such as artificial intelligence (AI), cryptography, Monte Carlo algorithms for channel decoding and modeling, radio-frequency identification (RFID), and financial modeling. The common use of Gaussian random numbers in these processes requires specific GRNG The associate editor coordinating the review of this manuscript and approving it for publication was Ilaria De Munari. properties. Several solutions have been implemented in recent decades. These implementation features differ significantly in terms of the computational complexity, logic utilization, frequency, and accuracy. GRNG can be classified into two main sets, the pseudo random number generator PRNG and the true random number generator TRNG as in [1], [2], and [3]. Furthermore, PRNG can be separated as non-chaotic or chaotic type as in [4], [5], and [6]. Therefore, no unique or ideal approach exists. Each associated algorithm presents benefits, characteristics, and applications. Most PRNG approaches require the creation of a uniform random

IET Circuits, Devices & Systems, 2021

This paper proposes an efficient high-order finite impulse response (FIR) filter structure for fi... more This paper proposes an efficient high-order finite impulse response (FIR) filter structure for field programmable gate array (FPGA)-based applications with simultaneous digital signal processing (DSP) and look-up-table (LUT) reduced utilization. The real-time updating of the filter coefficients is also put into perspective. In order to perform these objectives, both the speed and the structure of FPGA are efficiently exploited. The gap between the required input sampling frequency and the FPGA allowed maximum frequency is managed to achieve additional computing sequences. Furthermore, the special structures of the FPGA Look-up-table Shift-Register (LUT-SR) and their internal connections are fully employed for pipelining and selecting the input samples. The FPGA Block RAMs (BRAMs) are employed for handling the reconfigurable filter coefficients, and the FPGA DSP slices are associated for computing the output data of the BRAMs and the multiplexers. To synchronize the BRAM unit addressing with the LUT multiplexer selection, a single unit is used for simultaneous control. The obtained results show that the proposed reconfigurable 16tap FIR filter offers reductions of 79.3% and 74.4% of slice utilization over the hybrid variable size partitioning (VP-Hybrid) based structure and the Radix-2 r based structure, respectively when implemented on a Xilinx Spartan-6 XC6SLX45 FPGA. Moreover, an improvement of efficiency is achieved compared to all reputed FPGA-based architectures. This is an open access article under the terms of the Creative Commons Attribution License, which permits use, distribution and reproduction in any medium, provided the original work is properly cited.

International Journal of Electronics Letters, 2021

2021 IEEE 12th Annual Information Technology, Electronics and Mobile Communication Conference (IEMCON), 2021

This paper presents an efficient Box-Muller GRNG (Gaussian Random Number Generator) structure to ... more This paper presents an efficient Box-Muller GRNG (Gaussian Random Number Generator) structure to reduce the FPGA (Field Programmable Gate Array) logic utilization. The proposed approach is mainly targeting communication applications. We focus on optimizing the throughput. The FPGA Block RAMs (BRAMs) are associated to multiplexer for reducing the required memory size and producing the Box-Muller logarithmic function. The uniform random variables and the multiplexer selector are produced by an LFSR (Linear Feedback Shift Register) based unit. According to this approach, we can reduce the required memory size along with keeping the conventional accuracy. A Xilinx FPGA device is used for validation. The obtained results show that the proposed Box-Muller GRNG structure offers reductions of memory size from 4M to 6K and from 8G to 10K for tail of 5.52σ and 7.81σ, respectively when implemented on a Xilinx FPGA device. Furthermore, a similar high accuracy for the conventional Box-Muller GRNG is achieved with a reduced FPGA slice utilization.

Self-heating is known to affect greatly the performance of power devices. In the past, several me... more Self-heating is known to affect greatly the performance of power devices. In the past, several methods were developed to estimate the average channel temperature of FETs. Some of these methods are based on approximate closed form expressions. These techniques give acceptable results under limited conditions and only for specific device layouts. In this proposed work, we present an accurate method for the extraction of the thermal profile of large-size power AlGaN/GaN HEMTs using the FEM. The thermal investigation of the complete structure of the device permits an accurate calculation of the distributed device temperature taking into account the temperature dependence of the thermal conductivities of the different layers in the HEMT structure. This analysis also helps device designers in tuning of structureÂ¿s physical and geometrical parameters. The thermal resistances under each finger and of the whole FET structure are calculated. Using this procedure, we have succeeded in estimat...

2008 European Microwave Integrated Circuit Conference, 2008

ABSTRACT Self-heating has a large effect on electrical performance of RF power devices. In the pa... more ABSTRACT Self-heating has a large effect on electrical performance of RF power devices. In the past, several methods were developed to estimate the average channel temperature of FETs. Some of these are based on approximate closed form expressions. These techniques give acceptable results under limited conditions and only for specific device layouts. In this proposed work, we present an accurate method for the extraction of the thermal profile of large-size AlGaN/GaN HEMTs using both Finite Element Method (FEM) simulation and measurement techniques. The thermal investigation of the complete structure of the device permits an accurate calculation of the distributed device temperature taking into account the temperature dependence of the thermal conductivities. This analysis also helps device designers tuning physical and geometrical parameters of the structure. The thermal resistances and the thermal time constants under each finger and of the whole FET structure are calculated from static and transient FEM thermal simulations, respectively. Alternatively, the thermal time constant is also determined from drain current transient measurements. Using this procedure, we obtained detailed thermal profile for AlGaN/GaN HEMT and implemented the resulting thermal sub-circuit in the large-signal model of GaN HEMTs. The simulated static and transient I(V) characteristics of the large-signal model are in good agreement with the measured data.