Sadiq M Sait | King Fahd University of Petroleum and Minerals (original) (raw)

Papers by Sadiq M Sait

Proceedings of the 2002 Congress on Evolutionary Computation. CEC'02 (Cat. No.02TH8600), 2002

Parallelizing any algorithm on cluster of heterogeneous workstations is not easy, as each worksta... more Parallelizing any algorithm on cluster of heterogeneous workstations is not easy, as each workstation requires different wall clock time to execute the same instruction set. In this work, a parallel tabu search algorithm for heterogeneous workstations is presented using PVM. Two parallelization strategies, i.e., functional decomposition and multi-search thread strategies are integrated. The proposed algorithm is tested on VLSI standard cell placement problem, however, the same algorithm can be used on any combinatorial optimization problem. The results are compared ignoring heterogeneity and are found to be superior in terms of execution time.

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2017

With fabrication technology reaching nanolevels, systems are becoming more prone to manufacturing... more With fabrication technology reaching nanolevels, systems are becoming more prone to manufacturing defects with higher susceptibility to soft errors. This paper is focused on designing combinational circuits for soft error tolerance with minimal area overhead. The idea is based on analyzing random pattern testability of faults in a circuit and protecting sensitive transistors, whose soft error detection probability is relatively high, until desired circuit reliability is achieved or a given area overhead constraint is met. Transistors are protected based on duplicating and sizing a subset of transistors necessary for providing the protection. In addition to that, a novel gate-level reliability evaluation technique is proposed that provides similar results to reliability evaluation at the transistor level (using SPICE) with the orders of magnitude reduction in CPU time. LGSynth'91 benchmark circuits are used to evaluate the proposed algorithm. Simulation results show that the proposed algorithm achieves better reliability than other transistor sizing-based techniques and the triple modular redundancy technique with significantly lower area overhead for 130-nm process technology at a ground level.

Computers & Electrical Engineering, 2015

A major optimization problem in the synthesis of sequential circuits is State Assignment or State... more A major optimization problem in the synthesis of sequential circuits is State Assignment or State Encoding in Finite State Machines (FSMs). The state assignment of an FSM determines the complexity of its combinational circuit and thus area, delay, testability and power dissipation. Since optimal state assignment is an NP-hard problem and existing deterministic algorithms produce solutions far from best known solutions, we resort to the use of non-deterministic iterative optimization heuristics. This paper proposes the use of cuckoo search optimization (CSO) algorithm for solving the state assignment problem (SAP) of FSMs with the aim of minimizing area of the resulting sequential circuit. Results obtained from the CSO algorithm are compared with those obtained from binary particle swarm optimization (BPSO) algorithm, genetic algorithm (GA), and the well-known deterministic methods of NOVA and JEDI. The results indicate that CSO outperforms deterministic methods as well as other non-deterministic heuristic optimization methods.

Lecture Notes in Computer Science, 2005

In this paper, we present a parallel tabu search (TS) algorithm for efficient optimization of a c... more In this paper, we present a parallel tabu search (TS) algorithm for efficient optimization of a constrained multiobjective VLSI standard cell placement problem. The primary purpose is to accelerate TS algorithm to reach near optimal placement solutions for large circuits. The proposed technique employs a candidate list partitioning strategy based on distribution of mutually disjoint set of moves among the slave processes. The implementation is carried out on a dedicated cluster of workstations. Experimental results using ISCAS-85/89 benchmark circuits illustrating quality and speedup trends are presented. A comparison of the obtained results is made with the results of a parallel genetic algorithm (GA) implementation.

Proceedings of the 1999 Congress on Evolutionary Computation-CEC99 (Cat. No. 99TH8406)

A fuzzy simulated evolution algorithm is presented for multi-objective minimization of VLSI cell ... more A fuzzy simulated evolution algorithm is presented for multi-objective minimization of VLSI cell placement problem. We propose a fuzzy goal-based search strategy combined with a fuzzy allocation scheme. The allocation scheme tries to minimize multiple objectives and adds controlled randomness as opposed to original deterministic allocation schemes. Experiments with benchmark tests demonstrate a noticeable improvement in solution quality

ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196), 2001

With limited frequency spectrum and an increasing demand for mobile communication services, the p... more With limited frequency spectrum and an increasing demand for mobile communication services, the problem of channel assignment becomes increasingly important. It has been shown that this problem is equivalent to the graph-coloring problem, which is an NP-hard problem. In this work, a fast constructive algorithm is introduced to solve the problem. The objective of the algorithm is to obtain a conflict free channel assignment to cells which satisfies traffic demand requirements. The algorithm was tested on several benchmark problems, and conflict free results were obtained a within one second. Moreover, the quality of solution obtained was always same or better than the other reported techniques

Proceedings of the 2002 Congress on Evolutionary Computation. CEC'02 (Cat. No.02TH8600), 2002

We engineer a well-known optimization technique namely Tabu Search (TS) [1] for the performance a... more We engineer a well-known optimization technique namely Tabu Search (TS) [1] for the performance and low power driven VLSI standard cell placement problem [2], [3]. The above problem is of multiobjective nature since three possibly conflicting objectives are considered to be optimized subject to the constraint of layout width. These objectives are power dissipation, timing performance, and interconnect wire length. It is well known that optimizing cell placement for even a single objective namely total wire length a hard problem to solve. Due to imprecise nature of objective values, fuzzy logic is incorporated in the design of aggregating function. The above technique is applied to the placement of ISCAS-89 benchmark circuits and the results are compared with Adaptive-bias Simulated Evolution (SimE) approach reported in [4]. The comparison shows a significant improvement over the SimE approach.

JOURNAL OF HEURISTICS, 2002

In this paper, we present the parallelization of tabu search on a network of workstations using P... more In this paper, we present the parallelization of tabu search on a network of workstations using PVM. Two parallelization strategies are integrated: functional decomposition strategy and multi-search threads strategy. In addition, domain decomposition strategy is implemented probabilistically. The performance of each strategy is observed and analyzed. The goal of parallelization is to speedup the search in finding better quality solutions. Observations support that both parallelization strategies are beneficial, with functional decomposition producing slightly better results. Experiments were conducted for the VLSI cell placement, an NP-hard problem, and the objective was to achieve the best possible solution in terms of interconnection length, timing performance (circuit speed), and area. The multiobjective nature of this problem is addressed using a fuzzy goal-based cost computation.

2002 IEEE World Congress on Computational Intelligence. 2002 IEEE International Conference on Fuzzy Systems. FUZZ-IEEE'02. Proceedings (Cat. No.02CH37291), 2002

When fuzzy logic is used with multi-objective optimization, min/max operators may not be desirabl... more When fuzzy logic is used with multi-objective optimization, min/max operators may not be desirable. This is primarily due to the lack of compensation/submission of min/max. To overcome this, ordered weighted averaging (OWA) operators were proposed by R.R. Yager (1988). OWA requires the selection of a control parameter , which is different for different problem instances. In this paper, we propose new fuzzy aggregating functions that simulate the fuzzy AND/OR logic and that have the advantages of OWA without the need of any control parameter. A comparison with OWA for VLSI cell placement using simulated evolution produced encouraging results

Proceedings 2001 IEEE International Conference on Computer Design: VLSI in Computers and Processors. ICCD 2001

In this paper; we employ fuzzifed simulated evolution and stochastic evolution algorithms for VLS... more In this paper; we employ fuzzifed simulated evolution and stochastic evolution algorithms for VLSI.standard cell placement targeting low power dissipation and high pegorniance. Due to the iniprecise nature of design information at the placement stage, the various objectives and constraints are expressed in fuzzy domain. The search is made to evolve towards a vector of fuzzy goals. The proposed algorithms are compared with genetic algorithm.

IJCNN'01. International Joint Conference on Neural Networks. Proceedings (Cat. No.01CH37222)

In this paper, an algorithm for VLSI standard cell placement for low power and high performance d... more In this paper, an algorithm for VLSI standard cell placement for low power and high performance design is presented. This is a hard multiobjective combinatorial optimization problem with no known exact and efficient algorithm that can guarantee finding a solution of specific or desirable quality. Approximation iterative heuristics such as Simulated Evolution (SE) are best suited to perform an intelligent search of the solution space. S E comprises three steps, evaluation, selection and allocation. Due to imprecise nature of design information at the placement stage, the various objectives and constraints are expressed in fuzzy domain. The search is made to evolve towards a vector of fuzzy goals. I n this work, a new method to calculate membership in evaluation stage is proposed. Selection stage is also fuzzified and a new controlled fuzzy operator is introduced. The proposed heuristic is compared with Genetic Algorithm (G A) and the proposed fuzzy operator is compared with fuzzy ordered weighted averaging operator (0 WA). Fuzzified S E (FSE) with controlled fuzzy operators was able to achieve better solutions.

IJCNN'01. International Joint Conference on Neural Networks. Proceedings (Cat. No.01CH37222), 2001

10th IEEE International Conference on Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003

In this paper we, present a new heuristic called PowerFM which is a modification of the well-know... more In this paper we, present a new heuristic called PowerFM which is a modification of the well-known Fidducia Mattheyeses algorithm for VLSI netlist partitioning. PowerFM considers the minimization of power consumption due to the nets cut. The advantages of using PowerFM as an initial solution generator for other iterative algorithms, in panicular Genetic Algorithm (GA) and Tabu Search (TS), for multiobjective optimization is investigated. A series of experiments are conducted on ISCAS-85/89 benchmark circuits to evaluate the efficiency of the PawerFM algorithm. Results suggest that this heuristic would provide a good starting solution for multiobjective optimization using iterative algorithms.

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03.

The problem of partitioning appears in several areas ranging from VLSI, parallel programming, to ... more The problem of partitioning appears in several areas ranging from VLSI, parallel programming, to molecular biology. The interest in finding an optimal partition especially in VLSI has been a hot issue in recent years. In VLSI circuit partitioning, the problem of obtaining a minimum cut is of prime importance. With current trends, partitioning with multiple objectives which includes power, delay and area, in addition to minimum cut is in vogue. In this paper, we engineer two iterative heuristics for the optimization of VLSI netlist bi-Partitioning. These heuristics are based on Genetic Algorithms (GAs) and Tabu Search (TS) and incorporate fuzzy rules in order to handle the multiobjective cost function. Both heuristics are applied to ISCAS-85/89 benchmark circuits and experimental results are reported and compared.

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03.

In this paper, the Simulated Evolution algorithm (SimE) is engineered to solve the optimization p... more In this paper, the Simulated Evolution algorithm (SimE) is engineered to solve the optimization problem of multi-objective VLSI netlist bi-partitioning. The multi-objective version of the problem is addressed in which, power dissipation, timing performance, as well as cut-set are optimized while Balance is taken as a constraint. Fuzzy rules are used in order to design the overall multiobjective cost function that integrates the costs of three objectives in a single overall cost value. Fuzzy goodness functions are designed for delay and power, and proved efficient. A series of experiments are performed to evaluate the efficiency of the algorithm. ISCAS-85/89 benchmark circuits are used and experimental results are reported and compared to earlier algorithms like GA and TS.

Proceedings of the 2005 conference on Genetic and evolutionary computation - GECCO '05, 2005

Genetic Algorithms have worked fairly well for the VLSI cell placement problem, albeit with signi... more Genetic Algorithms have worked fairly well for the VLSI cell placement problem, albeit with significant run times. Two parallel models for GA are presented for VLSI cell placement where the objectives are optimizing power dissipation, timing performance and interconnect wirelength, while layout width is a constraint. A Master-Slave approach is mentioned wherein both fitness calculation and crossover mechanism are distributed among slaves. A Multi-Deme parallel GA is also presented in which each processor works independently on an allocated subpopulation followed by information exchange through migration of chromosomes. A pseudo-diversity approach is taken, wherein similar solutions with the same overall cost values are not permitted in the population at any given time. A series of experiments are performed on ISCAS-85/89 benchmarks to show the performance of the Multi-Deme approach.

Seventh International Conference on Intelligent Systems Design and Applications (ISDA 2007), 2007

This paper discusses the parallelization of Stochastic Evolution (StocE) metaheuristic, for a dis... more This paper discusses the parallelization of Stochastic Evolution (StocE) metaheuristic, for a distributed parallel environment. VLSI cell placement is used as an optimization problem. A comprehensive set of parallelization approaches are tested and an effective strategy is identified in terms of two underlying factors: workload division and the effect of parallelization on metaheuristic's search intelligence. The strategies are compared with parallelization of another similar evolutionary metaheuristic called Simulated Evolution (SimE). The role of the two mentioned underlying factors is discussed in parallelization of StocE.

Journal of Mathematical Modelling and Algorithms, 2007

Simulated Evolution (SimE) is an evolutionary metaheuristic that has produced results comparable ... more Simulated Evolution (SimE) is an evolutionary metaheuristic that has produced results comparable to well established stochastic heuristics such as SA, TS and GA, with shorter runtimes. However, for optimization problems with a very large set of elements, such as in VLSI cell placement and routing, runtimes can still be very large and parallelization is an attractive option for reducing runtimes. Compared to other metaheuristics, parallelization of SimE has not been extensively explored. This paper presents a comprehensive set of parallelization approaches for SimE when applied to multiobjective VLSI cell placement problem. Each of these approaches are evaluated with respect to SimE characteristics and the constraints imposed by the problem instance. Conclusions drawn can be extended to parallelization of SimE when applied to other optimization problems. Keywords Optimization • Parallel algorithms • Evolutionary metaheuristic • Simulated evolution • VLSI cell placement • Cluster computing Mathematics Subject Classifications (2000) 90C27 • 68T20 • 68W10 • 68W40 • 68W20 • 68U07 1 Introduction Simulated evolution (SimE), proposed by Kling and Banerjee [1], belongs to the class of general purpose stochastic metaheuristics. It has been applied to a variety

Engineering Applications of Artificial Intelligence, 2003

This paper presents a Fuzzy Simulated Evolution algorithm for VLSI standard cell placement with t... more This paper presents a Fuzzy Simulated Evolution algorithm for VLSI standard cell placement with the objective of minimizing power, delay and area. For this hard multiobjective combinatorial optimization problem, no known exact and efficient algorithms exist that guarantee finding a solution of specific or desirable quality. Approximation iterative heuristics such as Simulated Evolution are best suited to perform an intelligent search of the solution space. Due to the imprecise nature of design information at the placement stage the various objectives and constraints are expressed in the fuzzy domain. The search is made to evolve toward a vector of fuzzy goals. Variants of the algorithm which include adaptive bias and biasless simulated evolution are proposed and experimental results are presented. Comparison with genetic algorithm is discussed.

Electronics Letters, 2006

A hybrid heuristic for multiobjective VLSI cell placement is presented, which draws from the memo... more A hybrid heuristic for multiobjective VLSI cell placement is presented, which draws from the memory concept of Tabu search (TS) and the goodness feature of Simulated Evolution (SimE). Experimental results using ISCAS-89 benchmark circuits illustrate improvement in quality as compared to our best canonical TS implementation.