Paul Leroux | KU Leuven (original) (raw)

Papers by Paul Leroux

Research paper thumbnail of A MGy Radiation-Hardened Sensor Instrumentation SoC in a Commercial CMOS Technology

A radiation-hardened sensor instrumentation SoC is presented in this paper. The SoC is implemente... more A radiation-hardened sensor instrumentation SoC is presented in this paper. The SoC is implemented in a standard CMOS technology, and achieves MGy-level TID radiation hardness through radiation-hardening-by-design. The SoC contains several commonly used analog/mixed-signal blocks (e.g., instrumentation amplifier, ADC, bandgap voltage reference, clock reference, multiplexer, etc.) in sensor readout systems. Circuit-level radiation-hardened-by-design techniques are introduced, and the effectiveness of these techniques is proven by on-line gamma-radiation assessments. Finally, implementation details of the sensor instrumentation SoC in a commercial 65nm CMOS technology are discussed.

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Research paper thumbnail of A Review of Semiconductor Based Ionising Radiation Sensors Used in Harsh Radiation Environments and Their Applications

Radiation, 2021

This article provides a review of semiconductor based ionising radiation sensors to measure accum... more This article provides a review of semiconductor based ionising radiation sensors to measure accumulated dose and detect individual strikes of ionising particles. The measurement of ionising radiation (γ-ray, X-ray, high energy UV-ray and heavy ions, etc.) is essential in several critical reliability applications such as medical, aviation, space missions and high energy physics experiments considering safety and quality assurance. In the last few decades, numerous techniques based on semiconductor devices such as diodes, metal-oxide-semiconductor field-effect transistors (MOSFETs) and solid-state photomultipliers (SSPMs), etc., have been reported to estimate the absorbed dose of radiation with sensitivity varying by several orders of magnitude from μGy to MGy. In addition, the mitigation of soft errors in integrated circuits essentially requires detection of charged particle induced transients and digital bit-flips in storage elements. Depending on the particle energies, flux and the...

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Research paper thumbnail of A High-Reliability Redundancy Scheme for Design of Radiation-Tolerant Half-Duty Limited DC-DC Converters

Redundancy techniques are commonly used to design radiation- and fault-tolerant circuits for spac... more Redundancy techniques are commonly used to design radiation- and fault-tolerant circuits for space applications, to ensure high reliability. However, higher reliability often comes at a cost of increased usage of hardware resources. Triple Modular Redundancy (TMR) ensures full single fault masking, with a >200% power and area overhead cost. TMR/Simplex ensures full single fault masking with a slightly more complicated circuitry, inefficient use of resource and a >200% power and area overhead cost, but with higher reliability than that of TMR. In this work, a high-reliability Spatial and Time Redundancy (TR) hybrid technique, which does not abandon a working module and is applicable for radiation hardening of half-duty limited DC-DC converters, is proposed and applied to the design of a radiation-tolerant digital controller for a Dual-Switch Forward Converter. The technique has the potential of double fault masking with a <2% increase in resource overhead cost compared to TM...

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Research paper thumbnail of Radiation-Tolerant All-Digital PLL/CDR with Varactorless LC DCO in 65 nm CMOS

Electronics, 2021

This paper presents the first fully integrated radiation-tolerant All-Digital Phase-Locked Loop (... more This paper presents the first fully integrated radiation-tolerant All-Digital Phase-Locked Loop (PLL) and Clock and Data Recovery (CDR) circuit for wireline communication applications. Several radiation hardening techniques are proposed to achieve state-of-the-art immunity to Single-Event Effects (SEEs) up to 62.52/mg as well as tolerance to the Total Ionizing Dose (TID) exceeding 1.5Grad. The LC Digitally Controlled Oscillator (DCO) is implemented without MOS varactors, avoiding the use of a highly SEE sensitive circuit element. The circuit is designed to operate at reference clock frequencies from 40–320 or at data rates from 40Mbps–320Mbps and displays a jitter performance of 520 with a power dissipation of only 11 and an FOM of −235 .

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Research paper thumbnail of Study of SEU Sensitivity of SRAM-Based Radiation Monitors in 65-nm CMOS

IEEE Transactions on Nuclear Science, 2021

This article presents a static random access memory (SRAM)-based flexible radiation monitor. The ... more This article presents a static random access memory (SRAM)-based flexible radiation monitor. The monitor was fabricated in a 65-nm CMOS technology and it is designed as an application-specific integrated circuit, which comprises 768k bits SRAM cell matrix with individual power supply and a digital control core with a serial peripheral interface (SPI). By adjusting the core voltage of the SRAM matrix, the radiation sensitivity was made flexible. Also, SRAM cells with different threshold voltages were implemented to get further extension on tunable sensitivity range. The monitor has been tested under heavy ions with a linear energy transfer (LET) from 1.5 to 48.5 textMeVcdottextcm2\text {MeV}\cdot \text {cm}^{2}textMeVcdottextcm2 /mg, high-energy (50–186 MeV) and low-energy (0.7–5 MeV) protons, and 14-MeV and thermal neutrons. An analysis was performed on how single-event upset sensitivity changes while tuning the supply voltage under different radiation environments. The results show that the monitor has the potential for space and facility applications.

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Research paper thumbnail of A 1 MGy TID Radiation-Tolerant 56 µW CMOS Temperature Sensor with ±1.7°C Accuracy

2015 15th European Conference on Radiation and Its Effects on Components and Systems (RADECS), 2015

The total-ionizing-dose (TID) radiation tolerance of CMOS temperature sensors is generally limite... more The total-ionizing-dose (TID) radiation tolerance of CMOS temperature sensors is generally limited by the radiation-introduced leakage current in diodes. A dynamic base leakage compensation technique is employed to improve the radiation hardness of the CMOS temperature sensor. The fabricated temperature sensor achieves an accuracy of ±1.7°C from -40°C to 125°C, while the power and area consumption are only 56 μW and 0.07 mm2, respectively. The temperature sensor is assessed with a gamma irradiation experiment with a dose rate of 1 kGy/h, and radiation induced temperature readout drifts are smaller than 0.2% after 1 MGy.

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Research paper thumbnail of A MGy, Low-Offset Programmable Instrumentation Amplifier IC for Nuclear Applications

2015 15th European Conference on Radiation and Its Effects on Components and Systems (RADECS), 2015

This paper shows a customized MGy radiation tolerant instrumentation amplifier. The 65 nm CMOS-ba... more This paper shows a customized MGy radiation tolerant instrumentation amplifier. The 65 nm CMOS-based ASIC amplifier has an offset smaller than 1 μV and a noise level below 50 nV/√Hz from DC. It consumes less than 5 mW and has a common-mode-rejection-ratio larger the 100 dB. In addition, it allows a programmable gain setting from 8,16,32,64,128 to 256. The performance of this instrumentation amplifier was monitored during an on-line radiation experiment up to a total ionizing dose larger than 1 MGy, enabling the read-out of the most common nuclear temperature and position sensors.

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Research paper thumbnail of Healthcare System for Non-invasive Fall Detection in Indoor Environment

Lecture Notes in Electrical Engineering, 2015

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Research paper thumbnail of RF-driving of acoustic-optical tunable filters; design, realization and qualification of analog and digital modules for ESA

Microelectronics Reliability, 2015

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Research paper thumbnail of The VFAT3-Comm-Port: a complete communication port for front-end ASICs intended for use within the high luminosity radiation environments of the LHC

Journal of Instrumentation, 2015

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Research paper thumbnail of Distributed Amplification in CMOS

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Research paper thumbnail of 1-1-1 MASH <formula formulatype="inline"><tex Notation="TeX">$\Delta \Sigma$</tex></formula> Time-to-Digital Converters With 6 ps Resolution and Third-Order Noise-Shaping

IEEE Journal of Solid-State Circuits, 2012

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Research paper thumbnail of A Novel Modular Radiation Hardening Approach Applied to a Synchronous Buck Converter

Electronics, 2019

Radiation and extreme temperature are the main inhibitors for the use of electronic devices in sp... more Radiation and extreme temperature are the main inhibitors for the use of electronic devices in space applications. Radiation challenges the normal and stable operation of DC-DC converters, used as power supply for onboard systems in satellites and spacecrafts. In this situation, special design techniques known as radiation hardening or radiation tolerant designs have to be employed. In this work, a module level design approach for radiation hardening is addressed. A module in this sense is a constituent of a digital controller, which includes an analog to digital converter (ADC), a digital proportional-integral-derivative (PID) controller, and a digital pulse width modulator (DPWM). As a new Radiation Hardening by Design technique (RHBD), a four module redundancy technique is proposed and applied to the digital voltage mode controller driving a synchronous buck converter, which has been implemented as hardware-in-the-loop (HIL) simulation block in MATLAB/Simulink using Xilinx system...

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Research paper thumbnail of Radiation-tolerant CMOS timing readout circuits for laser detection and ranging in nuclear reactors

A novel multi-stage noise-shaping (MASH) delta-sigm a (∆Σ) Time-to-Digital Converter (TDC) struct... more A novel multi-stage noise-shaping (MASH) delta-sigm a (∆Σ) Time-to-Digital Converter (TDC) structure is proposed for applicati ons in continuous-time pulsed time-offlight (TOF) rangefinders for nuclear reactor remot e sensing, which requires both high resolution and multi MGy gamma-dose radiation toler ance. The converter, implemented in 0.13 μm CMOS, achieves a time resolution of 5.6 ps and an ENOB of 11 bits. The TDC core consumes only 1.7 mW and occupies an area of 0.11 m m. Owing to the usage of circuit level radiation hardened-by-design techniques, such as pa s ive RC oscillators and constantgm biasing, the TDC exhibits enhanced radiation tolera nce. After a total dose of 3.4 MGy at a high dose rate of 30 kGy/h, the TDC still achieves a time resolution of 10.5 ps. In order to secure the temperature stability of the TDC, a band g p reference is employed to provide reference current and voltage for the TDC core. The total-ionizing-dose (TID) radiation tolerance of bandgap referen...

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Research paper thumbnail of Pseudo-Differential Time-Domain Integrator Using Charge-Based Time-Domain Circuits

2021 IEEE 12th Latin America Symposium on Circuits and System (LASCAS)

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Research paper thumbnail of A 0.8 dB NF ESD-protected 9 mW CMOS LNA

Solid-State Circuits …, 2002

The GPS L2 band, centered at 1.2276GHz, is planned to enhance the capabilities of civil GPS to ba... more The GPS L2 band, centered at 1.2276GHz, is planned to enhance the capabilities of civil GPS to backup the conventional GPS L1 link. As the L2 receiver is required to detect a low power signal, an LNA with extremely low noise figure is required. In addition, the LNA must ...

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Research paper thumbnail of Assessment of proton direct ionization for the radiation hardness assurance of deep sub-micron SRAMs used in space applications

IEEE Transactions on Nuclear Science

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Research paper thumbnail of Mitigation and Predictive Assessment of SET Immunity of Digital Logic Circuits for Space Missions

Aerospace

Due to the intrinsic masking effects of combinational circuits in digital designs, Single-Event T... more Due to the intrinsic masking effects of combinational circuits in digital designs, Single-Event Transient (SET) effects were considered irrelevant compared to the data rupture caused by Single-Event Upset (SEU) effects. However, the importance of considering SET in Very-Large-System-Integration (VLSI) circuits increases given the reduction of the transistor dimensions and the logic data path depth in advanced technology nodes. Accordingly, the threat of SET in electronics systems for space applications must be carefully addressed along with the SEU characterization. In this work, a systematic prediction methodology to assess and improve the SET immunity of digital circuits is presented. Further, the applicability to full-custom and cell-based design methodologies are discussed, and an analysis based on signal probability and pin assignment is proposed to achieve a more application-efficient SET-aware optimization of synthesized circuits. For instance, a SET-aware pin assignment can ...

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Research paper thumbnail of Radiation Tolerant, Low Noise Phase Locked Loops in 65 nm CMOS Technology

EPJ Web of Conferences

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Research paper thumbnail of A bipolar shaping amplifier for low background alpha/beta counters with silicon detectors

Proceedings of Topical Workshop on Electronics for Particle Physics — PoS(TWEPP2018)

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Research paper thumbnail of A MGy Radiation-Hardened Sensor Instrumentation SoC in a Commercial CMOS Technology

A radiation-hardened sensor instrumentation SoC is presented in this paper. The SoC is implemente... more A radiation-hardened sensor instrumentation SoC is presented in this paper. The SoC is implemented in a standard CMOS technology, and achieves MGy-level TID radiation hardness through radiation-hardening-by-design. The SoC contains several commonly used analog/mixed-signal blocks (e.g., instrumentation amplifier, ADC, bandgap voltage reference, clock reference, multiplexer, etc.) in sensor readout systems. Circuit-level radiation-hardened-by-design techniques are introduced, and the effectiveness of these techniques is proven by on-line gamma-radiation assessments. Finally, implementation details of the sensor instrumentation SoC in a commercial 65nm CMOS technology are discussed.

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Research paper thumbnail of A Review of Semiconductor Based Ionising Radiation Sensors Used in Harsh Radiation Environments and Their Applications

Radiation, 2021

This article provides a review of semiconductor based ionising radiation sensors to measure accum... more This article provides a review of semiconductor based ionising radiation sensors to measure accumulated dose and detect individual strikes of ionising particles. The measurement of ionising radiation (γ-ray, X-ray, high energy UV-ray and heavy ions, etc.) is essential in several critical reliability applications such as medical, aviation, space missions and high energy physics experiments considering safety and quality assurance. In the last few decades, numerous techniques based on semiconductor devices such as diodes, metal-oxide-semiconductor field-effect transistors (MOSFETs) and solid-state photomultipliers (SSPMs), etc., have been reported to estimate the absorbed dose of radiation with sensitivity varying by several orders of magnitude from μGy to MGy. In addition, the mitigation of soft errors in integrated circuits essentially requires detection of charged particle induced transients and digital bit-flips in storage elements. Depending on the particle energies, flux and the...

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Research paper thumbnail of A High-Reliability Redundancy Scheme for Design of Radiation-Tolerant Half-Duty Limited DC-DC Converters

Redundancy techniques are commonly used to design radiation- and fault-tolerant circuits for spac... more Redundancy techniques are commonly used to design radiation- and fault-tolerant circuits for space applications, to ensure high reliability. However, higher reliability often comes at a cost of increased usage of hardware resources. Triple Modular Redundancy (TMR) ensures full single fault masking, with a >200% power and area overhead cost. TMR/Simplex ensures full single fault masking with a slightly more complicated circuitry, inefficient use of resource and a >200% power and area overhead cost, but with higher reliability than that of TMR. In this work, a high-reliability Spatial and Time Redundancy (TR) hybrid technique, which does not abandon a working module and is applicable for radiation hardening of half-duty limited DC-DC converters, is proposed and applied to the design of a radiation-tolerant digital controller for a Dual-Switch Forward Converter. The technique has the potential of double fault masking with a <2% increase in resource overhead cost compared to TM...

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Research paper thumbnail of Radiation-Tolerant All-Digital PLL/CDR with Varactorless LC DCO in 65 nm CMOS

Electronics, 2021

This paper presents the first fully integrated radiation-tolerant All-Digital Phase-Locked Loop (... more This paper presents the first fully integrated radiation-tolerant All-Digital Phase-Locked Loop (PLL) and Clock and Data Recovery (CDR) circuit for wireline communication applications. Several radiation hardening techniques are proposed to achieve state-of-the-art immunity to Single-Event Effects (SEEs) up to 62.52/mg as well as tolerance to the Total Ionizing Dose (TID) exceeding 1.5Grad. The LC Digitally Controlled Oscillator (DCO) is implemented without MOS varactors, avoiding the use of a highly SEE sensitive circuit element. The circuit is designed to operate at reference clock frequencies from 40–320 or at data rates from 40Mbps–320Mbps and displays a jitter performance of 520 with a power dissipation of only 11 and an FOM of −235 .

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Research paper thumbnail of Study of SEU Sensitivity of SRAM-Based Radiation Monitors in 65-nm CMOS

IEEE Transactions on Nuclear Science, 2021

This article presents a static random access memory (SRAM)-based flexible radiation monitor. The ... more This article presents a static random access memory (SRAM)-based flexible radiation monitor. The monitor was fabricated in a 65-nm CMOS technology and it is designed as an application-specific integrated circuit, which comprises 768k bits SRAM cell matrix with individual power supply and a digital control core with a serial peripheral interface (SPI). By adjusting the core voltage of the SRAM matrix, the radiation sensitivity was made flexible. Also, SRAM cells with different threshold voltages were implemented to get further extension on tunable sensitivity range. The monitor has been tested under heavy ions with a linear energy transfer (LET) from 1.5 to 48.5 textMeVcdottextcm2\text {MeV}\cdot \text {cm}^{2}textMeVcdottextcm2 /mg, high-energy (50–186 MeV) and low-energy (0.7–5 MeV) protons, and 14-MeV and thermal neutrons. An analysis was performed on how single-event upset sensitivity changes while tuning the supply voltage under different radiation environments. The results show that the monitor has the potential for space and facility applications.

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Research paper thumbnail of A 1 MGy TID Radiation-Tolerant 56 µW CMOS Temperature Sensor with ±1.7°C Accuracy

2015 15th European Conference on Radiation and Its Effects on Components and Systems (RADECS), 2015

The total-ionizing-dose (TID) radiation tolerance of CMOS temperature sensors is generally limite... more The total-ionizing-dose (TID) radiation tolerance of CMOS temperature sensors is generally limited by the radiation-introduced leakage current in diodes. A dynamic base leakage compensation technique is employed to improve the radiation hardness of the CMOS temperature sensor. The fabricated temperature sensor achieves an accuracy of ±1.7°C from -40°C to 125°C, while the power and area consumption are only 56 μW and 0.07 mm2, respectively. The temperature sensor is assessed with a gamma irradiation experiment with a dose rate of 1 kGy/h, and radiation induced temperature readout drifts are smaller than 0.2% after 1 MGy.

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Research paper thumbnail of A MGy, Low-Offset Programmable Instrumentation Amplifier IC for Nuclear Applications

2015 15th European Conference on Radiation and Its Effects on Components and Systems (RADECS), 2015

This paper shows a customized MGy radiation tolerant instrumentation amplifier. The 65 nm CMOS-ba... more This paper shows a customized MGy radiation tolerant instrumentation amplifier. The 65 nm CMOS-based ASIC amplifier has an offset smaller than 1 μV and a noise level below 50 nV/√Hz from DC. It consumes less than 5 mW and has a common-mode-rejection-ratio larger the 100 dB. In addition, it allows a programmable gain setting from 8,16,32,64,128 to 256. The performance of this instrumentation amplifier was monitored during an on-line radiation experiment up to a total ionizing dose larger than 1 MGy, enabling the read-out of the most common nuclear temperature and position sensors.

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Research paper thumbnail of Healthcare System for Non-invasive Fall Detection in Indoor Environment

Lecture Notes in Electrical Engineering, 2015

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Research paper thumbnail of RF-driving of acoustic-optical tunable filters; design, realization and qualification of analog and digital modules for ESA

Microelectronics Reliability, 2015

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Research paper thumbnail of The VFAT3-Comm-Port: a complete communication port for front-end ASICs intended for use within the high luminosity radiation environments of the LHC

Journal of Instrumentation, 2015

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Research paper thumbnail of Distributed Amplification in CMOS

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Research paper thumbnail of 1-1-1 MASH <formula formulatype="inline"><tex Notation="TeX">$\Delta \Sigma$</tex></formula> Time-to-Digital Converters With 6 ps Resolution and Third-Order Noise-Shaping

IEEE Journal of Solid-State Circuits, 2012

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Research paper thumbnail of A Novel Modular Radiation Hardening Approach Applied to a Synchronous Buck Converter

Electronics, 2019

Radiation and extreme temperature are the main inhibitors for the use of electronic devices in sp... more Radiation and extreme temperature are the main inhibitors for the use of electronic devices in space applications. Radiation challenges the normal and stable operation of DC-DC converters, used as power supply for onboard systems in satellites and spacecrafts. In this situation, special design techniques known as radiation hardening or radiation tolerant designs have to be employed. In this work, a module level design approach for radiation hardening is addressed. A module in this sense is a constituent of a digital controller, which includes an analog to digital converter (ADC), a digital proportional-integral-derivative (PID) controller, and a digital pulse width modulator (DPWM). As a new Radiation Hardening by Design technique (RHBD), a four module redundancy technique is proposed and applied to the digital voltage mode controller driving a synchronous buck converter, which has been implemented as hardware-in-the-loop (HIL) simulation block in MATLAB/Simulink using Xilinx system...

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Research paper thumbnail of Radiation-tolerant CMOS timing readout circuits for laser detection and ranging in nuclear reactors

A novel multi-stage noise-shaping (MASH) delta-sigm a (∆Σ) Time-to-Digital Converter (TDC) struct... more A novel multi-stage noise-shaping (MASH) delta-sigm a (∆Σ) Time-to-Digital Converter (TDC) structure is proposed for applicati ons in continuous-time pulsed time-offlight (TOF) rangefinders for nuclear reactor remot e sensing, which requires both high resolution and multi MGy gamma-dose radiation toler ance. The converter, implemented in 0.13 μm CMOS, achieves a time resolution of 5.6 ps and an ENOB of 11 bits. The TDC core consumes only 1.7 mW and occupies an area of 0.11 m m. Owing to the usage of circuit level radiation hardened-by-design techniques, such as pa s ive RC oscillators and constantgm biasing, the TDC exhibits enhanced radiation tolera nce. After a total dose of 3.4 MGy at a high dose rate of 30 kGy/h, the TDC still achieves a time resolution of 10.5 ps. In order to secure the temperature stability of the TDC, a band g p reference is employed to provide reference current and voltage for the TDC core. The total-ionizing-dose (TID) radiation tolerance of bandgap referen...

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Research paper thumbnail of Pseudo-Differential Time-Domain Integrator Using Charge-Based Time-Domain Circuits

2021 IEEE 12th Latin America Symposium on Circuits and System (LASCAS)

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Research paper thumbnail of A 0.8 dB NF ESD-protected 9 mW CMOS LNA

Solid-State Circuits …, 2002

The GPS L2 band, centered at 1.2276GHz, is planned to enhance the capabilities of civil GPS to ba... more The GPS L2 band, centered at 1.2276GHz, is planned to enhance the capabilities of civil GPS to backup the conventional GPS L1 link. As the L2 receiver is required to detect a low power signal, an LNA with extremely low noise figure is required. In addition, the LNA must ...

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Research paper thumbnail of Assessment of proton direct ionization for the radiation hardness assurance of deep sub-micron SRAMs used in space applications

IEEE Transactions on Nuclear Science

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Research paper thumbnail of Mitigation and Predictive Assessment of SET Immunity of Digital Logic Circuits for Space Missions

Aerospace

Due to the intrinsic masking effects of combinational circuits in digital designs, Single-Event T... more Due to the intrinsic masking effects of combinational circuits in digital designs, Single-Event Transient (SET) effects were considered irrelevant compared to the data rupture caused by Single-Event Upset (SEU) effects. However, the importance of considering SET in Very-Large-System-Integration (VLSI) circuits increases given the reduction of the transistor dimensions and the logic data path depth in advanced technology nodes. Accordingly, the threat of SET in electronics systems for space applications must be carefully addressed along with the SEU characterization. In this work, a systematic prediction methodology to assess and improve the SET immunity of digital circuits is presented. Further, the applicability to full-custom and cell-based design methodologies are discussed, and an analysis based on signal probability and pin assignment is proposed to achieve a more application-efficient SET-aware optimization of synthesized circuits. For instance, a SET-aware pin assignment can ...

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Research paper thumbnail of Radiation Tolerant, Low Noise Phase Locked Loops in 65 nm CMOS Technology

EPJ Web of Conferences

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Research paper thumbnail of A bipolar shaping amplifier for low background alpha/beta counters with silicon detectors

Proceedings of Topical Workshop on Electronics for Particle Physics — PoS(TWEPP2018)

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