Ramanath Datta | Maulana Abul Kalam Azad Institute of Asian Studies (original) (raw)
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Papers by Ramanath Datta
Pattern Recognition and Image Analysis, 2019
Information extraction from scanned document page images is an important issue in image analysis.... more Information extraction from scanned document page images is an important issue in image analysis. The main objectives of this work are: vectorization of image of the digital logic-gate circuits as graph, and automatic generation of Boolean expression. We have employed a novel method for circuit component separation using morphological operators. Connecting wires (in the form of poly lines in the image) lead to adjacency matrix describing directed interconnection between logic gates. Logic gate symbols are recognized by support vector machine (SVM) based on the features obtained by deep convolutional neural network (DCNN). Finally, we exploit this abstract representation of digital logic circuit as a graph to determine the Boolean expression. The approach is tested on a dataset developed by us and the results are encouraging.
Soft Computing
A fast and novel method for single-image reconstruction using the super-resolution (SR) technique... more A fast and novel method for single-image reconstruction using the super-resolution (SR) technique has been proposed in this paper. The working principle of the proposed scheme has been divided into three components. A low-resolution image is divided into several homogeneous or non-homogeneous regions in the first component. This partition is based on the analysis of texture patterns within that region. Only the non-homogeneous regions undergo the sparse representation for SR image reconstruction in the second component. The obtained reconstructed region from the second component undergoes a statistical-based prediction model to generate its more enhanced version in the third component. The remaining homogeneous regions are bicubic interpolated and reflect the required high-resolution image. The proposed technique is applied to some Large-scale electrical, machine and civil architectural design images. The purpose of using these images is that these images are huge in size, and processing such large images for any application is time-consuming. The proposed SR technique results in a better reconstructed SR image from its lower version with low time complexity. The performance of the proposed system on the electrical, machine and civil architectural design images is compared with the state-of-the-art methods, and it is shown that the proposed scheme outperforms the other competing methods.
2011 Second International Conference on Emerging Applications of Information Technology, 2011
... Analysis Ramanath Datta Computer Sc. & Tech. Department BESU Shibpur India ramanath.datta... more ... Analysis Ramanath Datta Computer Sc. & Tech. Department BESU Shibpur India ramanath.datta@gmail.com Sekhar Mandal Computer Sc. & Tech. Department BESU Shibur India sekhar@cs.becs.ac.in Partha Pratim Chattopadhyay Metallurgy and Materials Engg. ...
This paper presents a novel image inpainting method for the completion of image structures in dig... more This paper presents a novel image inpainting method for the completion of image structures in digital circuit images. Here we have proposed a set of geometric patch transformations in order to facilitate searching good candidate patches. Furthermore, we incorporate these transformations in an objective function that comprises both color-based approach and gradient domain method in a single framework to expedite global optimization. The motivation of this approach is to solve the problem of propagating geometric structures smoothly inward the target region. Our image inpainting process consists of two core steps: search and voting. We alternate these two steps until a suitable convergence criterion is satisfied. We repeat the process in a multiscale approach, starting from coarsest scale and ending at finest scale. The proposed method is tested on some circuit images, and the results are compared with some of the existing methods to demonstratethe efficacy and superiority of the prop...
2015 Fifth National Conference on Computer Vision, Pattern Recognition, Image Processing and Graphics (NCVPRIPG)
Decomposition and representation of digital logic circuit drawings to a suitable vector form has ... more Decomposition and representation of digital logic circuit drawings to a suitable vector form has widespread applications related to data compression, storage, analysis, and editing. In this paper, we propose an efficient method for segmenting and identifying logic gate symbols from the image of a circuit drawing. The segmentation procedure is based on morphological operations. After segmentation, the symbols are identified by a decision tree classifier. The proposed method may be used for vectorization of circuit drawings utilizing the information on the segmented circuit symbols and their connectivity matrices. We have tested the proposed method on a dataset containing 53 scanned images of a variety of digital logic circuit drawings. Some of the results are presented here to demonstrate its efficiency.
Pattern Recognition and Image Analysis, 2019
Information extraction from scanned document page images is an important issue in image analysis.... more Information extraction from scanned document page images is an important issue in image analysis. The main objectives of this work are: vectorization of image of the digital logic-gate circuits as graph, and automatic generation of Boolean expression. We have employed a novel method for circuit component separation using morphological operators. Connecting wires (in the form of poly lines in the image) lead to adjacency matrix describing directed interconnection between logic gates. Logic gate symbols are recognized by support vector machine (SVM) based on the features obtained by deep convolutional neural network (DCNN). Finally, we exploit this abstract representation of digital logic circuit as a graph to determine the Boolean expression. The approach is tested on a dataset developed by us and the results are encouraging.
Soft Computing
A fast and novel method for single-image reconstruction using the super-resolution (SR) technique... more A fast and novel method for single-image reconstruction using the super-resolution (SR) technique has been proposed in this paper. The working principle of the proposed scheme has been divided into three components. A low-resolution image is divided into several homogeneous or non-homogeneous regions in the first component. This partition is based on the analysis of texture patterns within that region. Only the non-homogeneous regions undergo the sparse representation for SR image reconstruction in the second component. The obtained reconstructed region from the second component undergoes a statistical-based prediction model to generate its more enhanced version in the third component. The remaining homogeneous regions are bicubic interpolated and reflect the required high-resolution image. The proposed technique is applied to some Large-scale electrical, machine and civil architectural design images. The purpose of using these images is that these images are huge in size, and processing such large images for any application is time-consuming. The proposed SR technique results in a better reconstructed SR image from its lower version with low time complexity. The performance of the proposed system on the electrical, machine and civil architectural design images is compared with the state-of-the-art methods, and it is shown that the proposed scheme outperforms the other competing methods.
2011 Second International Conference on Emerging Applications of Information Technology, 2011
... Analysis Ramanath Datta Computer Sc. & Tech. Department BESU Shibpur India ramanath.datta... more ... Analysis Ramanath Datta Computer Sc. & Tech. Department BESU Shibpur India ramanath.datta@gmail.com Sekhar Mandal Computer Sc. & Tech. Department BESU Shibur India sekhar@cs.becs.ac.in Partha Pratim Chattopadhyay Metallurgy and Materials Engg. ...
This paper presents a novel image inpainting method for the completion of image structures in dig... more This paper presents a novel image inpainting method for the completion of image structures in digital circuit images. Here we have proposed a set of geometric patch transformations in order to facilitate searching good candidate patches. Furthermore, we incorporate these transformations in an objective function that comprises both color-based approach and gradient domain method in a single framework to expedite global optimization. The motivation of this approach is to solve the problem of propagating geometric structures smoothly inward the target region. Our image inpainting process consists of two core steps: search and voting. We alternate these two steps until a suitable convergence criterion is satisfied. We repeat the process in a multiscale approach, starting from coarsest scale and ending at finest scale. The proposed method is tested on some circuit images, and the results are compared with some of the existing methods to demonstratethe efficacy and superiority of the prop...
2015 Fifth National Conference on Computer Vision, Pattern Recognition, Image Processing and Graphics (NCVPRIPG)
Decomposition and representation of digital logic circuit drawings to a suitable vector form has ... more Decomposition and representation of digital logic circuit drawings to a suitable vector form has widespread applications related to data compression, storage, analysis, and editing. In this paper, we propose an efficient method for segmenting and identifying logic gate symbols from the image of a circuit drawing. The segmentation procedure is based on morphological operations. After segmentation, the symbols are identified by a decision tree classifier. The proposed method may be used for vectorization of circuit drawings utilizing the information on the segmented circuit symbols and their connectivity matrices. We have tested the proposed method on a dataset containing 53 scanned images of a variety of digital logic circuit drawings. Some of the results are presented here to demonstrate its efficiency.