Neophytos Lophitis | University of Nottingham (original) (raw)

Papers by Neophytos Lophitis

This document is the author's post-print version, incorporating any revisions agreed during the p... more This document is the author's post-print version, incorporating any revisions agreed during the peer-review process. Some differences between the published version and this version may remain and you are advised to consult the published version if you wish to cite from it.

IEEE Electron Device Letters, Feb 1, 2019

This work provides an experimentally driven performance comparison of commercial Gallium Nitride ... more This work provides an experimentally driven performance comparison of commercial Gallium Nitride on Silicon (GaN-on-Si) power devices rated 600-650V at room and elevated temperatures with the focus being in assessing the on resistance (RON) increase due to hard switching in correlation to other performance indicators. Device technologies evaluated include the Enhancement (E-mode) AlGaN/GaN Hybrid Drain p-GaN layer Gate Injection Transistor (p-GaN HD-GIT), the cascode AlGaN/GaN High Electron Mobility Transistor (cascode HEMT). For the dynamic RON analysis, a special setup was utilized which allows synchronized drain and gate pulses, and the ability to switch from OFF to ON in as little as 20μs. The ability to apply a wide range of voltage levels, stress duration and temperature enabled measurable increase in the dynamic RON in both the cascode HEMT and the p-GaN HD-GIT. Nonetheless, the results highlight a strong difference in their robustness.

IEEE Electron Device Letters, Sep 1, 2018

2018 1st Workshop on Wide Bandgap Power Devices and Applications in Asia (WiPDA Asia), May 1, 2018

A new IGBT type structure, namely the p-ring FS+ Trench IGBT, with improved performance has been ... more A new IGBT type structure, namely the p-ring FS+ Trench IGBT, with improved performance has been demonstrated. The improvement has been achieved through the utilization of p doped buried layers (p-rings) which allows for the simultaneous increase in the n enhancement layer doping concentration above the conventional levels without compromising the device breakdown rating. This unique lateral charge compensation approach is demonstrated to be highly effective in lowering the on-state losses. The experimental results show a 20% reduction in the on-state losses for a 1.7kV device.

Cubic (3C-) silicon carbide (SiC) metal oxide semiconductor (MOS) devices have the potential to a... more Cubic (3C-) silicon carbide (SiC) metal oxide semiconductor (MOS) devices have the potential to achieve superior performance and reliability. The effective channel mobility can be significantly higher compared to other SiC polytypes due to the smaller concentration of active SiC/SiO2 interface traps and the gate leakage current can be smaller than other SiC polytypes and silicon (Si) because of the more favourable conduction band offset between 3C-SiC and silicon dioxide (SiO2). This work examines the 3C-SiC/SiO2 n-MOS interface and makes use of three independent sets of experimental data to derive and validate a comprehensive model of the inversion layer mobility in 3C-SiC n-MOS structures. The model derived in this work can be used by technology computer aided design (TCAD) tools and can predict the channel mobility with reasonable accuracy for gate voltages ranging 0V-20V, and for temperatures ranging 300K-473K. The ability to reproduce correctly the physical phenomena affecting the 3C-SiC/SiO2 n-MOS channel mobility in TCAD through an appropriately parameterised model is imperative for the design and optimization of MOS devices like MOSFETs and IGBTs and the further development of 3C-SiC device technology.

2022 IEEE Energy Conversion Congress and Exposition (ECCE)

Silicon Carbide (SiC) N-channel Insulated Gate Bipolar Transistors (n-IGBTs) rated higher than 10... more Silicon Carbide (SiC) N-channel Insulated Gate Bipolar Transistors (n-IGBTs) rated higher than 10kV can improve Medium Voltage and High Voltage power electronics due to the favourable combination of SiC material with the n-IGBT device structure. This paper investigates the phenomenon of unintentional turn-on occurring due to high dV/dt produced during switching transients and analyses the impact of design parameters such as the channel length, the p-well doping and the oxide thickness for their ability to suppress it.

2019 IEEE 12th International Symposium on Diagnostics for Electrical Machines, Power Electronics and Drives (SDEMPED), 2019

This paper explores how to understand and use knowledge of cell ageing in automotive conditions. ... more This paper explores how to understand and use knowledge of cell ageing in automotive conditions. The key problems and considerations of ageing are considered, followed by an explanation of their causes. This is then used to discuss the tools and understanding required for including this in context of electrified vehicles design and control. What is shown is that ageing is complex, and the dominant underlying causes depend on cell design and usage throughout lifetime. To characterize this, testing, simulation and control approaches must combine, with methods for each of these discussed and evaluated. With future industry trends to higher energy density chemistries, longer pack usage and second life applications, sufficient degradation tools will become even more important in future.

2018 XIII International Conference on Electrical Machines (ICEM), 2018

Materials Science Forum, 2019

A p-well consisting of a retrograde doping profile is investigated for performance improvement of... more A p-well consisting of a retrograde doping profile is investigated for performance improvement of >10kV SiC IGBTs. The retrograde p-well, which can be realized using low-energy shallow implants, effectively addresses the punch-through, a common issue in high-voltage vertical architectures consisting of a conventional p-well with typical doping density of 1e17cm-3 and depth 1μm. The innovative approach offers an extended control over the threshold voltage. Without any punch-through, a threshold voltage in the range 6V-7V is achieved with gate-oxide thickness of 100nm. Gate oxide thickness is typically restricted to 50nm if a conventional p-well with doping density of 1e17cm-3 is utilized. We therefore propose a highly promising solution, the retrograde p-well, for the development of >10kV SiC IGBTs.

2022 IEEE Workshop on Wide Bandgap Power Devices and Applications in Europe (WiPDA Europe)

This paper presents a comprehensive shortcircuit robustness investigation of 4H-Silicon Carbide (... more This paper presents a comprehensive shortcircuit robustness investigation of 4H-Silicon Carbide (SiC) ntype Insulated Gate Bipolar Transistors (nIGBTs) for Medium-Voltage and High-Voltage applications. Numerical electrothermal TCAD simulations evaluate the IGBT shortcircuit behaviour under various conditions and device parameters variation. The internal device current density and temperature distribution show that the parasitic thyristor latchup and the thermally-assisted leakage current generation can be the failure mechanism of SiC nIGBT when the device temperature in the p-well/n-emitter interface region is about 1500K.

Materials Science Forum

The commercial success of silicon carbide (SiC) diodes and MOSFETs for the automotive industry ha... more The commercial success of silicon carbide (SiC) diodes and MOSFETs for the automotive industry has led many in the field to begin developing ultra-high voltage (UHV) SiC insulated gate bipolar transistors (IGBTs), rated from 6 kV to 30 kV, for future grid conversion applications. Despite this early interest, there has been little work conducted on the optimal layout for the SiC IGBT, most early work seeking to overcome difficulties in fabricating the devices without a P+ substrate. In this paper, numerical TCAD simulations are used to examine the link between the carrier lifetime of SiC IGBTs and their short circuit capability. For the planar devices, simulations show that increasing carrier lifetime from 1 to 10 μs, has not only a profound effect reducing on-state losses, but also increases short circuit withstand time (SCWT) by 39%. Two retrograde p-well designs are also investigated, the optimal device for SCWT having a 100 nm channel region of 5×1016 cm-3, with this increasing t...

Richard Stocker is with the Institute for Future Transport and Cities, Coventry University, Coven... more Richard Stocker is with the Institute for Future Transport and Cities, Coventry University, Coventry, CV1 2JH, United Kingdom. He is also with the Horizon Scanning department, HORIBA MIRA, Nuneaton, CV10 0TU, United Kingdom. Neophytos Lophitis is with the Faculty of Engineering, University of Nottingham, Nottingham, NG7 2RD. Email: Neo.Lophitis@nottingham.ac.uk Paramjeet (no surname) and Michele Braglia are also with HORIBA MIRA Horizon Scanning. Asim Mumtaz is with the Department of Physics, University of Liverpool, L67 7ZF, United Kingdom. Email:A.Mumtaz@liverpool.ac.uk Richard Stocker is the corresponding author. Corresponding author information follows. Title: Energy Systems Innovation Lead (at HORIBA MIRA). Contact Email Richard.Stocker@Horiba-Mira.com. Contact Tel +442476355275. Address is given as HORIBA MIRA address. This paper describes and verifies a Li-ion cell electro-thermal model and the associated data analysis process. It is designed to be adaptable and give accurate...

2017 IEEE 5th Workshop on Wide Bandgap Power Devices and Applications (WiPDA), 2017

Gallium Nitride (GaN) based devices on Silicon (Si) substrates (GaN-on-Si) promise unmatched perf... more Gallium Nitride (GaN) based devices on Silicon (Si) substrates (GaN-on-Si) promise unmatched performance at low cost. Despite this theoretical promise, the lattice and thermal conductivity mismatch between the GaN and Si has obstructed the realization of reliable electrically graded high voltage devices. Recently, a small number of manufacturers have claimed the successful development of such devices. Panasonic and Transphorm among a few others have also made their devices available in the open market. The commercial availability of these devices, (something common only for mature technologies), proves the remarkable progress that has been achieved. In this paper, a comprehensive and experimentally derived comparison of the static performance is made between the 600 V Panasonic PGA26C09DV Gate Injected Transistor (GIT) and the 600 V Transphorm cascode TO-220 series devices. The Si 650 V Infineon SPA15N60C3 Super-Junction (S-J) provides a reference with Si technology. The Panasonic devices feature a p-GaN layer which makes them one of the first Enhancement mode (E-mode) GaN power devices on the market, whereas the Transphorm devices are Depletion-mode (D-mode) High Electron Mobility Transistors (HEMTs) cascaded with a low voltage (LV) Si Metal Oxide Semiconductor Field Effect Transistor (MOSFET). Despite the Panasonic and Transphorm devices being examples of GaN-on-Si aiming for the same applications, the measurements and analysis shows that their performance is very different.