sahar Daraeizadeh - Portland State University (original) (raw)

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Papers by sahar Daraeizadeh

We realize Surface Code quantum memories for nearest-neighbor qubits with always-on Ising interac... more We realize Surface Code quantum memories for nearest-neighbor qubits with always-on Ising interactions. This is done by utilizing multi-qubit gates that mimic the functionality of several gates. The previously proposed Surface Code memories rely on error syndrome detection circuits based on CNOT gates. In a two-dimensional planar architecture, to realize a two-qubit CNOT gate in the presence of couplings to other neighboring qubits, the interaction of the target qubit with its three other neighbors must cancel out. Here we present a new error syndrome detection circuit utilizing multi-qubit parity gates. In addition to speed up in the error correction cycles, in our approach, the depth of the error syndrome detection circuit does not grow by increasing the number of qubits in the logical qubit layout. We analytically design the system parameters to realize new five-qubit gates suitable for error syndrome detection in nearest-neighbor two-dimensional array of qubits. The five-qubit g...

We use machine learning techniques to design a 50 ns three-qubit flux-tunable controlled-controll... more We use machine learning techniques to design a 50 ns three-qubit flux-tunable controlled-controlled-phase gate with fidelity of >99.99% for nearest-neighbor coupled transmons in circuit quantum electrodynamics architectures. We explain our gate design procedure where we enforce realistic constraints, and analyze the new gate's robustness under decoherence, distortion, and random noise. Our controlled-controlled-phase gate in combination with two single-qubit gates realizes a Toffoli gate which is widely used in quantum circuits, logic synthesis, quantum error correction, and quantum games.

2020 IEEE International Conference on Quantum Computing and Engineering (QCE)

In this paper, we present a machine learning framework to design high-fidelity multi-qubit gates ... more In this paper, we present a machine learning framework to design high-fidelity multi-qubit gates for quantum processors based on quantum dots in silicon, with qubits encoded in the spin of single electrons. In this hardware architecture, the control landscape is vast and complex, so we use the deep reinforcement learning method to design optimal control pulses to achieve high fidelity multi-qubit gates. In our learning model, a simulator models the physical system of quantum dots and performs the time evolution of the system, and a deep neural network serves as the function approximator to learn the control policy. We evolve the Hamiltonian in the full state-space of the system, and enforce realistic constraints to ensure experimental feasibility.

arXiv: Quantum Physics, 2019

arXiv: Quantum Physics, 2018

We analytically designed the control bias pulses to realize new multi-qubit parity detector gates... more We analytically designed the control bias pulses to realize new multi-qubit parity detector gates for 2-Dimensional (2D) array of superconducting flux qubits with non-tunable couplings. We designed two 5-qubit gates such that the middle qubit is the target qubit and all four coupled neighbors are the control qubits. These new gates detect the parity between two vertically/horizontally coupled neighbor qubits while cancelling out the coupling effect of horizontally/vertically coupled neighbor qubits. For a 3 by 3 array of 9 qubits with non-tunable couplings, we simulated the effect of our new 5-qubit horizontal and vertical parity detector gates. We achieved the intrinsic fidelity of 99.9% for horizontal and vertical parity detector gates. In this paper we realize Surface Code memories based on the multi-qubit parity detector gates for nearest neighbor superconducting flux qubits with and without tunable couplings. However, our scheme is applicable to other superconducting qubits as ...

Physical Review A

We introduce an efficient scheme for quantum state transfer that uses a parity-based mirror inver... more We introduce an efficient scheme for quantum state transfer that uses a parity-based mirror inversion technique. We design efficient circuits for implementing mirror inversion in Ising, σ X σ X and σ Y σ Y coupled systems, and show how to analytically solve for system parameters to implement the operation in these systems. The key feature of our scheme is a three-qubit parity gate, which we design as a two-control, one-target qubit gate. The parity gate operation is implemented by only varying a single control parameter of the system Hamiltonian, and the difficulty of implementing this gate is equivalent to that of a controlled-NOT (CNOT) in a two-qubit system. By applying a sequence of N+1 parity-based controlled-unitary operations between nearest-neighbor qubits, where all qubits in an N-qubit chain function either as controls or targets, we are able to reverse the order of all qubits along the array. These operations are accomplished by varying only a single control parameter per data qubit. The control parameter depends on the physical system under consideration, and on the choice of the designer. Since every qubit participates in the mirror inversion process functioning either as a control or target, all nearest neighbor couplings are used. Therefore, we do not need additional measures to cancel the effect of any unwanted interactions, and the quantum cost of our scheme does not increase in systems that do not have the ability shut off couplings. Moreover, our scheme does not require additional ancillas, nor does it use a pre-engineered mirrorperiodic Hamiltonian to govern the evolution of the system. Using our mirror inversion scheme, we also show how to implement a swap gate between two arbitrary remote qubits, move a block of qubits, and implement efficient computing between two remote qubits in nearest-neighbor layouts.

Quantum Information Processing, 2013

We design a nearest-neighbor architectural layout that uses fixed positive and negative couplings... more We design a nearest-neighbor architectural layout that uses fixed positive and negative couplings between qubits, to overcome the effects of relative phases due to qubit precessions, both during idle times and gate operations. The scheme uses decoherence-free subspaces, and we show how to realize gate operations on these encoded qubits. The main advantage of our scheme is that most gate operations are realized by only varying a single control parameter, which greatly reduces the circuit complexity. Moreover, the scheme is robust against phase errors occurring as a result of finite rise and fall times due to non-ideal pulses.

In this paper we present a new design of current mode full adder cell, which uses two threshold d... more In this paper we present a new design of current mode full adder cell, which uses two threshold detectors based on majority function. The proposed new full adder demonstrates better performance compared to the conventional current mode full adder, especially in delay, accuracy and area. Both of the new and the conventional full adders are simulated at 0.18 µm CMOS technology with 1.8v Vdd, using Hspice. We considered that the unit of current is equal to 20µA. To have a realistic simulation environment, we cascaded five full adder cells and focused on one of the middle cells. The simulation results show that the delay of the new current mode full adder cell has about 51% reduction, compared to the best existing counterpart.

Reduced Hamiltonian technique for gate design in strongly coupled quantum systems

ABSTRACT

Nearest-neighbor architecture to overcome effects of qubit precessions in gate operations

2011 IEEE Congress of Evolutionary Computation (CEC)

ABSTRACT

2020 IEEE International Conference on Quantum Computing and Engineering (QCE)

arXiv: Quantum Physics, 2019

arXiv: Quantum Physics, 2018

Physical Review A

Quantum Information Processing, 2013

Reduced Hamiltonian technique for gate design in strongly coupled quantum systems

ABSTRACT

Nearest-neighbor architecture to overcome effects of qubit precessions in gate operations

2011 IEEE Congress of Evolutionary Computation (CEC)

ABSTRACT