Santosh Shinde | Shivaji University, Kolhapur, India (original) (raw)
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Papers by Santosh Shinde
Electronics and Electrical Engineering, 1970
Applications requiring intensive arithmetic operations such as multiplication are exponentially i... more Applications requiring intensive arithmetic operations such as multiplication are exponentially increasing than ever before. The state of art FPGAs are the preferred implementation platforms for implementation of multipliers inspite of the speed and area issues. In this paper we present implementation of Booth Wallace Multiplier on Xilinx FPGAs. Our approach employs design at the higher level of abstraction using Handel C which also inculcates parallelism at the algorithmic level. Ill. 4, bibl. 4, tabl. 1 (in English; abstracts in English and Lithuanian).http://dx.doi.org/10.5755/j01.eee.109.3.174
IJCSNS, 2010
Behavioral design helps the designer to understand the design space and subsequently coming up wi... more Behavioral design helps the designer to understand the design space and subsequently coming up with a design that meets all the constraints specifically in a field programmable gate array (FPGA) based design paradigm. In this paper we have reported a novel design framework for creation of behavioral design. We have examined the opportunities brought about by finite state machines and to harness them into a synthesizable register transfer level (RTL) architecture. We discuss a case study of packet parser its finite state machine (FSM), data path controller architecture and issues related to its Handel-C implementation.
This chapter is meant to be a short introduction to the Electronic Design Automation (EDA) paradi... more This chapter is meant to be a short introduction to the Electronic Design Automation (EDA) paradigm. The last decade has witnessed phenomenal growth in the number of R&D groups, corporate players, universities and research laboratories working in this exciting area up-and-coming as the hub of interdisciplinary activity. Increasing design complexities owing to the "more than Moore" phenomenon, added expected functionalities, shrinking design cycle and time to market window, more software centric designs are all the crucial factors forcing the EDA progression in diversified directions more than ever before. The intent of this chapter is also to make the reader familiar with the very rationale of the book, its organization and to set the basic foundations of its remaining chapters which exploit various flavors of different EDA tools to build live case studies of increasing complexities. 1.2 Prologue In the era of technology shrinkage of the order of ~0.7 per generation with 2× more functions per generations and declining cost of the functions by the same order; the Electronic Design Automation tools are at the forefront of the Very Large Scale Integration (VLSI) design. Electronic Design Automation (EDA) is one of the key enablers of the semiconductor industry [1]. No chip is designed without EDA. Conversely, semiconductors drive EDA technology [2]. These EDA tools are now progressively more required to address the microscopic and macroscopic design issues. The former includes design concerns such as ever-increasing speed, more demand towards reduction in power supply and power dissipation, noise, crosstalk, interconnects and overall reliability aspects. While the later comprises of productivity challenges with the shrinking time to market window, different levels of abstractions Chapter 1
Practical Aspects of Embedded System Design using Microcontrollers, 2008
IEEE Sensors Journal, 2011
An active inductor variable load quenching circuit monolithically implemented for sensing chlorop... more An active inductor variable load quenching circuit monolithically implemented for sensing chlorophyll fluorescence and other sensor applications like bioluminescence, tomography, and DNA fingerprints is reported for the first time in this paper. An efficient biosignal acquisition with single-photon counting facility and fast quenching and reset for Single-Photon Avalanche Diode (SPAD) is implemented in 120 nm technology. This is the first ever monolithic active inductor implementation reported for quenching and reset of SPAD pixel. It is faster compared to all previously reported AQRC and variable load quenching circuit (VLQC) monolithic implementations. Along with the principle, a detailed design is presented in 120 nm technology. Analog simulations are done using LT Spice version IV and layout is primed using Microwind 3.1. The results reveals that a 50 ps light pulse with 250 ps dead time, i.e., light pulse with repetition rate of 300 ps can be quenched and detected.
S. A. Shinde, V. G. Shelake, R. K. Kamat. FPGA based Packet Splitter Implementation Using Mixed D... more S. A. Shinde, V. G. Shelake, R. K. Kamat. FPGA based Packet Splitter Implementation Using Mixed Design Flow // Electronics and Electrical Engineering. -Kaunas: Technologija, 2008. -No. 8(88). -P. 15-18.
Electronics and Electrical Engineering, 1970
Applications requiring intensive arithmetic operations such as multiplication are exponentially i... more Applications requiring intensive arithmetic operations such as multiplication are exponentially increasing than ever before. The state of art FPGAs are the preferred implementation platforms for implementation of multipliers inspite of the speed and area issues. In this paper we present implementation of Booth Wallace Multiplier on Xilinx FPGAs. Our approach employs design at the higher level of abstraction using Handel C which also inculcates parallelism at the algorithmic level. Ill. 4, bibl. 4, tabl. 1 (in English; abstracts in English and Lithuanian).http://dx.doi.org/10.5755/j01.eee.109.3.174
IJCSNS, 2010
Behavioral design helps the designer to understand the design space and subsequently coming up wi... more Behavioral design helps the designer to understand the design space and subsequently coming up with a design that meets all the constraints specifically in a field programmable gate array (FPGA) based design paradigm. In this paper we have reported a novel design framework for creation of behavioral design. We have examined the opportunities brought about by finite state machines and to harness them into a synthesizable register transfer level (RTL) architecture. We discuss a case study of packet parser its finite state machine (FSM), data path controller architecture and issues related to its Handel-C implementation.
This chapter is meant to be a short introduction to the Electronic Design Automation (EDA) paradi... more This chapter is meant to be a short introduction to the Electronic Design Automation (EDA) paradigm. The last decade has witnessed phenomenal growth in the number of R&D groups, corporate players, universities and research laboratories working in this exciting area up-and-coming as the hub of interdisciplinary activity. Increasing design complexities owing to the "more than Moore" phenomenon, added expected functionalities, shrinking design cycle and time to market window, more software centric designs are all the crucial factors forcing the EDA progression in diversified directions more than ever before. The intent of this chapter is also to make the reader familiar with the very rationale of the book, its organization and to set the basic foundations of its remaining chapters which exploit various flavors of different EDA tools to build live case studies of increasing complexities. 1.2 Prologue In the era of technology shrinkage of the order of ~0.7 per generation with 2× more functions per generations and declining cost of the functions by the same order; the Electronic Design Automation tools are at the forefront of the Very Large Scale Integration (VLSI) design. Electronic Design Automation (EDA) is one of the key enablers of the semiconductor industry [1]. No chip is designed without EDA. Conversely, semiconductors drive EDA technology [2]. These EDA tools are now progressively more required to address the microscopic and macroscopic design issues. The former includes design concerns such as ever-increasing speed, more demand towards reduction in power supply and power dissipation, noise, crosstalk, interconnects and overall reliability aspects. While the later comprises of productivity challenges with the shrinking time to market window, different levels of abstractions Chapter 1
Practical Aspects of Embedded System Design using Microcontrollers, 2008
IEEE Sensors Journal, 2011
An active inductor variable load quenching circuit monolithically implemented for sensing chlorop... more An active inductor variable load quenching circuit monolithically implemented for sensing chlorophyll fluorescence and other sensor applications like bioluminescence, tomography, and DNA fingerprints is reported for the first time in this paper. An efficient biosignal acquisition with single-photon counting facility and fast quenching and reset for Single-Photon Avalanche Diode (SPAD) is implemented in 120 nm technology. This is the first ever monolithic active inductor implementation reported for quenching and reset of SPAD pixel. It is faster compared to all previously reported AQRC and variable load quenching circuit (VLQC) monolithic implementations. Along with the principle, a detailed design is presented in 120 nm technology. Analog simulations are done using LT Spice version IV and layout is primed using Microwind 3.1. The results reveals that a 50 ps light pulse with 250 ps dead time, i.e., light pulse with repetition rate of 300 ps can be quenched and detected.
S. A. Shinde, V. G. Shelake, R. K. Kamat. FPGA based Packet Splitter Implementation Using Mixed D... more S. A. Shinde, V. G. Shelake, R. K. Kamat. FPGA based Packet Splitter Implementation Using Mixed Design Flow // Electronics and Electrical Engineering. -Kaunas: Technologija, 2008. -No. 8(88). -P. 15-18.