A Simple, Low Cost and Multiple Input Alarm System, Functioning as Finite State Machine (FSM), Using VHDL and FPGAs (original) (raw)

Alarm System Implementation on Field Programmable Gate Array

In recent times, Field Programmable Gate Arrays have wide applications in market due to its advantage of having programmable interconnects. Alarm-system is the best solution to overcome house intrusion. The effective Alarm-system is available at low cost with which the user can built their own security system. In this paper, we present the design and implementation of the alarm-system. The design has been described using VHDL and implemented in the hardware using FPGA (Field Programmable Gate Array). This is installed in the hardware by ISE project navigator, a software of Xilinx. The system is a four code system that runs on FPGA with the sensor to sense correct pattern for code and the buzzer. The design involves a code-checker with which the system can change its states.

An FPGA application of home security code using verilog

Institute of Advanced Engineering and Science (IAES), 2022

Traditional entrance keys performed a number of drawbacks, including the ease with which they can be stolen, duplicated, or misplaced, allowing unauthorized people to gain access to cash, valuables, and other important documents. As known, most digital electronic entrance locks use application specific integrated circuits (ASICs) as based, which have the disadvantage of being unable to be reconfigured, as opposed to field programmable gate arrays (FPGA). This project proposed a home security code lock using verilog hardware descriptive language (HDL) with two unlocking modes, using a button or a keypad which can be changed using a switch. The 7-segment on the Altera DE2-115 trainer board is used to display the passcode press by the keypad. The result of simulation on the keypad using finite state machine (FSM) technique was fulfill the theoretical concept in which it will go to the next state each time the correct input or passcode was entered. When the wrong input or passcode was entered, it will be entered to reset mode. As the conclusion, a fully comply output according to the theoretical FSM concept is fully achieved in this project.

FPGA in hardware description language based digital clock alarm system with 24-hr format

Currently, digital clock adapts microprocessor or microcontroller system. Performance of speed and reconfigurability issue become a main concern in digital clocks. New additional feature may be introduced in digital clocks in the future. Field programmable gate array (FPGA) offer better performance of speed and reconfiguration features. Based on these advantages, it is essential to study or explore the digital clock with FPGA design. The objective in this study is to create a hardware description language (HDL)based digital clock with alarm system and implement it onto the Altera DE2-115 board. Using Verilog HDL language in Quartus Prime 20.1 Lite Edition software, all submodule components is developed and being test benched using ModelSim-Altera Starter Edition 13.1 to ensure the correct functionality. Then all inputs and outputs will be assigned through pin assignment in the software. For verification purpose, it will be downloaded to the Altera DE2-115 board. In conclusion, the file has been successfully implemented to the board and the digital clock with alarm is fully functional as expected. This was proved by the alarm signal, time adjustment and display of the three-display mode which is clock, alarm, and input where each mode carries their own functions as expected.

Automated and Secured Smart Home through FPGA Controller

International Journal of Innovative Technology and Exploring Engineering, 2019

Now a days everything is becoming smart due to the upgrdation of the technology like smart phones, digital watches, smart city etc., the home automation has become most popular. The smart home is also the part of modern lifestyle. It does make our life more comfortable and easy as well as secured. Also took a look towards security system of home using various sensors buzzers. I this project I would like to work over automated house and the security system of the home. Now a days crime level get increase so I took a glance over it.first of all I have worked on VHDL (hardware descriptive language) and I have code for various sensors like temperature, fire, PIR, and gas sensor and after that I have burn my program into compatible FPGA to the xilinx14.7 and according the requirement of the ports (I/O).then worked over the mentor graphics to generate there layout of the corresponding design using (.vhd) file.

AUTOMATED ADVANCED INDUSTRIAL and HOME SECURITY USING GSM and FPGA

Home and industrial security today needs to make use of the latest technological components. In this paper I going to present the design and implementation of a remote and sensing, control and home security system based on GSM (Global System for Mobile). This system offers a complete, low cost, powerful and user friendly way of 24 hours of real -time monitoring and remote control of a home and industrial security. The system works as a remote sensing for the electrical appliances at home to check whether it is on or off, at the same time the user can control the electrical appliances at home by sending SMS ( Short Messaging Service) message to the system, for example turning on t he AC before returning home. In case of fire/security the chip will receive signals from the different sensors in the monitoring place and acts according to the received signal by sending an SMS message to user's Mobile Phone, it also works as automatic and immediate reporting to the user in case of emergency for home security, as well as immediate and automatic reporting to the fire brigade and police station according to activated sensor to decrease the time required for tacking action.The design has been described using VHDL (VHSIC Hardware Description Language) and implemented in hardware using FPGA (Field Programmable Gate Array).

PC Based Alarm Annunciator System

At present, Panel-Based Alarm Annunciator System for the existing 130Mev AVF cyclotron of our centre is used to draw the attention to the operator only for the 64 Nos. of top-level alarms. The lower level faults, which cause the top level alarm, are not visible from the control panel. Moreover, huge amount of maintenance cost and manpower is involved in keeping the system alive. To alleviate these problems, one PC-Based Alarm Annunciator System has been developed using C++ [1] under WIN-NT. A PC plug-in card from ADVANTECH [2] is used for the Input/Output ( I/O ) interface. The 64 top level alarms are displayed on the screen using buttons with pre-defined names and different colors are used to indicate the system ’s status ; e.g. RED for fault, GREEN for O.K. and BLINKING with AUDIO for alarms. Lower level alarms can be displayed with a mouse click on the top-level alarm button. The system keeps records of different parameters with time stamp in a database. The facility to monitor t...

FPGA Based Implementation of Electronic Safe Lock

Thispaper is based on design of an "Automatic Security System Using VHDL" providing understandable and adequate operating procedure to the user. The operation is conducted by six different modules. If any of the modules fails, the failed module can be replaced without affecting the activity of others. The safety is ensured to the user by setting a secret code number which is the combination of three numbers, by doing so, only the authorized users can unlock the safe. The paper finds its appositeness in big organizations, military and banking sectors. Simulation through VHDL is quite generous and fiscal due to the reduction in number of components. Important operation consideration is to not give any indication to the user that the combination entered is incorrect until after the user has entered the all three numbers and pressed the OPEN key. Otherwise, it is possible for a user to determine the combination in no more than 96 attempts, as opposed to no more than 32,768 attempts.

FPGA : Based Security login System

Security in every aspect is highly desirable may be at home or at office. Automated system specially designed to safeguard personal belonging, country’s secret, protection of secret research data, simple university building or a personal car, have been designed using various techniques of computing world both, software and hardware. This paper tries to implement hardware based approach of designing security system. In this project FPGA based security system is designed capable of unlocking the door once the correct code is entered from DE2 board. Finally the output of overall system is evaluated based on the display on LCD present on De2 board of Altera Company.

FPGA Based System Login Security Lock Design Using Finite State Machine

Field Programmable Gate Array (FPGA) delivers breakout performance capacity and system integration while optimizing to develop FPGA devices based on CAD tools in the Hardware Description Language (HDL), which illustrate the logic, function and behaviors of system hardware. VHDL (very high speed integrated circuit HDL) is one of the important hardware description language which is used in this research paper to design SYSTEM LOGIN SECURITY LOCK. This research paper introduces the security technology for machines or objects. In this we design an automatic Security System Login Lock using FSM based on FPGA. This can be done with the help of XILINX software. In this the lock can only opened when the desired code (password) is entered or the given sequence is detected by the system.

A g-sensor Based Alarm System for Multiple Tilt Sensor Applications Using VHDL and FPGAs

2024

A g-sensor based alarm system, available for use in many tilt sensor applications, was programmed and put in use in this work. The DE10-Lite FPGA was used, with its digital accelerometer sensor module ADXL345. The tilt sensor is programmed to present in seven segment display of the FPGA board, angle values from 0 to 90 degrees, using minus sign when the slope is to the right and the positive one when it tilts to the left, thus informing us about the sensor's tilt direction. Simultaneously the FPGA's right or left LEDs light up according to system tilt. It also uses key button for freezing its operation, hence presenting the latest angle value. The program controlling the sensor gives the ability of entering a critical angle value, depending on the application. As soon as this value is exceeded buzzer is activated, thus giving our system an alarm behavior.