Efficient designs of reversible latches with low quantum cost (original) (raw)
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Quantum Cost Optimization for Reversible Sequential Circuit
(IJACSA) International Journal of Advanced Computer Science and Applications, 2013
Reversible sequential circuits are going to be the significant memory blocks for the forthcoming computing devices for their ultra low power consumption. Therefore design of various types of latches has been considered a major objective for the researchers quite a long time. In this paper we proposed efficient design of reversible sequential circuits that are optimized in terms of quantum cost, delay and garbage outputs. For this we proposed a new 3*3 reversible gate called SAM gate and we then design efficient sequential circuits using SAM gate along with some of the basic reversible logic gates.
A New Nano-Scale and Energy-Optimized Reversible Digital Circuit Based on Quantum Technology
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A nano-scale quantum-dot cellular automaton (QCA) is one of the most promising replacements for CMOS technology. Despite the potential advantages of this technology, QCA circuits are frequently plagued by numerous forms of manufacturing faults (such as a missing cell, extra cell, displacement cell, and rotated cell), making them prone to failure. As a result, in QCA technology, the design of reversible circuits has received much attention. Reversible circuits are resistant to many kinds of faults due to their inherent properties and have the possibility of data reversibility, which is important. Therefore, this research proposes a new reversible gate, followed by a new 3 × 3 reversible gate. The proposed structure does not need rotated cells and only uses one layer, increasing the design’s manufacturability. QCADesigner-E and the Euler method on coherence vector (w/energy) are employed to simulate the proposed structure. The 3 × 3 reversible circuit consists of 21 cells that take up...
An Optimized Design of Reversible Sequential Digital Circuits
Proceedings of NCECST-2013, Bareily, 2013
In the today's era, reversible logics are the promising technology for the designing of low power digital logic system having major application in the field of nanotechnology, quantum computation, DNA and other low power digital circuits. Reversible logics provide zero power dissipation (Ideally) in the digital operations. There are numbers of circuit designed by the reversible logics and sequential circuits have their own importance in the digital systems. In this paper authors provides a optimized approach and optimized design for the sequential circuit (counter as an example) by using the MUX gate (a reversible gate) which provides the better results against the previous designs discussed in the literature. The proposed design has lower quantum cost, garbage output, constant input and total number of logical calculations performing by the design.
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Reversible logic is promising as it is able to compute with various applications in very low power like nano- computing for example quantum computing. Reversible circuits are like conventional circuits despite they are build from reversible gates. Reversible circuits, have single, one-to-one mapping between the input and output vectors.Thus all output vectors are permutations of input vectors. A concise review of reversible logic gates basics will be studied. The basic reversible logic gates need to be optimized in reversible logic design and synthesis. Reversible gates need steady inputs for configuration of gate functions and junk outputs that helps in keeping reversibility. Therefore, it is very important to lessen the parameters such as junk bytes, quantum cost and delay in the scheming of reversible circuits. As reversible circuits have tremendous applications in a vairety of emerging technologies such as quantum computing and quantum dot. Consequently this research work would ...
A COMPARISON OF LOGICAL EFFICIENCY OF REVERSIBLE AND CONVENTIONAL GATES
In contrast to conventional gates, reversible logic gates have the same number of inputs and ouputs, each of their output function is equal to 1 for exactly half its input assignments and their fanout is always equal to 1. It is interesting to compare compositional properties of reversible and conventional gates. We present such a comparison based on an exhaustive study of logic circuits. INTRODUCTION Reversible computing was founded when on the basis of thermodynamics of information processing it was shown that conventional irreversible circuits unavoidably generate heat because of losses of information during the computation (see, e.g. [1]). It was also indicated that different physical phenomena can be exploited to construct reversible circuits avoiding the above mentioned energy losses. One of the most attractive new perspectives opened in this way is the possibility to build almost energy lossless ultra-small and ultra-fast quantum computers.
A design of sequential reversible circuits by reversible gates
International journal of engineering and technology, 2020
Reversible logic has become increasingly important in the design of low power CMOS circuits, quantum computing and nanotechnology. In this article we work on recent sequential circuits namely RS Flip Flop JK Flop Flip Flop Flop Flip Flop Master Slave Flip Flop using some reversible gates FG (Feyman Gate), FRG (Fredkin Gate), NG (New Gate) , PG (Peres Gate), BJN (New BJN Gate), while modifying them to obtain new circuits keeping their same functionality and increasing their performances.
Design of Parity Preserving Reversible Sequential Circuits
Irreversible computing requires consumption of energy to obtain missing bits due to overlapped mapping between input and output vectors. For this reason, reversible computing has become one of the most significant computing processes for the forthcoming computing technology as they dissipate very low power. Therefore, a major research objective in this field is the synthesis of different types of reversible latches and flip flops. A parity preserving reversible new gate is proposed in this paper. A modification of existing Peres gate is also proposed. Using the proposed gates, the conventional flip flops – RS flip flop, JK flip flop, D flip flop and T flip flop are designed. Therefore, the proposed designs are fault tolerant. The master-slave JK flip flop and master-slave D flip flop are also designed using the proposed gates. The proposed circuit designs are superior to the existing designs in terms of number of gates, garbage outputs and quantum costs.
Low Power Boolean Logic Circuits using Reversible Logic Gates
2019 International Conference on Advances in Computing, Communication and Control (ICAC3), 2019
Low power design is a promising characteristic for the application ranging from the Internet of things (IoTs) to quantum computing. The boolean logic based on the reversible concept is the emerging technology for low power digital logic circuit design for quantum computing application. The reversible logic circuit provides an entirely new way of processing quantum computing. In this paper,we present the transistor level implementation of state-of-the-art reversible gates and proposed boolean logic circuits using reversible logic gates. The various Boolean logic circuits based on reversible logic gates are designed using the SCL180nm library. Furthers, we introduced D-flip flop and 4×1 MUX using the reversible gate, which has an energy efficiency of 14% and 94%, respectively, with reported paper. This proposed logic circuits achieved area efficiency as well as a power-efficiency because of reversible logic gates, which consume less power due to its distinctive input-output mapping te...
The CMOS faces challenges related to the increment in leakage-current to power-consumption. QCA is a promising alternative to overcome these challenges successfully. On the other hand, reversible logic plays a significant role in quantum-computing. Keeping this technique in mind, a conservative-reversible flip-flops and counter are explored here which will bring QCA and reversible computing together in a single-platform. In synthesizing, a reversible-conservative-quantum-cellular-automata (R-CQCA) is proposed. The proposed D, T, JK and dual-edge master-slave flip-flops advocate an improvement of 20%, 46.6%, 50%, and 36.66% respectively than its counterpart in quantum-cost. Further, the 100% fault-coverage by stuck-fault is framed in R-CQCA, which can be useful for a tester to maintain data-integrity. Also, the R-CQCA layout is implemented in QCA, which achieve some parameters such as cell-complexity of 177, leakage-energy-dissipation of 0.1055 eV, and size of 0.24 mm 2. Moreover, R-CQCA is better than FRG, RM, PPRG and MX-cqca regarding QCA-primitives are reported here. One of the major limitations of CMOS technology is its high power consumption. This problem cannot be completely solved even by further scaling the size of the transistor. A possible solution is to develop new computational paradigms based on quantum technologies. In this way, the reversible logic technique is a primary part of quantum technology because of the unitary property of quantum computations [1]. They enormously deal with low energy dissipation. Landauer [1] pointed that logic computation that is non-reversible essentially dissipates heat energy. Bennett [2] pointed that no energy dissipation is possible only if a design includes reversible gates. The feature of reversible gates bijections property from the input states to the output states, and have consequently recovered outputs from inputs. The primary abstract behind the conservative logic of the observable operations for the manipulation of Ex-OR of the inputs and outputs. In fact, conservative reversible logic is an equal hamming weight used in inputs and outputs to ensure the observance of testability [3]. The novelty of the proposed designs around quantum computing paradigm is the realization of a quantum equivalent of a sequential circuit with low quantum cost. Sequential circuits are the fundamental parts in various digital VLSI circuits such as memory, general purpose register and accumulation for the processor. In this paper, we target on synthesizing conservative reversible (CR) flip-flops and Binary-coded decimal (BCD) ripple counter with low quantum cost (QC) using R-CQCA, which will be illustrated in Sec. 4. The proposed circuits focus on the quantum equivalent realization (QER) through some additional coding in RCviewer+ tool. The exact QC are obtained after QER of the circuit. The construction of QER from the elementary gates such as CNOT, NOT, C-V, and C-V +. A new R-CQCA gate strongly alters the circuit cost of reversible sequential circuits. The proposed circuits more competent and best suitable for such as general purpose register and the memory element. The proposed gate R-CQCA has a wide utility such as universal gates (NAND, NOR), multiplexer (mux), flip-flops (FFs), and counter. The proposed R-CQCA contains only 6 quantum cost (QC), very few conservative reversible gates (CRGs) that have such value of the QC. This work includes the following contributions: We designed a low QC, R-CQCA for NANO-Electronics application. We present the QCA robust structure of R-CQCA, and the simulation outcomes specify the correct functionality and also the low worst case latency of 2.5 is reported here.