Design and evaluation of an ultra-area-efficient fault-tolerant QCA full adder (original) (raw)
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Design of Testable Adder in Quantum‐dot Cellular Automata with Fault Secure Logic
Microelectronics Journal, 2017
The rapid advancement of Quantum-dot cellular automata (QCA) technology has moved on to the effective methods for testing these circuits due to its insufficient reliability. The growing demand for fault tolerance and testability attracts more research on it. This paper targets, a novel parity preserving testable adder (t-Adder) in QCA which tackles the internal fault within the gate efficiently resulting a testable circuit. The fault patterns of t-Adder gate under cell deposition defects are investigated. The most striking characteristic of this logic is that it is completely testable for single as well as multiple stuck-at faults using only three test vectors. Also, the functionality and the defect tolerance of the proposed t-Adder under the Path Fault Secure (PFS) scheme are studied which ensures more reliability. A comprehensive power dissipation analysis, as well as structural analysis of the testable logic gates, is performed which signifies the dominance of t-Adder in low power consumption. Further, the programmable feature of t-Adder is utilized to implement an efficient ALU, realizing 10 important functions along with addition operation. The design of QCA layout, as well as functional verification of the proposed design, is performed using the QCADesigner and HDLQ tool respectively whereas the power dissipation is evaluated using QCAPro simulator.
Moving towards nanometer scales, Quantum-dot Cellular Automata (QCA) technology emerged as a novel solution, which can be a suitable replacement for complementary metal-oxide-semiconductor (CMOS) technology. The 3-input majority function and inverter gate are fundamental gates in the QCA technology, which all logical functions are produced based on them. Like CMOS technology, making the basic computational element such as an adder with QCA technology, is considered as one of the most important issues that extensive research have been done about it. In this paper, a new QCA full-adder based on coupled majorityminority and 5-input majority gates is introduced which its novel structure, appropriate design technique selection and its arrangement make it very suitable. The experimental results showed that the proposed QCA full-adder makes only 48 cells and the first output is obtained in the 0.05clock. Therefore, the presented QCA full-adder improves the number of cells and gains a speedup rate of 33% in comparison with the best previous robust QCA full-adders. In addition, temperature analysis of the QCA full-adders shows that our design is more robust compared with other suggested QCA full-adders.
Novel Adder Circuits Based On Quantum-Dot Cellular Automata (QCA)
Circuits and Systems, 2014
Quantum-dot cellular automaton (QCA) is a novel nanotechnology that provides a very different computation platform than traditional CMOS, in which polarization of electrons indicates the digital information. This paper demonstrates designing combinational circuits based on quantum-dot cellular automata (QCA) nanotechnology, which offers a way to implement logic and all interconnections with only one homogeneous layer of cells. In this paper, the authors have proposed a novel design of XOR gate. This model proves designing capabilities of combinational circuits that are compatible with QCA gates within nano-scale. Novel adder circuits such as half adders, full adders, which avoid the fore, mentioned noise paths, crossovers by careful clocking organization, have been proposed. Experiment results show that the performance of proposed designs is more efficient than conventional designs. The modular layouts are verified with the freely available QCADesigner tool.
Fault-Tolerant Techniques for Quantum-dot Cellular Automata Circuits and Systems
2020
This paper explains fault tolerance techniques for Quantum-dot cellular automata which offer remarkable robustness to implement QCA arithmetic circuits. It begins with a study of QCA based design. A classification for fault types is presented and some fault tolerance techniques are examined and their relevance for QCA circuits is evaluated. Finally, it is concluded that a combination of two or more hardware redundancy techniques is needed for tolerating faults in QCA circuits and systems. The proper functionality of the presented design is checked by computer simulations using the QCADesigner tool. Simulation results confirm our claims and their usefulness in designing robust digital circuits.
Presentation of a fault tolerance algorithm for design of quantum-dot cellular automata circuits
International Journal of Electrical and Computer Engineering (IJECE), 2022
A novel algorithm for working out the Kink energy of quantum-dot cellular automata (QCA) circuits and their fault tolerability is introduced. In this algorithm at first with determining the input values on a specified design, the calculation between cells makes use of Kink physical relations will be managed. Therefore, the polarization of any cell and consequently output cell will be set. Then by determining missed cell(s) on the discussed circuit, the polarization of output cell will be obtained and by comparing it with safe state or software simulation, its fault tolerability will be proved. The proposed algorithm was implemented on a novel and advance fault tolerance full adder whose performance has been demonstrated. This algorithm could be implemented on any QCA circuit. Noticeably higher speed of the algorithm than simulation and traditional manual methods, expandability of this algorithm for variable circuits, beyond of four-dot square of QCA circuits, and the investigation of several damaged cells instead just one and special cell are the advantages of algorithmic action.
Design of novel efficient adder and subtractor for quantum‐dot cellular automata
International Journal of Circuit Theory and Applications, 2014
SummaryQuantum‐dot cellular automata (QCA) is one of the new emerging technologies being investigated as an alternative to complementary metal oxide semiconductor technology. This paper proposes optimized one‐bit full adder (FA) for implementation in QCA. The fault effects at the proposed FA outputs due to the missing cell defects are analyzed, and the test vectors for detection of all faults are identified. Also, the efficient designs of one‐bit full subtractor (FS), one‐bit FA/FS and four‐bit carry flow adder (CFA) are presented using the proposed FA. These structures are designed and simulated using QCADesigner software. The proposed designs are compared with other previous works. In comparison with the best previous design, the proposed FA has 25% and 26% improvement in cells count and area, respectively, and it is faster. For the proposed FS, FA/FS and CFA, the obtained results confirm that these designs are more efficient in terms of area, cell count and delay. Therefore, the ...
Novel Efficient Adder Circuits for Quantum-Dot Cellular Automata
Journal of Computational and Theoretical Nanoscience, 2011
Quantum Dot Cellular Automata (QCA) as an emerging nanotechnology can be considered as a possible successor for the conventional silicon MOSFET technology, in the time to come. This paper presents novel efficient designs for QCA Full Adder and Adder circuits. The layouts of the proposed designs are simple and lead to very low complexity, small area and short latency. For verifying the functionality of the circuits, all of them are simulated exhaustively using QCADesigner tool. The proposed designs are also compared with the other classical and state-of-the-art Full Adders and Adders, which demonstrates the superiority of the proposed circuits, in terms of gate count, area and latency.
A novel single layer full-adder in Quantum-dot Cellular Automata (QCA)
Quantum-dot Cellular Automata (QCA) is a new technology for designing digital circuits in nanoscale. The design of a QCA circuit is radically different from the conventional digital design due to its unique characteristics at both the physical and logical levels. Quantum-dot Cellular Automata is not a physical implementation yet, it is rather a lower-level abstraction since there are several ways to build the quantum dots and connect them. Quantum dots can be any charge containers, with discrete electrical energy states (there may be more than two states, but only two-state case is used), sometimes called artificial atoms. In this paper, a new 3-input majority gate was initially proposed, then an efficient design of a single-layer full-adder was introduced using the proposed optimized 3-input majority gate. The functional correctness of the proposed structure is evaluated by the QCA Designer tool. Simulation results show that the proposed full-adder is improved and more efficient in...
Towards modular design of reliable quantum-dot cellular automata logic circuit using multiplexers
Computers & Electrical Engineering, 2015
With the rapid advancement in very large scale integration (VLSI) technology, it is the utmost necessity to achieve a reliable design with low power consumption. The Quantum dot Cellular Automata (QCA) can be such an architecture at nano-scale and thus emerges as a viable alternative for the current CMOS VLSI. This work targets design of logic module in QCA. It reports a modular design methodology to build the fault tolerant 2 n :1 multiplexer with optimized wire-crossings, delay and power consumption. A 2:1 QCA multiplexer is proposed as the basic logic module that in turn is utilized to synthesize 4:1 and 8:1 multiplexers. It shows significant achievement in terms of clock speed (36%), wire-crossing (58%), fault tolerance (77.62%) and power consumption over the existing designs. The effectiveness of proposed multiplexer is further established through synthesis of configurable logic block (CLB) for field programmable gate arrays (FPGAs).
Design of Fault-Tolerant and Thermally Stable XOR Gate in Quantum dot Cellular Automata
2021 IEEE European Test Symposium (ETS), 2021
In this paper, a new XOR gate is discussed in quantum-dot cellular automata (QCA). The proposed gate is a single layer structure with no crossovers, and has been designed with redundant cells to increase the amplitude of the output signal and to improve the fault tolerance and reliability of the circuit. Based on the performance comparison, the investigated XOR gate has very high fault tolerance to single-cell addition and single-cell omission defects, thereby making them suitable candidates for designing reliable QCA based digital circuits.