InP/InGaAs DHBT Large Signal Model for Nonlinearity Harmonic Predictions in ICs (original) (raw)
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A user compiled large signal model for GaAs heterojunction bipolar transistors
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Solid-State Electronics, 2010
An improved method for the determining of the small-signal model parameters has been demonstrated and successfully applied to E-up InGaAlAs/GaAsSb/InP double heterojunction bipolar transistor (DHBT). The adopted model takes into account the distributed nature of base resistance and base/collector capacitance. The proposed method can alleviate some difficulties encountered among conventional extracting techniques, namely the use of additional test structures, forward-biased measurements at specific conditions, and empirical optimization process. The method is based on analytical approach with only two approximations dividing the frequency range in three parts (low, middle, and high frequency range). An extraction technique for extrinsic and intrinsic base/collector capacitances using S-parameters data is also presented in this paper. An excellent agreement between measured and simulated S-parameters in the frequency range of 40 MHz-50 GHz is obtained over a wide range of bias points.
An accurate and compact large signal model for III–V HBT devices
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An accurate and compact large signal model is proposed for modeling heterojunction bipolar transistors (HBTs) based on III-V materials. In DC mode, the model includes self-heating, Kirk and Early effects, as well as the temperature dependence of the model parameters. In small signal mode, the model captures the variation of various AC parameters with bias. The procedure of extracting the model parameters uses DC and multiple bias S-parameter measurements. The model is compiled in the HP-ADS circuit simulator as user-compiled model and is verified by comparing its simulations to measurements in all modes of operation for an AlGaAs/GaAs transistor with an emitter area of 2 · 25 lm 2 .
InP DHBT-based IC technology for high-speed data communications
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In this paper, we report the achieved performance of devices and integrated circuits (ICs) using a manufacturable InP DHBT-based technology. High speed MBE grown InGaAs/InP DHBTs with an effective emitter junction area of 4.8 /spl mu/m/sup 2/ exhibited peak f/sub T/ and f/sub MAX/ values of 265 and 305 GHz, respectively, at a collector current density of 3.75 mA//spl mu/m/sup
Scalable GaInP/GaAs HBT large-signal model
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A scalable large-signal model for heterojunction bipolar transistors (HBTs) is presented in this paper. It allows exact modeling of all transistor parameters from single-finger elementary cells to multifinger power devices. The scaling rules are given in detail. The model includes a new collector description, which accounts for modulation of base-collector capacitance Cjc as well as for base and collector transit
DC Analysis of InP/GaAsSb DHBT Device
Tremendous increment in the high speed demands of data rate results in the continuous development in Type II InP/GaAsSb/InP Dual Heterojunction Bipolar Transistor Device. Physical based two dimensional device simulators, Atlas tool is used to study the DC operation and performance of InP/GaAsSb Dual Heterojunction Bipolar Transistor Device approaching Giga Hertz frequency range. Gallium Arsenide Antimonide lattice matched to Indium Phosphide is the replacement of Indium Gallium Arsenide based DHBTs because of its non collector blocking effect. Simulated device has shown a dc peak current gain of 70-80 dB, turn on voltage of 0.1V for 0.5 x 1 µm 2 emitter device having 15nm thick uniform GaAsSb base.
Submicron InP DHBT Technology for High-Speed High-Swing Mixed-Signal ICs
2008 IEEE Compound Semiconductor Integrated Circuits Symposium, 2008
We report on the development of a submicron InP DHBT technology, optimized for the fabrication of ≥50-GHzclock mixed-signal ICs. In-depth study of device geometry and structure has allowed to get the needed performances and yield. Special attention has been paid to critical thermal behavior. Various size submicron devices have been modeled using UCSD-HBT equations. These large signal models have allowed the design of 50-GHz clocked 50G Decision and 100G Selector circuits. The high quality of the measured characteristics demonstrates the suitability of this technology for the various applications of interest, like 100 Gbit/s transmission.
Noise model of InP-InGaAs SHBTs for RF circuit design
IEEE Transactions on Microwave Theory and Techniques, 2002
A scalable small-signal and noise model of InP-InGaAs single heterojunction bipolar transistors (SHBT) was developed. Effects which become important at higher frequencies such as the correlation between base and collector current noise and frequency-dependent base current noise are taken into account. We will show that these effects are significant at frequencies higher than ¢ ¡ ¤ £ ¦ ¥ § and can no longer be neglected. Our model also includes the effects of the different emission coefficients of the base and collector currents. Using this improved model, a direct-coupled, lumped broad-band amplifier was designed. We completely characterized the fabricated circuit with respect to small-signal, noise and linearity be-
IEEE MTT-S International Microwave Symposium Digest, 2003, 2003
Abslracf-An analytical large-signal HBT model which accurately accounts for the intricate hias dependence of collector delay in devices fabricated in both GaAs and InP material systems is described. The strongly hias dependent collector delay function accounts for the variation of electron velocity with electric field of the collector, which has consequences for both the electron transit time and capacitance. It is shown that the new formulation significantly improves the prediction of the bias dependence of fr. As a result, simulations over a very wide range of operating conditions match measured data ou a wide variety of devices. Distortion predictions are improved since the derivatives of the bias dependent delay are more accurately modeled. This new model is extracted on medium and high breakdown GaAs HBTs, and also on InP DHBTs. Simulation results are verified with comparisons to S-parameter and large-signal measurements.
Ultra high-speed InP/InGaAs DHBTs with f t of 203 GHz
Journal of Semiconductors, 2009
InP/InGaAs/InP double heterojunction bipolar transistors (DHBTs) were designed for wide band digital and analog circuits, and fabricated using a conventional mesa structure with benzocyclobutene (BCB) passivation and planarization process techniques. Our devices exhibit a maximum f t of 203 GHz, which is the highest f t for DHBTs in mainland China. The emitter size is 1.0 × 20 µm 2. The DC current gain β is 166, and BV CEO = 4.34 V. The devices reported here employ a 40 nm highly doped InGaAs base region and a 203 nm InGaAsP composite structure. They are suitable for high speed and intermediate power applications.