Timed behavior trees and their application to verifying real-time systems (original) (raw)

Scenario-based verification of real-time systems using Uppaal

Formal Methods in System Design, 2010

This article proposes two approaches to tool-supported automatic verification of dense real-time systems against scenario-based requirements, where a system is modeled as a network of timed automata (TAs) or as a set of driving live sequence charts (LSCs), and a requirement is specified as a separate monitored LSC chart.

On the Semantics of Scenario-Based Specification Based on Timed Computational Tree Logic

2013 22nd Australian Software Engineering Conference, 2013

Scenario-based specifications have been widely used to specify the behavior of reactive systems in a visual and intuitive way. Timed Property Sequence Chart (TPSC) is a recently proposed scenario-based specification for specifying timing properties for real-time systems. However, there is currently no model checking tool available to verify timing properties specified by TPSC specifications. To mitigate this gap, this paper provides the semantics rules for TPSC by explicitly translating TPSC into Timed Computational Tree Logic (TCTL) that is a realtime temporal logic. Two kinds of rules are defined: basic and compositional rules. Basic rules discuss how to translate a single message in a TPSC specification into a TCTL formula, while compositional rules show how to compose these basic TCTL formulas according to compositional operators. The classification of basic and compositional rules makes our translations more efficient. The translation process is illustrated by a case study. The translating correctness is also proved by the practical measurement of real-time specification patterns. The work described here opens an indirect way to model checking real-time requirements represented in TPSC specifications by translating TPSC specifications into TCTL formulas.

TAME: A Specialized Specification and Verification System for Timed Automata

1996

Assuring the correctness of speci cations of realtime systems can involve signi cant human e ort. The use of a mechanical theorem prover to encode such speci cations and to verify their properties could signicantly reduce this e ort. A barrier to routinely encoding and mechanically verifying speci cations has been the need rst to master the speci cation language and logic of a general theorem proving system. Our approach to overcoming this barrier is to provide mechanical support for producing speci cations and verifying proofs, specialized for particular mathematical models and proof techniques. We are currently developing a mechanical veri cation system called T AME Timed Automata Modeling Environment that provides this specialized support using SRI's Prototype V eri cation System PVS. Our system is intended t o p ermit steps in reasoning similar to those in hand proofs that use model-speci c techniques. TAME has recently been used to detect errors in a realistic example.

Mechanical verification of timed automata: a case study

1996

The paper reports the results of a case study on the feasibility of developing and applying mechanical methods, based on the proof system PVS, to prove propositions about real time systems specified in the Lynch-Vaandrager timed automata model. In using automated provers to prove propositions about systems described by a specific mathematical model, both the proofs and the proof process can be simplified by exploiting the spectral properties of the mathematical model. The paper presents the PVS specification of three theories that underlie the timed automata model, a template for specifying timed automata models in PVS and an example of its instantiation, and both hand proofs and the corresponding PVS proofs of two propositions. It concludes with a discussion of our experience in applying PVS to specify and reason about real time systems modeled as timed automata

Temporal logics for real-time system specification

ACM Computing Surveys, 2000

The specification of reactive and real-time systems must be supported by formal, mathematically-founded methods in order to be satisfactory and reliable. Temporal logics have been used to this end for several years. Temporal logics allow the specification of system behavior in terms of logical formulas, including temporal constraints, events, and the relationships between the two. In the last ten years, temporal logics have reached a high degree of expressiveness. Most of the temporal logics proposed in the last few years can be used for specifying reactive systems, although not all are suitable for specifying real-time systems. In this paper we present a series of criteria for assessing the capabilities of temporal logics for the specification, validation, and verification of real-time systems. Among the criteria are the logic's expressiveness, the logic's order, presence of a metric for time, the type of temporal operators, the fundamental time entity, and the structure of time. We examine a selection of temporal logics proposed in the literature. To make the comparison clearer, a set of typical specifications is identified and used with most of the temporal logics considered, thus presenting the reader with a number of real examples.

Verification of Durational Action Timed Automata using UPPAAL

International Journal of Computer Applications, 2012

The increasing complexity of software is incessant, this phenomenon is even more accentuated when temporal aspects are introduced, hence the need for rigorous verification methods. The main purpose of this paper is to propose a quantitative verification approach based on model checking. Their properties are expressed in TCTL (Timed Computation Tree Logic) on real-time systems. The system behavior is expressed by temporal labeled systems; namely Durational Action Timed Automata model (DATA* model). This model supports the expression of the parallel behavior, the temporal and structural non-atomicity of actions and urgency. Our approach is to interpret the behavior described by DATA* to Timed Safety Automata. The environment UPPAAL allows us verifying quantitative temporal properties, especially the bounded liveliness.

Predicate Diagrams for the Verification of Real-Time Systems

Electronic Notes in Theoretical Computer Science, 2006

We propose a format of predicate diagrams for the verification of real-time systems. We consider systems that are defined as extended timed graphs, a format that combines timed automata and constructs for modeling data, possibly over infinite domains. Predicate diagrams are succinct and intuitive representations of Boolean abstractions. They also represent an interface between deductive tools used to establish the correctness of an abstraction, and model checking tools that can verify behavioral properties of finite-state models. The contribution of this paper is to extend the format of predicate diagrams to timed systems. We also establish a set of verification conditions that are sufficient to prove that a given predicate diagram is a correct abstraction of an extended timed graph. The formalism is supported by a toolkit, and we demonstrate its use at the hand of Fischer's real-time mutualexclusion protocol.

Verification of Reactive Systems Using Temporal Logic with Clocks

Theoretical Computer Science, 1999

This paper presents a framework for the specification and verification of timing properties of reactive systems using Temporal Logic with Clocks (TLC). Reactive systems usually contain a number of parallel processes, therefore, it is essential to study and analyse each process based on its own local time. TLC is a temporal logic extended with multiple clocks, and it is in particular suitable for the specification of reactive systems. In our framework, the behavior of a reactive system is described through a formal specification; its timing properties, including safety and liveness properties, are expressed by TLC formulas. We also propose several demonstration techniques, such as an application of local reasoning and deriving fixed-time rules from the proof system of TLC, for proving that a reactive system meets its temporal specification. Under the proposed framework, the timing properties of a reactive system can therefore be directly reasoned about from the formal specification of the system.

Methodologies for Specification of Real-Time Systems Using Timed I/O Automata

Lecture Notes in Computer Science, 2010

We present a real-time specification framework based on Timed I/O Automata and a comprehensive tool support for it. The framework supports various design methodologies including: top-down refinement-for decomposition of abstract specifications towards increasingly detailed models; bottom-up abstraction-for synthesis of complex systems from more concrete models; and step-wise modularisation of requirements-to factor out behaviours given by existing available components from a complex global requirements specification to be implemented. These methodologies are realized by consecutive applications of operators from the following set: refinement, consistency checking, logical and structural composition and quotienting. Additionally, our tool allows combining the component-oriented design process with verification of temporal logic properties increasing the flexibility of the process.

Model-checking for real-time systems

Logic in Computer Science, …, 1990

This research extends CTL model-checking to the analysis of real-time systems, whose correctness depends on the magnitudes of the timing delays. For specifications, the syntax of CTL is extended to allow quantitative temporal operators. The formulas of the resulting logic, TCTL, are interpretation over continuous computation trees, trees in which paths are maps from the set of nonnegative reals to system states. To model finite-state systems the notion of timed graphs is introduced-state-transition graphs extended with a ...