Multi-phase ring oscillator with minimized phase noise for ultra-wideband applications (original) (raw)
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A Low Phase Noise CMOS Ring Oscillator Using Phase Modulation and Pulse Injection Techniques (マイクロ波)
This paper presents a novel design of a ring oscillator (RO) producing eight phases output with accurate signal phase adjustment. By using the pulse injection technique, the RO phase noise has been strongly suppressed. In addition, a novel phase control technique is proposed for the implementation of the phase modulation. The proposed RO achieves a phase noise of -131.5 dBc/Hz @1MHz offset and FoM of -199.25 dBc/Hz. This RO consumes a 3.4 mW of power from a 1.8V power supply while having an oscillation frequency of 4.5 GHz and a locking range of 540 MHz in CMOS 0.18 um technology.
2017 Japan-Africa Conference on Electronics, Communications and Computers (JAC-ECC), 2017
This paper presents the design of low phase noise, high figure of merit (FoM), and low power injection locked ring oscillator (ILRO) in 0.18 μm CMOS technology. Edge injection technique has been adopted for ring oscillator (RO) phase noise suppression and performance enhancement. Edge injection helps improving the oscillator jitter performance while maintaining spurious harmonics minimized. In addition, implementing the proposed RO using identical NAND delay stages simplifies the design and improves frequency oscillation adjustment. The proposed injection locked oscillator (ILO) has an oscillation frequency of 3.3 GHz with fine tuning range of 400 MHz. This ILO achieves a phase noise of −120.2 dBc/Hz at 1 MHz offset. It consumes only 4.4 mW from a 1.8 V DC power source. The proposed ILRO can achieve a FoM of −184.1 dBc/Hz.
An eight-phase CMOS injection locked ring oscillator with low phase noise
2014 IEEE International Conference on Ultra-WideBand (ICUWB), 2014
This paper presents the design of a low DC power, low phase noise single-ended ring oscillator (RO) in 0.18 µm CMOS technology. It introduces a new RO output phase control technique. This RO uses a voltage pull-down circuit to produce different output signal phases. The proposed RO employs the pulse injection (PI) technique for phase noise and spurious signals suppression. The proposed injection locked ring oscillator (ILRO) can be used for phase shift keying (PSK) implementation. The proposed ILRO has an oscillation frequency of 4.5 GHz with a fine tuning range of 540 MHz. It consumes only a 4.25 mW of power while having a phase noise of -130.9 dBc/Hz @ 1MHz offset. Through this ILRO design, a figure of merit (FoM) of -197.68 dBc/Hz has been achieved. Index Terms-CMOS, phase noise, ring oscillator (RO), voltage pull-down, pulse injection (PI), spurious signals, injection locked ring oscillator (ILRO).
Microwave and Optical Technology Letters, 2016
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Proceedings of the IEEE 1998 Custom Integrated Circuits Conference (Cat. No.98CH36143)
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Electronics
This paper presents an injection locked digitally controlled ring oscillator (IL-DCRO). To reduce jitter variations, minimize oscillator spurious signals, and eliminate periodical phase error, a double edge-injection (window injection) scheme with synchronized edge directions is proposed. A combinational edge generator is utilized to substitute the sequential edge generators for injection timing requirements relaxation. By biasing devices in deep triode, digitally controlled delay cells currents are adopted for frequency tuning. This helps reducing the devices flicker (1/f) noise and minimize the DCRO overall phase noise. At 1 MHz offset of frequency, the proposed oscillator has a measured phase noise of −125.95 dBc/Hz and −115.6 dBc/Hz at oscillation frequencies of 913.4 MHz and 432.6 MHz, respectively. Fabricated in 350 nm CMOS process, with a maximum power consumption of 3.3 mW, and oscillating at 913.4 MHz, this DCRO achieves a tuned oscillator figure of merit (FoM) of −197.35 d...
Analysis and Design of Wideband Injection-Locked Ring Oscillators With Multiple-Input Injection
IEEE Journal of Solid-State Circuits, 2000
In this paper, the locking range of the injection-locked ring oscillators is investigated. To improve the injection efficiency and the locking range for superharmonic frequency division, a multiple-injection technique is proposed. Using a 0.18-m CMOS process, a wideband frequency divider based on a three-stage ring oscillator is implemented for demonstration. With a tunable free-running frequency, the fabricated circuit provides 2:1 and 4:1 frequency division with a single-ended input signal ranging from 13 to 25 and 30 to 45 GHz, respectively. Compared with the case of the single-ended injection, the locking range of the frequency divider almost doubles when multiple-input injection with optimum phases is utilized. The experimental results exhibit good agreement with the theoretical derivation and the circuit simulation.