A field-effect electron mobility model for SiC MOSFETs including high density of traps at the interface (original) (raw)
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Using a First Principles Coulomb Scattering Mobility Model for 4H-SiC MOSFET Device Simulation
Materials Science Forum, 2006
A physics based device simulator for detailed numerical analysis of 4H-SiC MOSFETs with an advanced mobility model that accounts for the effects of bulk and surface phonons, surface roughness and Coulomb scattering by occupied interface traps and fixed oxide charges, has been developed. A first principles quasi-2D Coulomb scattering mobility model specifically for SiC MOSFETs has been formulated. Using this, we have been able to extract the interface trap density of states profile for 4H-SiC MOSFETs and have shown that at room temperature, Coulomb scattering controls the total mobility close to the interface. High temperature, low field simulations and experiments show that the current increases with increase in temperature. The effect of Coulomb scattering decreases with increase in temperature causing an increase in the total mobility near the interface at low gate voltages.
Systematic Analysis of the High- and Low-Field Channel Mobility in Lateral 4H-SiC MOSFETs
Materials Science Forum, 2014
In this work, we investigate the impact of Al-implantation into n-MOSFET channel regions together with its p-doping concentration upon the mobility limiting scattering mechanisms in the channel. For this purpose, a study of the interface trap density, interface trapped charge density, field-effect mobility, and Hall mobility is carried out for normally-off n-MOSFETs with different doping profiles and concentrations in the channel region. The trend of the field-effect and the Hall mobility as well as the differences thereof will be discussed. Based on the determined mobilities in the range from 11.9 cm2/Vs to 92.4 cm2/Vs, it will be shown that for p-doping concentrations above 5·1016 cm-3 Coulomb scattering is the dominant scattering mechanism for both, low- and high-field mobility. In contrast, for p-doping concentrations below 5·1016, cm-3 further scattering mechanisms will be considered that may account for the observed mobility trend at high electric fields.
A Physical Model of High Temperature 4H-SiC MOSFETs
IEEE Transactions on Electron Devices, 2008
A comprehensive physical model for the analysis, characterization, and design of 4H-silicon carbide (SiC) MOSFETs has been developed. The model has been verified for an extensive range of bias conditions and temperatures. It incorporates details of interface trap densities, Coulombic interface trap scattering, surface roughness scattering, phonon scattering, velocity saturation, and their dependences on bias and temperature. The physics-based models were implemented into our device simulator that is tailored for 4H-SiC MOSFET analysis. By using a methodology of numerical modeling, simulation, and close correlation with experimental data, values for various physical parameters governing the operation of 4H-SiC MOSFETs, including the temperature-dependent interface trap density of states, the root-mean-square height and correlation length of the surface roughness, and the electron saturation velocity in the channel and its dependence on temperature, have been extracted. Coulomb scattering and surface roughness scattering limit surface mobility for a wide range of temperatures in the subthreshold and linear regions of device operation, whereas the saturation velocity and the high-field mobility limit current in the saturation region.
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IEEE Transactions on Industry Applications, 2000
In this paper, a physical model for a SiC Junction Field Effect Transistor (JFET) is presented. The novel feature of the model is that the mobility dependence on both temperature and electric field is taken into account. This is particularly important for high-current power devices where the maximum conduction current is limited by drift velocity saturation in the channel. The model equations are described in detail, emphasizing the differences introduced by the field-dependent mobility model. The model is then implemented in Pspice. Both static and dynamic simulation results are given. The results are validated with experimental results under static conditions and under resistive and inductive switching conditions. Index Terms-Field-dependent mobility, junction field effect transistor (JFET), physics-based model, silicon carbide (SiC).
Journal of Electronic Materials, 2005
High field-dependent electron transport characteristics in 4H-SiC were measured successfully using a nanosecond-pulsed technique. It should be noted that the velocity-field characteristics of SiC are different from GaAs in that SiC does not have velocity overshooting behavior. Without the overshooting behavior, the current density of SiC metal-semiconductor field-effect transistors (MESFETs) is restricted fundamentally by the low drift velocity in the low-field, parasitic regions. These parasitic regions not only limit the current density but also are responsible for a significant shift of the threshold voltage.
Electron transport modeling in the inversion layers of 4H and 6H–SiC MOSFETs on implanted regions
Solid-State Electronics, 2005
In this work, we present the characterization of electron transport in 4H and 6H-SiC inversion layers with the development of a physics-based, 2-D quantum-mechanical model to explain the I DS -V GS , g m -V GS device electrical characteristics, the field-effect and conductivity mobility behaviors. The model considers the combined effects of surface roughness and Coulomb scattering centers arising from fixed oxide charge and interface trapped charge. The experimental characteristics in 6H and 4H-SiC MOSFETs, fabricated on implanted regions, are presented and interpreted with this model. The peak field-effect mobility values for the 4H and 6H-SiC MOSFETs are 45 and 50 cm 2 V À1 s À1 , respectively. The peak conductivity mobility for the 4H-SiC MOSFETs are 37 before and 220 cm 2 V À1 s À1 after correction for interface trapped charge. The I DS -V GS , g m -V GS , and the field-effect mobility are modeled to an accuracy of 3% in subthreshold and strong inversion regions.
Advanced processing for mobility improvement in 4H-SiC MOSFETs: A review
Materials Science in Semiconductor Processing, 2018
This paper reviews advanced gate dielectric processes for SiC MOSFETs. The poor quality of the SiO 2 /SiC interface severely limits the value of the channel field-effect mobility, especially in 4H-SiC MOSFETs. Several strategies have been addressed to overcome this issue. Nitridation methods are effective in increasing the channel mobility and have been adopted by manufacturers for the first generations of commercial power devices. Gate oxide doping techniques have also been successfully implemented to further increase the channel mobility, although device stability is compromised. The use of high-k dielectrics is also analyzed, together with the impact of different crystal orientations on the channel mobility. Finally, the performance of SiC MOSFETs in harsh environments is also reviewed with special emphasis on high temperature operation.
Scaling Between Channel Mobility and Interface State Density in SiC MOSFETs
… IEEE Transactions on, 2011
The direct impact of the SiO 2 /4H-SiC interface state density (D it ) on the channel mobility of lateral field-effect transistors is studied by tailoring the trap distribution via nitridation of the thermal gate oxide. We observe that mobility scales like the inverse of the charged state density, which is consistent with Coulomb-scattering-limited transport at the interface. We also conclude that the D it further impacts even the best devices by screening the gate potential, yielding small subthreshold swings and poor turn-ON characteristics.
MODELING AND SIMULATION OF SiC MOSFETs
We perform a numerical simulation in order to get an insight into the physics and the behavior of silicon carbide MOSFETs. A new device structure for a lateral DMOS-FET has been proposed. Material-specific models for surface-scattering, impact ionization, and incomplete ionization have been implemented into the device simulator MINIMOS-NT to investigate device characteristics. The key parameters that alter the device performance have been optimized. The relationship between blocking and driving capability was closely examined. Excellent I-V characteristics with significant improvement on the reduction of the gate bias voltage, and a fairly large advantage on electrical performance and device reliability were achieved.