A Generalized Cascaded Multilevel Inverter Using Series Connection of Submultilevel Inverters (original) (raw)
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Design of novel cascaded multilevel inverter by series of sub multilevel inverters
This paper proposed novel multilevel inverter with low number of switches. Multilevel inverters are applicable for high power purpose in industries which become very popular. When compared to two level inverters these multilevel inverters produces good quality of output wave from. In such a way that, at first new proposed topology which as sub multilevel inverter is designed after that cascaded connection of sub multi level inverters called as novel cascaded multilevel inverter is proposed. This proposed novel cascaded multilevel inverter uses less number of switching devices. Separate attention optimal structure has been achieved by considering in different aspects such as number of switching devices, number of dc voltage sources and standing voltages on switching devices. This proposed novel cascaded multilevel inverter analyzed in symmetric and asymmetric forms of topologies which were compared with other multilevel inverter topologies suppose normal H bridge multilevel inverter by considering number components such as number of switches & IGBTs etc. The validity of proposed multilevel inverter verified with computer simulation. asymmetric; high quality wave form.
A new cascaded multilevel inverter with series and parallel connection ability of DC voltage sources
TURKISH JOURNAL OF ELECTRICAL ENGINEERING & COMPUTER SCIENCES, 2015
In this paper, a new multilevel inverter is proposed based on the connection of DC voltage sources in series and parallel. The proposed topology is composed of series basic units that consist of series and parallel connections of DC voltage sources. The values of the DC voltage sources differ from one unit to another. A new algorithm to determine the magnitude of the DC voltage sources of the proposed structure is presented. All of the related equations for the proposed multilevel inverter are extracted and the optimum structure from several points of view such as the maximum blocked voltage by switches, the number of switches and that of the DC voltage sources is obtained in order to have the maximum voltage levels at the output. The proposed topology is compared with that of some of the multilevel inverters presented recently. Finally, the proposed structure and capabilities are reconfirmed using simulation and experimental results for a 53-level typical inverter.
A New Cascaded Multilevel Inverter Structure with Less Number of Switches
Because of many features of multilevel inverters, its applications in industries are not negligible. This paper proposes a new topology for multilevel inverters that has been obtained from series blocks of sub multilevel inverter. One of the issues in this kind of inverters is quantity of switches. The proposed inverter consists of fewer number of power electronic switches which leads to lower switching loss, weight, and cost in comparison with conventional inverters. Another advantage of this structure is its modular capability. In this paper, three algorithms are considered to determine the size of DC voltage source and eventually accuracy of proposed inverter has been approved by PSCAD/EMTDC software.
An improved topology of cascaded multilevel inverter with low switch count
International Journal of Power Electronics, 2020
An improved topology of the multilevel inverter is described in this paper. Proposed topology is comprised of the basic module to get positive levels at the output. An H-bridge can be formed to obtain ac output. Developed topology significantly reduces the number of IGBTs, DC voltage sources, gate drivers for the same number of levels. Different algorithms are presented to determine the number of levels, switches, total blocking voltage and total standing voltage. Comparison of the proposed topology with the conventional cascaded multilevel inverters and other existing topologies in the literature has been carried out to show the advantages of the newly proposed topology. The operation and performance of the proposed multilevel inverter are verified by suitable experimental results with a single phase 15-level multilevel inverter considering resistive and inductive loads.
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A NEW CASCADED MULTILEVEL INVERTER WITH LESS NO OF SWITCHES
In this paper proposed a new topology for cascaded multi level inverters. This structure consists of series connection of proposed basic unit blocks which are built with both unidirectional and bidirectional switches. The proposed structure has some advantages including: reduction in the number of switches and driver circuits, cost and installation area. Three algorithms for determination of dc voltages sources' magnitudes have also been proposed. The algorithms can produce all odd and even levels at the output voltage the proposed structure also has fewer dc voltage sources variety and less maximum blocking voltage of switches compared to conventional inverters. The capability of proposed structure This paper propose a new topology for cascaded multilevel in producing all odd and even output voltage levels is proved by simulation result for a 21-level inverter.
International Journal of Power Electronics and Drive Systems (IJPEDS), 2017
As multilevel inverters are gaining increasing importance .New topologies are being proposed in order to achieve large number of levels in output voltage. A simplified MLI topology has been presented with both symmetrical and asymmetrical configurations. This paper represents a comprehensive analysis of above mentioned topology with FFT analysis,switching and conduction losses of the inverter.Hence efficiency at different carrier frequencies has been calculated successfully.Results are verified with simulation studies.Multilevel inverters are currently considered as a better industrial solution for high dynamic performance and power-quality demanding applications, covering a wide power range.
International Journal of Engineering Research and Technology (IJERT), 2014
https://www.ijert.org/an-advanced-multilevel-inverter-with-reduced-switches-using-series-connection-of-sub-multilevel-inverters https://www.ijert.org/research/an-advanced-multilevel-inverter-with-reduced-switches-using-series-connection-of-sub-multilevel-inverters-IJERTV3IS070543.pdf This paper presents an improved multilevel inverter with reduced switches using series connection of sub multilevel inverters. It is popularly adapted for high power applications and is partly because of high quality output waveform of multilevel inverter when compared to two level inverters. In this paper a new topology for sub multilevel inverters is proposed as an improved or advanced multilevel inverter. The proposed multilevel inverter uses reduced number of switching devices. Special care is needed to obtain optimal structure regarding criteria such as number of switches, standing voltage on the switches, number of DC voltage sources and etc. The proposed multilevel inverter is simulated for a symmetric thirteen level inverter, asymmetric thirty one level inverter using MATLAB software. The main attention behind the objective of proposed asymmetric thirty one level inverter topology is to achieve the high power quality, low total harmonic distortion, less electromagnetic interference and better power factor. Keywords-Multilevel inverter, sub multilevel inverter, optimal structure, cascaded H-bridge inverter (CHB).
Asymmetric Cascaded Multilevel Inverter Using Submultilevel Cells
—Multilevel inverters produce a staircase output voltage from DC voltage sources. Requiring great number of semiconductor switches is main disadvantage of multilevel inverters. The multilevel inverters can be divided in two groups: symmetric and asymmetric converters. Application of multilevel inverters for higher power purposes is quite increasing in industries Because of high-quality output waveform of multilevel inverters incomparison with two-level inverters, they are becoming more popular. In this paper, initially a submultilevel cell is proposed and then series connection of the submultilevel cells are proposed. The proposed multilevel inverter uses reduced number of switching devices. The proposed method is developed to obtain optimal structures regarding different criteria such as number of switches, standing voltage on the switches, number of dc voltage sources, etc. Comparative study of symmetric and asymmetric condition of sub multi level cells was performed. By using FFT analysis harmonic spectrum was analyzed. The proposed multilevel inverter has been analyzed in both symmetric and asymmetric conditions.
Journal of Operation and Automation in Power Engineering, 2014
In this paper, a new cascaded multilevel inverter by capability of increasing the number of output voltage levels with reduced number of power switches is proposed. The proposed topology consists of series connection of a number of proposed basic multilevel units. In order to generate all voltage levels at the output, five different algorithms are proposed to determine the magnitude of DC voltage sources. Reduction of the used power switches and the variety of DC voltage sources magnitudes are two main advantages of the proposed topology. These results are obtained by comparison of the proposed inverter with the H-bridge cascaded multilevel inverter and one of recently presented topologies. The remarkable ability of the proposed topology with its algorithms in generating all voltage levels (even and odd) is verified through PSCAD/EMTDC simulation and experimental results of a 17-level inverter.