An-Analysis-Of-Comparative-Class---E-Power-Amplifier.pdf (original) (raw)

Analysis and design of class E power amplifier considering MOSFET parasitic input and output capacitances

IET Circuits, Devices & Systems, 2016

In this study, design theory and analysis for the class E power amplifier (PA), considering the metal oxide semiconductor field effect transistor (MOSFET) parasitic input and output capacitances, are proposed. The input resistance and capacitances cause non-ideal input voltage at gate terminal, which affect the specifications of the class E PA. In the proposed study, non-linear drain-to-source, linear gate-to-drain and linear gate-to-source MOSFET parasitic capacitances are considered, while zero voltage and zero derivative switching conditions are achieved. Moreover, the input resistance and the value of the input voltage are taken into account in the design theory. According to the obtained results, the duty cycle of the MOSFET depends on the MOSFET threshold voltage, input voltage, input series resistance, and some other parameters, which will be explained in this study. A design example is finally given to describe the design procedure at 1 MHz operating frequency along with the experimental result. The circuit simulation is also performed using PSpice software. The measured results showed quantitative agreements with simulation and theory results.

Generalized Class-E Power Amplifier With Shunt Capacitance and Shunt Filter

IEEE Transactions on Microwave Theory and Techniques, 2019

This paper presents a generalized analysis of the Class-E power amplifier (PA) with a shunt capacitance and a shunt filter, leading to a revelation of a unique design flexibility that can be exploited either to extend the maximum operating frequency of the PA or to allow the use of larger active devices with higher power handling capability. The proposed PA fulfills zero voltage switching (ZVS) and zero voltage derivative switching (ZVDS) conditions, resulting in a theoretical dc-to-RF efficiency of 100%. Explicit design equations for the load-network parameters are derived, and the analytical results are confirmed by harmonic-balance simulations. Two PA prototypes were constructed with one designed at low frequency and the other at high frequency. The first PA, which employs a MOSFET and a lumped-element load-network, delivered a peak drain efficiency (DE) of 93.3% and a peak output power of 37 dBm at 1 MHz. The second PA, which employs a GaN HEMT and a transmissionline (TL) load-network to provide the drain of the transistor with the required load impedances at the fundamental frequency as well as even and odd harmonic frequencies, delivered a peak DE of 90.2% and a peak output power of 39.8 dBm at 1.37 GHz.

A Class-E Power Amplifier Design Considering MOSFET Nonlinear Drain-to-Source and Nonlinear Gate-to-Drain Capacitances at Any Grading Coefficient

IEEE Transactions on Power Electronics, 2016

This paper presents theory and analysis for class E power amplifier considering MOSFET nonlinear gate-to-drain and nonlinear drain-to-source capacitances at any grading coefficient of the MOSFET body junction diode. The nonlinearity degree of a MOSFET parasitic capacitance is determined by the grading coefficient. When the grading coefficient is not considered in design procedure, the switch voltage waveform of the class E power amplifier does not satisfy the switching conditions, which results in a decrease of the power conversion efficiency. Therefore, the grading coefficient is an important parameter to satisfy the class E zero voltage and zero derivative switching (ZVS and ZDS) conditions. The MOSFET gate-todrain capacitance is highly nonlinear and it is more nonlinear than drain-to-source capacitance for most MOSFETs. In some cases, the change in the gate-to-drain capacitance can be as large as 100 times. The results show that this nonlinearity affects the class E power amplifier properties, such as switch voltage, power output capability, and maximum switch voltage. Therefore, it is necessary to consider the nonlinearity of the gate-to-drain capacitance, along with the drain-to-source capacitance. A design example at 4 MHz operating frequency is also given to describe the design procedure. The ZVS and ZDS conditions are achieved in the obtained switch voltage. The circuit simulation was performed using PSpice software. For verification of the presented theory, a class E power amplifier was fabricated. The measured results were verified with simulation and theory results.

Analysis and design of class-E power amplifier considering MOSFET nonlinear capacitance

International Journal of Power Electronics and Drive Systems (IJPEDS), 2021

Class-E power amplifiers are integrated into many applications because their simple design and high performance. The efficiency of the power amplifier is significantly impacted by the nonlinear characteristic of the switching device, which is not analyzed clearly in theory. The nonlinear drain-tosource parasitic capacitance of the power transistor and the linear external capacitance are both contributed to the optimum conditions for obtaining the exact shunt capacitance. In this paper, a high-efficiency class-E power amplifier with shunt capacitance is designed with the consideration of both linear and nonlinear capacitance. Furthermore, a mathematical analysis is derived to calculate the component values in order to design the class-E power amplifier. Consequently, high power-added efficiency of 94.6% is obtained using MRF9030 MOSFET transistor with parameter of 4W output power and 13.56 MHz operating frequency. Finally, the measurement result of a linear class-E power amplifier circuit is obtained to compare and realize the efficiency of the proposed work.

Switching Behavior of Class-E Power Amplifier and Its Operation Above Maximum Frequency

IEEE Transactions on Microwave Theory and Techniques, 2012

The switching behavior of Class-E power amplifiers (PAs) is described. Although the zero voltage switching can be performed properly, the charging process at the switch-off transition cannot be abrupt and the waveform deviates from the ideal shape, degrading the efficiency. For the operation above maximum frequency, the charging process should be even faster but it cannot follow. Moreover, the discharging process is not sufficiently fast and further degrades the efficiency. The discharging process is assisted by the bifurcated current at saturation. The performance of the Class-E PA above the maximum frequency is enhanced by the nonlinear , which helps to shape the voltage waveform. The bifurcated current itself cannot generate enough of a second-harmonic voltage component to shape the required voltage waveform. The performance of the Class-E PA can be further improved by a second-harmonic tuning and a conjugate matched output load, leading to the saturated PA. Compared with the Class-E PA, the saturated amplifier delivers higher output power and efficiency. A highly efficient saturated amplifier is designed using a Cree GaN HEMT CGH40010 device at 3.5 GHz. It provides a drain efficiency of 75.8% at a saturated power of 40.2 dBm (10.5 W).

Analysis and Study of the Duty Ratio Effects on the Class-EM Power Amplifier Including MOSFET Nonlinear Gate-to-Drain and Drain-to-Source Capacitances

IEEE Transactions on Power Electronics, 2018

In this paper, the effects of the duty ratio variation on the class-E M power amplifier are studied and analyzed, including nonlinear gate-to-drain and drain-to-source parasitic capacitances. The duty ratio is one of the important parameters in class-E M power amplifiers, which has high effects on the switch voltage and current waveforms, output power, efficiency, power loss, and output phase shift. To achieve a better agreement between theoretical and experimental results, the nonlinear gateto-drain and drain-to-source parasitic capacitances are included in theoretical analysis. To demonstrate the validity of the presented analysis, five class-E M power amplifiers are designed, simulated, fabricated, and tested using IRF510 MOSFET with duty ratio equal to 0.5, 0.6 and 0.7 and IRFZ24N MOSFET with duty ratio equal to 0.5 with and without considering MOSFET nonlinear capacitances. It is shown that the amplifier with IRFZ24N MOSFET has higher efficiency than that with IRF510 MOSFET. This is because of the lower drain-to-source on-state resistance of the IRFZ24N MOSFET. The obtained efficiency with IRFZ24N MOSFET considering nonlinear capacitances at the operating frequency of 3.5 MHz was 95.7%. The obtained output power for IRF510 and IRFZ24N MOSFETs at duty ratio equal to 0.5 were 14.41 W and 17.82 W, respectively. Simulation and theoretical results are performed using PSpice and MATLAB, respectively. The theoretical results and PSpice simulations agreed with experimental results.

Effect of gate‐to‐drain and drain‐to‐source parasitic capacitances of MOSFET on the performance of Class‐E/F 3 power amplifier

IET Circuits, Devices & Systems, 2016

In this study, the Class-E/F 3 power amplifier with linear gate-to-drain and nonlinear drain-to-source capacitance is proposed. The analysis for the effect of the parasitic capacitance in the mixed mode Class-E/F 3 with square and sinusoidal gate-to-source voltage has been done. Most of the design equations in this study do not have analytical solutions, and the numerical analyses are used. As can be seen, there is little difference between the results related to the sinusoidal and square gate-to-source voltage. So, only the simulation and experimental result for Class E/F 3 with square gate-to-source voltage at operating frequency of 4 MHz has been done. The results in this study indicate that it is important to consider the effect of the MOSFET gate-to-drain capacitance for achieving the ZVS/ZDS conditions in the Class-E/F 3 power amplifier. The PSpice simulation and measured results are agreed with the analytical expressions, which show the validity of the presented analytical expressions. Finally, the waveforms of Class E/F 3 are compared with equivalent waveforms of Class-E power amplifier, in order to indicate its advantages.

Analysis and Design of Class-E Power Amplifier With MOSFET Parasitic Linear and Nonlinear Capacitances at Any Duty Ratio

IEEE Transactions on Power Electronics, 2013

TE (AS) mode. Since this frequency is of some importance, it is tabulated in Table 2. When b ϭ 1 the frequency checks the first root of J 1 Ј͑k͒ and when b approaches zero, the value of 2.150 is extrapolated. The TM modes are also important in the vibration of membranes. The lowest TM frequency (fundamental frequency) corresponds to TM (SS) and is tabulated in Table 3. When b ϭ 0 it is the first root of J 0 ͑k͒. When b approaches zero, it is infinite. In fact, the frequencies of all TM modes (and all TE (SA) modes) become infinite when the thickness b approaches zero. It is seen that for b close to one (near circle) numerous modes can be excited. However, as b becomes smaller (narrower shape), the modes become more separated. For an aspect ratio of 2:1 (b ϭ 0.5), there are seven modes for k below 6. The field lines are shown in Figure 2. If the waveguide is made narrower, say b ϭ 0.2 (5:1 ratio), there are only three widely separated modes for k below 6.5 (see Fig. 3). There is no improvement for even narrower waveguides. In conclusion, we find the Ritz method is efficient and accurate for this problem. Our results should be useful in the design of waveguides.

Analytical Design Equations for Class-E Power Amplifiers

IEEE Transactions on Circuits and Systems I-regular Papers, 2007

Many critical design trade-offs of the Class-E power amplifier (e.g power efficiency) are influenced by the switch onresistance and the value of dc-feed drain inductance. In literature, the time-domain mathematical analyses of the Class-E power amplifier with finite dc-feed inductance assume zero switch onresistance in order to alleviate the mathematical difficulties; resulting in non-optimum designs.