SiGe class-E power amplifier with envelope tracking for mobile WiMAX/Wibro applications (original) (raw)
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2006 IEEE Radio and Wireless Symposium, 2000
This paper reports on the results of a highly efficient monolithically fully-integrated SiGe Class E power amplifier using envelope tracking techniques for EDGE applications. The Envelope-tracking (ET) system includes a discrete linear op-amp and a switching power converter. The RF Class E amplifier was fabricated in a 0.18µm BiCMOS SiGe technology. The RF Class E power amplifier achieved a collector efficiency (CE) of 62.7% and the overall power added efficiency (PAE) of the ET system is 44.4% at an output power of 20.4dBm for an 881MHz EDGE modulated signal. A discrete envelope switching amplifier achieved 82.8% efficiency while driving the Class E PA voltage supply. The linearized SiGe PA passed the stringent EDGE transmit spectrum mask Index Terms-power amplifier, switching amplifiers, heterojunction bipolar transistors
2006
This paper reports on the results of a highly efficient monolithically fully-integrated SiGe Class E power amplifier using envelope tracking techniques for EDGE applications. The envelope-tracking (ET) system includes a discrete linear op-amp and a switching power converter. The RF Class E amplifier was fabricated in a 0.18 μm BiCMOS SiGe technology. The RF Class E power amplifier achieved a collector efficiency (CE) of 62.7% and the overall power added efficiency (PAE) of the ET system is 44.4% at an output power of 20.4 dBm for an 881 MHz EDGE modulated signal. A discrete envelope switching amplifier achieved 82.8% efficiency while driving the Class E PA voltage supply. The linearized SiGe PA passed the stringent EDGE transmit spectrum mask.
Highly Efficient and Linear Class E SiGe Power Amplifier Design
2006
This paper discusses the design of monolithic RF broadband Class E SiGe power amplifiers (PAs) that are highly efficient and linear. Load-pull measurement data on IBM 7HP SiGe power devices have been made at 900MHz and 2.4GHz and monolithic class E PAs have been designed using these devices to achieve highest power-added-efficiency (PAE) at these frequencies. It is found that high PAE can be achieved for monolithic single-stage Class E PAs designed using high-breakdown SiGe transistors at ~65% (900MHz) and ~40% (2.4GHz), respectively, which are roughly ~10% lower than the device's maximum PAE values obtained by load-pull tests under optimal off-chip matching conditions. We have also demonstrated that monolithic SiGe class E PAs can be successfully linearized using an open-loop envelope tracking (ET) technique as their output spectra pass the stringent EDGE transmit mask with margins, achieving overall PAE of 44.4% for the linearized PA system that surpasses the <30% PAE with commercially available GaAs Class AB PAs for EDGE applications. These promising results indicate the feasibility of realizing true single-chip wireless transceivers with on-chip RF SiGe PAs for spectrally-efficient non-constant-envelope modulation schemes.
IEEE Transactions on Microwave Theory and Techniques, 2011
This paper presents a SiGe envelope-tracking (ET) cascode power amplifier (PA) with an integrated CMOS envelope modulator for mobile WiMAX and 3GPP long-term evolution (LTE) transmitters (TXs). The entire ET-based RF PA system delivers the linear output power of 22.3/24.3 dBm with the overall power-added efficiency of 33%/42% at 2.4 GHz for the WiMAX 64 quadrature amplitude modulation (64QAM) and the 3GPP LTE 16 quadrature amplitude modulation, respectively. Additionally, it exhibits a highly efficient broadband characteristic for multiband applications. Compared to the conventional fixed-supply cascode PA, our ET-based cascode PA meets the WiMAX/LTE spectral mask and error vector magnitude spec at close to its 1dB compression without the need of predistortion. The SiGe PA and the CMOS envelope modulator are both designed and fabricated in the TSMC 0.35m SiGe BiCMOS process on the same die. This study represents an essential integration step toward achieving a fully monolithic large-signal ET-based TX for wideband wireless applications.
A Monolithic High-Efficiency 2.4GHz 20dBm SiGe BiCMOS Envelope-Tracking OFDM Power Amplifier
IEEE Journal of Solid-state Circuits, 2007
A monolithic SiGe BiCMOS envelope-tracking power amplifier (PA) is demonstrated for 802.11g OFDM applications at 2.4 GHz. The 4-mm 2 die includes a high-efficiency high-precision envelope amplifier and a two-stage SiGe HBT PA for RF amplification. Off-chip digital predistortion is employed to improve EVM performance. The two-stage amplifier exhibits 12-dB gain, 5% EVM, 20-dBm OFDM output power, and an overall efficiency (including the envelope amplifier) of 28%.
IEEE Transactions on Circuits and Systems I-regular Papers, 2011
This paper discusses the circuits and system design methodology of a highly-efficient wideband RF polar transmitter (TX) using the envelope-tracking (ET) technique for mobile WiMAX applications. Monolithic power amplifiers (PAs) are designed and fabricated in IBM 0.18 m SiGe BiCMOS technology, and a linear-assisted switch-mode envelope amplifier is applied to modulate the PA supply voltage to form the core of the RF polar TX. Nonlinearities caused by bandwidth limitation of the envelope amplifier and timing misalignment have been investigated. When driven by WiMAX 64QAM 8.75 MHz signals, the overall PAE of our ET-based polar TX system reaches 30.5% at 17 dBm average output power, while also meeting the stringent WiMAX linearity specs without using any predistortion. When the decresting algorithm using the soft limiter is applied to the baseband, the overall PAE increases to 33%, at the expense of a higher EVM of 4.9%.
A 20 dBm Q-band SiGe Class-E power amplifier with 31% peak PAE
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012
A Q-band two-stage Class-E power amplifier is designed and fabricated in a 0.13 µm SiGe HBT BiCMOS process. A mm-wave Class-E architecture considering the effect of various interconnect parasitics is adopted to achieve high power efficiency. Proper input and output networks have been designed to enable efficient switching of the HBT at large voltage swings without causing unwanted impact ionization-induced negative base current and instability. The measured performance of the fabricated chip show 20.2 dBm maximum output power, 31.5% peak power added efficiency, and 10.5 dB power gain across 4 GHz centered around 45 GHz for a supply voltage of 2.5 V. The total chip area including the pads is 0.74 mm × 1.7 mm.
2010
This paper presents a highly-efficient polar transmitter (TX) system that adopts the envelopetacking (ET) technique with a differential SiGe power amplifier (PA) for 3GPP Long Term Evolution (LTE) applications. The differential PA was designed using a cascode topology, reaching power-added efficiency (PAE) of 50% at output power of 22dBm in continuous wave (CW) mode. The experimental data also shows that the proposed ET-based polar TX system with the cascode PA delivers 21dBm average output power with 33.6% PAE at 1.42 GHz, while also meeting the LTE 16QAM linearity specs for both error vector magnitude (EVM) and TX emission mask without the need of PA predistortion.
A 1.8 GHz Power Amplifier Class-E with Good Average Power Added Efficiency
Circuits and Systems, 2013
This paper presents a 1.8 GHz class-E controlled power amplifier (PA). The proposed power amplifier is designed with two-stage architecture. The main advantage of the proposed technique for output control power is a high 37 dB output power dynamic range with good average power adding efficiency. The measurement results show that the PA achieves a high power gain of 23 dBm and power added efficiency (PAE) by 38%. The circuit was post layout simulated in a standard 0.18 μm CMOS technology.
Class-E CMOS RF Power Amplifier Using Voltage-Booster for Mobile Communication System
Efficiency enhancement techniques in switched Class-E power amplifier PA is usually obtained at the expense of the supply voltage. In cascode topology the supply voltage is limited by the breakdown voltage of the common-gate (CG) transistor. So voltage boosting technique is used at the CG to allow Radio Frequency (RF) swing at the gate to boost the biasing voltage above the supply voltage (VDD). This enables us to design the PA such that the cascode transistor has the same maximum drain-gate voltage. Consequently, larger signal swing will occurred at the output before encountering the breakdown. By using this combination, the gate of the NMOS is boosted above VDD and the power consumption is reduced. Simulation results using 0.13 m μ CMOS technology demonstrate 25.8 dBm output power with 38.8% Drain Efficiency at 2.4 GHz.