Guidelines on the Switch Transistors Sizing Using the Symbolic Description for the Cross-Coupled Charge Pump (original) (raw)
Related papers
Description of the functional blocks for the cross-coupled charge pump design algorithm
2017 International Conference on Applied Electronics (AE), 2017
This paper presents the circuit model that is used for the cross-coupled charge pump design algorithm. Symbolic description of the pump stage model as an analog functional block for high-voltage application is firstly discussed. Design process has been done by using simplified BSIM model equations assuming the long channel MOSFET. Characteristics have been verified by ELDO Spice and compared with the found relationships. Static and dynamic parameters of the subcircuit have been tested in two-stages structure by LT Spice simulator. Analysis results show the consistency between model and real circuits characteristics under given conditions. Complex model provides the reliable results for significantly smaller strange capacitances in comparision with the main pump capacitances. The model can be used for design and prediction of the pump parameters without long-time simulation process. The strong inversion region of MOSFET is expected, thus equations are correct for other MOSFET models that are used in chip design (PSP).
Journal of Electrical Engineering
This paper presents a dynamic part of the pump stage model of the cross-coupled charge pump. The complex model has been used for both the estimation of the N-stage pump properties in a wide range of the input parameters and derivation of equations for synthesis process, as the main capacitor sizing, which is also mentioned in the article. Dynamic part of the model (pump stage capacitances) is determined from Ward’s capacitance piece-wise model through the BSIM MOSFET model equations. Main capacitor and load capacitor sizing are based on the time response characteristics fulfilling the system behavior in time. Guideline on the MOS transistor sizing as the nonlinear main pump capacitor and specification of the diode transistor for the design process are also clarified. The characteristics of the proposed circuit have been verified in the professional design environment Mentor graphics and analysis algorithm based on the state-space description of the inner complex model was programmed...
Design aspects of the SC circuits and analysis of the cross-coupled charge pump
2016 International Conference on Applied Electronics (AE), 2016
Ahstract-This paper presents some real properties of the cross-coupled charge pump that is used in low power microelectronic integrated systems operating with high voltage (FLASH, EEPROM memories). SC-circuits characterization and design aspects are firstly discussed. Theoretical analysis of the cross-coupled charge pump with accompanying equations has been done. Some real properties have been simulated by ELDO Spice and compared with these assumptions. Simulation results show discrepancy between calculation and simulated pa rameters due to significant pumping losses that have been discussed in detail. Discontinuity of the output voltage through input parameters is very important finding that complicates the development of the real model for design purposes.
Cross-Coupled Charge Pump Synthesis Based on Full Transistor-Level
Advances in Electrical and Electronic Engineering
This paper presents utility for the design of the cross-coupled charge pump, which is used for supplying peripherals with low current consumption on the chip, as the EEPROM or FLASH memories. The article summarizes the knowledge in the field of the theoretical and practical analysis of the cross-coupled charge pump (design relationships and their connection with the pump parameters, as the threshold voltage, power supply voltage, clock signal frequency, etc.) that are applicated in the design algorithm. Optimal MOSFETs sizes (W, L) were find based on the construct of the time response characteristics of the pump sub-block and finding of the maximal voltage increase in the active interval of the clock signal and minimizing of the pump losses, as the switch reverse current, inverter cross current, etc. Synthesis process includes the design of the pump functional blocks with dominant real properties, which are described based on BSIM equations for long channel MOSFET. The pump stage complex model is applicated for estimation of the number of pump stages via state-space model description and using of the interpolation polynomial functions in the algorithm. It involves the construction of the time response characteristic due to the state variables and prediction of the number of the pump stages for the next cycle based on the previous data. Optimization of the pump area is based on the minimizing of the main capacitor in each of the pump stages (number of the pump stages must be increased to obtain the desired output voltage value). Access is designed to stress the maximum pump voltage efficiency. The whole procedure is summarized in the practical example, in which the solution is shown both in terms of maximal voltage efficiency and the optimal pump area on a chip with respect to the clock signal frequency. Added functions of the design environment are explained, inclusive of the designed pump netlist generating for professional design environment Mentor Graphics including the real models of components that are available in library MGC Design Kit. The procedure gives designer credible results without long timeconsuming optimization process. In addition, the complex model allows the inclusion effects of higher-levels.
A Resistor-Network Model of Dickson Charge Pump Using Steady-State Analysis
Energies
This paper presents a new average behavioral model, named a resistor-network (RN) model, that accurately predicts the electrical characteristics of the Dickson charge pump (DCP) circuit in the slow-switching limit and the fast-switching limit regions based on steady-state analysis. The RN model describes the steady-state behavior of a single-stage DCP using a network of resistors, which can then be cascaded to model N-stage DCP, taking into account the top- and bottom-plate parasitic capacitances. The RN model provides a comprehensive insight into various design parameters of the DCP, including the input/output current, output voltage, load characteristics, losses caused by parasitics, and power efficiency. Simulation results show that the proposed RN model accurately predicts the output voltage and power efficiency of the DCP over a wide range of switching frequencies, from 0.1 Hz to 1 GHz, with an error of less than 2% at the maximum power efficiency. The RN model provides designe...
2016 International Conference on Applied Electronics (AE), 2016
Charge pump is circuit that produces voltage higher than supply voltage or negative voltage. Today, charge pumps became an essential parts of electronic equipment. The integration of charge pumps directly into the target system allows manufacturers to feed a complex system with many specific power requirements from a single source. However, charge pump efficiency is relatively small. This paper is devoted to questions of efficiency of presented variant of charge pump. Thus efficiency as dependence on number of stages, clock frequency, output current and MOSFETs sizes of presented charge pump was simulated. The aim of this study is determination of MOSFETs sizes and theirs influence to efficiency and output voltage. Complex optimization of this circuit will follow in the next period.
DESIGN, IMPLEMENTATION AND COMPARISON OF VARIOUS CMOS CHARGE PUMPS
A charge pump is a kind of DC to DC converter that uses capacitors as energy storage elements to create a higher or lower voltage power source. Charge pumps make use of switching devices for controlling the connection of voltage to the capacitor. The use of charge transfer switches (CTSs) can improve the voltage pumping gain. Applying dynamic control to the CTSs can reduce reverse currents. This paper includes voltage and power analysis of various charge pump circuits. And a comparison is drawn between the three charge pumps analyzed.
2015 6th International Conference on Computing, Communication and Networking Technologies (ICCCNT), 2015
Dickson charge pump is a switches-capacitor network providing a voltage gain and having open-circuit resistance dependent on the topology frequency and the size of storage capacitors. In this paper, the current status of research and development in the field of Dickson charge pump is extensively reviewed. Dickson charge pump is inductor-less DC to DC converter which uses a capacitor for its energy storage. The aim of this paper is to compare various techniques of Dickson charge pump currently explored in industry and academia. The parameters especially efficiency and voltage are compared. We have also discussed and evaluated the optimised criteria of capacitor sizing according to clock signals provided such that the charge pump performance could be properly optimised. We have simulated the transient response of DCP and provided the comprehensive study.
Efficiency of Innovative Charge Pump versus Clock Frequency and MOSFETs Sizes
Measurement Science Review, 2016
Charge pumps are circuits that produce the voltage higher than supply voltage or negative voltage. Today, charge pumps became an integral part of the electronic equipment. The integration of charge pumps directly into the system allows manufacturers to feed a complex system with many specific power requirements from a single source. However, charge pump efficiency is reduced by many phenomena. This paper is focused on the question of efficiency of proposed variant of the charge pump. In this article, the efficiency dependence on a number of stages, output current, clock frequency and MOSFETs sizes was simulated by Eldo. The aim of this study is to determine the MOSFETs sizes and theirs influence to efficiency and the output voltage. Complex optimization of the charge pump circuit will follow in further text.
Journal of Semiconductors, 2010
This paper presents a novel organization of switch capacitor charge pump circuits based on voltage doubler structures. Each voltage doubler takes a DC input and outputs a doubled DC voltage. By cascading voltage doublers the output voltage increases up to 2 times. A two-phase voltage doubler and a multiphase voltage doubler structures are discussed and design considerations are presented. A simulator working in the Q-V realm was used for simplified circuit level simulation. In order to evaluate the power delivered by a charge pump, a resistive load is attached to the output of the charge pump and an equivalent capacitance is evaluated. To avoid the short circuit during switching, a clock pair generator is used to achieve multi-phase non-overlapping clock pairs. This paper also identifies optimum loading conditions for different configurations of the charge pumps. The proposed charge-pump circuit is designed and simulated by SPICE with TSMC 0.35-m CMOS technology and operates with a 2.7 to 3.6 V supply voltage. It has an area of 0.4 mm 2 ; it was designed with a frequency regulation of 1 MHz and internal current mode to reduce power consumption.